From: David Matlack <dmatlack@google.com>
To: kexec@lists.infradead.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mm@kvack.org,
linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Cc: Alexander Graf <graf@amazon.com>,
Alex Williamson <alex@shazbot.org>,
Bjorn Helgaas <bhelgaas@google.com>,
David Matlack <dmatlack@google.com>,
Jason Gunthorpe <jgg@nvidia.com>,
Jonathan Corbet <corbet@lwn.net>, Josh Hilke <jrhilke@google.com>,
Lukas Wunner <lukas@wunner.de>,
Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
Mike Rapoport <rppt@kernel.org>,
"Oliver O'Halloran" <oohall@gmail.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
Pratyush Yadav <pratyush@kernel.org>,
Randy Dunlap <rdunlap@infradead.org>,
Samiullah Khawaja <skhawaja@google.com>,
Shuah Khan <skhan@linuxfoundation.org>,
Vipin Sharma <vipinsh@google.com>
Subject: [PATCH v2 13/17] PCI/VC: Split the VC Resource Control restore into a helper
Date: Fri, 6 Nov 2026 00:42:14 +0000 [thread overview]
Message-ID: <20261106004218.604799-14-dmatlack@google.com> (raw)
In-Reply-To: <20261106004218.604799-1-dmatlack@google.com>
Move the restore of the VC Resource Control register out of
pci_vc_do_save_buffer() and into pci_vc_restore_res_ctrl().
Restoring this register is more involved than the rest of the walk: the
enable bit has to be preserved across the write, the port arbitration
table may have to be reloaded, and the VC may have to be re-enabled
afterwards. Inlined in the middle of a loop that is already sizing,
saving and restoring three kinds of register, it is hard to see where
that sequence begins and ends.
No functional change intended.
Signed-off-by: David Matlack <dmatlack@google.com>
---
drivers/pci/vc.c | 51 ++++++++++++++++++++++++++++++++----------------
1 file changed, 34 insertions(+), 17 deletions(-)
diff --git a/drivers/pci/vc.c b/drivers/pci/vc.c
index a4ff7f5f66dd..5b507207d56d 100644
--- a/drivers/pci/vc.c
+++ b/drivers/pci/vc.c
@@ -168,6 +168,37 @@ static void pci_vc_enable(struct pci_dev *dev, int pos, int res)
pci_err(link, "VC%d negotiation stuck pending\n", id);
}
+/**
+ * pci_vc_restore_res_ctrl - Restore a VC Resource Control Register
+ * @dev: device
+ * @pos: starting position of VC capability (VC/VC9/MFVC)
+ * @res: VC resource number, ie. VCn (0-7)
+ * @ctrl: saved VC Resource Control Register
+ */
+static void pci_vc_restore_res_ctrl(struct pci_dev *dev, int pos, int res,
+ u32 ctrl)
+{
+ int ctrl_pos = pos + PCI_VC_RES_CTRL + (res * PCI_CAP_VC_PER_VC_SIZEOF);
+ u32 tmp;
+
+ /*
+ * For an FLR case, the VC config may remain. Preserve enable bit,
+ * restore the rest.
+ */
+ pci_read_config_dword(dev, ctrl_pos, &tmp);
+ tmp &= PCI_VC_RES_CTRL_ENABLE;
+ tmp |= ctrl & ~PCI_VC_RES_CTRL_ENABLE;
+ pci_write_config_dword(dev, ctrl_pos, tmp);
+
+ /* Load port arbitration table if used */
+ if (ctrl & PCI_VC_RES_CTRL_ARB_SELECT)
+ pci_vc_load_port_arb_table(dev, pos, res);
+
+ /* Re-enable if needed */
+ if ((ctrl ^ tmp) & PCI_VC_RES_CTRL_ENABLE)
+ pci_vc_enable(dev, pos, res);
+}
+
/**
* pci_vc_do_save_buffer - Size, save, or restore VC state
* @dev: device
@@ -311,23 +342,9 @@ static int pci_vc_do_save_buffer(struct pci_dev *dev, int pos,
if (save)
pci_read_config_dword(dev, ctrl_pos,
(u32 *)buf);
- else {
- u32 tmp, ctrl = *(u32 *)buf;
- /*
- * For an FLR case, the VC config may remain.
- * Preserve enable bit, restore the rest.
- */
- pci_read_config_dword(dev, ctrl_pos, &tmp);
- tmp &= PCI_VC_RES_CTRL_ENABLE;
- tmp |= ctrl & ~PCI_VC_RES_CTRL_ENABLE;
- pci_write_config_dword(dev, ctrl_pos, tmp);
- /* Load port arbitration table if used */
- if (ctrl & PCI_VC_RES_CTRL_ARB_SELECT)
- pci_vc_load_port_arb_table(dev, pos, i);
- /* Re-enable if needed */
- if ((ctrl ^ tmp) & PCI_VC_RES_CTRL_ENABLE)
- pci_vc_enable(dev, pos, i);
- }
+ else
+ pci_vc_restore_res_ctrl(dev, pos, i,
+ *(u32 *)buf);
buf += 4;
}
len += 4;
--
2.56.0.455.g6c5a503b38-goog
next prev parent reply other threads:[~2026-11-06 0:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-06 0:42 [PATCH v2 00/17] PCI: Index saved capability state by configuration space offset David Matlack
2026-11-06 0:42 ` [PATCH v2 01/17] PCI/DPC: Allocate the DPC save buffer during device setup David Matlack
2026-11-06 0:42 ` [PATCH v2 02/17] PCI: Add an offset-indexed store for saved capability registers David Matlack
2026-11-06 0:42 ` [PATCH v2 03/17] PCI: Lay out struct pci_saved_state by configuration space offset David Matlack
2026-11-06 0:42 ` [PATCH v2 04/17] PCI: Save PCIe state in the saved capability store David Matlack
2026-11-06 0:42 ` [PATCH v2 05/17] PCI: Save PCI-X " David Matlack
2026-11-06 0:42 ` [PATCH v2 06/17] PCI/ASPM: Save LTR " David Matlack
2026-11-06 0:42 ` [PATCH v2 07/17] PCI/ASPM: Save L1SS " David Matlack
2026-11-06 0:42 ` [PATCH v2 08/17] PCI/AER: Save AER " David Matlack
2026-11-06 0:42 ` [PATCH v2 09/17] PCI/PTM: Save PTM " David Matlack
2026-11-06 0:42 ` [PATCH v2 10/17] PCI/TPH: Save TPH " David Matlack
2026-11-06 0:42 ` [PATCH v2 11/17] PCI/DPC: Save DPC " David Matlack
2026-11-06 0:42 ` [PATCH v2 12/17] PCI: Save ACS " David Matlack
2026-11-06 0:42 ` David Matlack [this message]
2026-11-06 0:42 ` [PATCH v2 14/17] PCI/VC: Save VC " David Matlack
2026-11-06 0:42 ` [PATCH v2 15/17] PCI: Save reserved capability registers in a single pass David Matlack
2026-11-06 0:42 ` [PATCH v2 16/17] PCI: Remove the per-capability save buffers David Matlack
2026-11-06 0:42 ` [PATCH v2 17/17] PCI: liveupdate: Add helpers to preserve struct pci_saved_state David Matlack
2026-11-06 0:46 ` [PATCH v2 00/17] PCI: Index saved capability state by configuration space offset David Matlack
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