* [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors
@ 2026-11-09 22:38 Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 1/8] dt-bindings: media: Add qcom,sm8150-camss Gaurav Suman via B4 Relay
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
This series adds camera support for the Qualcomm SM8150 (Titan 175) and
the three cameras of the LG G8x ThinQ:
- CAMSS for SM8150: four CSIPHYs, two CSIDs/VFEs plus two lite pairs,
reusing the gen2 CSID and VFE 17x code with SM8150 clock rates, the
CSIPHY v1.1 lane table and camnoc_axi set to 400 MHz by the driver,
- a driver for the Samsung S5K3M3 13MP sensor (wide camera),
- a driver for the Samsung S5KGD1 32MP quad-Bayer sensor (front
camera, 2x2 binned mode),
- a lens driver for the autofocus part of the ON Semiconductor
LC898123F40 OIS/AF controller (main camera module).
The main camera, a Sony IMX363, uses the driver from the sdm670-mainline
tree (Pixel 3a), which its author plans to submit; it is not part of
this series. The board DT for the G8x will follow once the bindings are
settled.
The sensor register settings come from the phone's vendor camera module
data. Each driver supports one mode for now.
Testing: on an LG G8x ThinQ, all three sensors stream RAW10 at 30 fps
through CSID0/VFE0 RDI0 into libcamera's simple pipeline handler and
GPU software ISP (GNOME Snapshot), and the lens moves with
V4L2_CID_FOCUS_ABSOLUTE. The patches apply to next-20261105; the
drivers build with W=1 without warnings and the bindings pass
dt_binding_check. The same code runs on the phone on top of the
postmarketOS 7.0 kernel (only the client_info callback argument
differs).
Tree and test notes: https://github.com/gauravsuman007/nura-g8x
This series was written and tested with the help of an AI coding
assistant (Claude Opus 5.5, Anthropic). I have reviewed every patch and
the test results, and I am responsible for them.
Gaurav Suman (8):
dt-bindings: media: Add qcom,sm8150-camss
media: qcom: camss: Add SM8150 support
dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor
media: i2c: Add Samsung S5K3M3 image sensor driver
dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor
media: i2c: Add Samsung S5KGD1 image sensor driver
dt-bindings: media: i2c: Add ON Semiconductor LC898123F40
media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver
.../bindings/media/i2c/onnn,lc898123f40.yaml | 46 +
.../bindings/media/i2c/samsung,s5k3m3.yaml | 104 +
.../bindings/media/i2c/samsung,s5kgd1.yaml | 105 +
.../bindings/media/qcom,sm8150-camss.yaml | 389 ++
MAINTAINERS | 25 +
drivers/media/i2c/Kconfig | 30 +
drivers/media/i2c/Makefile | 3 +
drivers/media/i2c/lc898123.c | 138 +
drivers/media/i2c/s5k3m3-regs.h | 71 +
drivers/media/i2c/s5k3m3.c | 451 ++
drivers/media/i2c/s5kgd1-regs.h | 6137 +++++++++++++++++
drivers/media/i2c/s5kgd1.c | 451 ++
.../qcom/camss/camss-csiphy-3ph-1-0.c | 80 +
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 250 +
drivers/media/platform/qcom/camss/camss.h | 1 +
16 files changed, 8283 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/i2c/onnn,lc898123f40.yaml
create mode 100644 Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml
create mode 100644 Documentation/devicetree/bindings/media/i2c/samsung,s5kgd1.yaml
create mode 100644 Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml
create mode 100644 drivers/media/i2c/lc898123.c
create mode 100644 drivers/media/i2c/s5k3m3-regs.h
create mode 100644 drivers/media/i2c/s5k3m3.c
create mode 100644 drivers/media/i2c/s5kgd1-regs.h
create mode 100644 drivers/media/i2c/s5kgd1.c
---
Gaurav Suman (8):
dt-bindings: media: Add qcom,sm8150-camss
media: qcom: camss: Add SM8150 support
dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor
media: i2c: Add Samsung S5K3M3 image sensor driver
dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor
media: i2c: Add Samsung S5KGD1 image sensor driver
dt-bindings: media: i2c: Add ON Semiconductor LC898123F40
media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver
.../bindings/media/i2c/onnn,lc898123f40.yaml | 46 +
.../bindings/media/i2c/samsung,s5k3m3.yaml | 104 +
.../bindings/media/i2c/samsung,s5kgd1.yaml | 105 +
.../bindings/media/qcom,sm8150-camss.yaml | 389 ++
MAINTAINERS | 23 +
drivers/media/i2c/Kconfig | 30 +
drivers/media/i2c/Makefile | 3 +
drivers/media/i2c/lc898123.c | 138 +
drivers/media/i2c/s5k3m3-regs.h | 71 +
drivers/media/i2c/s5k3m3.c | 451 ++
drivers/media/i2c/s5kgd1-regs.h | 6137 ++++++++++++++++++++
drivers/media/i2c/s5kgd1.c | 451 ++
.../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 80 +
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 250 +
drivers/media/platform/qcom/camss/camss.h | 1 +
16 files changed, 8281 insertions(+)
---
base-commit: ddfe51b0a0f5dc9e415cc2c8ad8db17532dd426b
change-id: 20261109-sm8150-camera-6df20588bbd2
Best regards,
--
Gaurav Suman <gauravsuman007@gmail.com>
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/8] dt-bindings: media: Add qcom,sm8150-camss
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 2/8] media: qcom: camss: Add SM8150 support Gaurav Suman via B4 Relay
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add bindings for the camera subsystem on the Qualcomm SM8150
(Titan 175): four CSIPHYs, two CSIDs and two VFEs, plus two lite
CSID/VFE pairs. Like the SDM670 binding, only the CAMSS core blocks
are described.
SM8150's camera clock controller has no SOC_AHB branch clock; the
slow AHB clock source is listed instead, as the downstream driver
does.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
.../bindings/media/qcom,sm8150-camss.yaml | 389 +++++++++++++++++++++
1 file changed, 389 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..e13bcd8d48adfbc400b4e95520fb950f9577585d
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/qcom,sm8150-camss.yaml
@@ -0,0 +1,389 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/qcom,sm8150-camss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm SM8150 Camera Subsystem (CAMSS)
+
+maintainers:
+ - Gaurav Suman <gauravsuman007@gmail.com>
+
+description:
+ The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms. On
+ SM8150 (Titan 175) it has four CSIPHYs, two CSIDs and two VFEs plus two
+ lite CSID/VFE pairs.
+
+properties:
+ compatible:
+ const: qcom,sm8150-camss
+
+ reg:
+ maxItems: 12
+
+ reg-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: vfe0
+ - const: vfe1
+ - const: vfe_lite0
+ - const: vfe_lite1
+
+ clocks:
+ maxItems: 27
+
+ clock-names:
+ items:
+ - const: gcc_ahb
+ - const: gcc_axi_hf
+ - const: camnoc_axi
+ - const: cpas_ahb
+ - const: slow_ahb_src
+ - const: csiphy0
+ - const: csiphy0_timer
+ - const: csiphy1
+ - const: csiphy1_timer
+ - const: csiphy2
+ - const: csiphy2_timer
+ - const: csiphy3
+ - const: csiphy3_timer
+ - const: vfe0
+ - const: vfe0_axi
+ - const: vfe0_cphy_rx
+ - const: vfe0_csid
+ - const: vfe1
+ - const: vfe1_axi
+ - const: vfe1_cphy_rx
+ - const: vfe1_csid
+ - const: vfe_lite0
+ - const: vfe_lite0_cphy_rx
+ - const: vfe_lite0_csid
+ - const: vfe_lite1
+ - const: vfe_lite1_cphy_rx
+ - const: vfe_lite1_csid
+
+ interrupts:
+ maxItems: 12
+
+ interrupt-names:
+ items:
+ - const: csid0
+ - const: csid1
+ - const: csid_lite0
+ - const: csid_lite1
+ - const: csiphy0
+ - const: csiphy1
+ - const: csiphy2
+ - const: csiphy3
+ - const: vfe0
+ - const: vfe1
+ - const: vfe_lite0
+ - const: vfe_lite1
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: ahb
+ - const: hf_0
+
+ iommus:
+ maxItems: 8
+
+ power-domains:
+ items:
+ - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
+ - description: Titan Top GDSC - Titan ISP Block, Global Distributed Switch Controller.
+
+ power-domain-names:
+ items:
+ - const: ife0
+ - const: ife1
+ - const: top
+
+ vdd-csiphy-1p2-supply:
+ description:
+ Phandle to a 1.2V regulator supply to CSI PHYs.
+
+ vdd-csiphy-1p8-supply:
+ description:
+ Phandle to a 1.8V regulator supply to CSI PHYs pll block.
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+
+ description:
+ CSI input ports.
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data from CSIPHY0.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ clock-lanes:
+ maxItems: 1
+
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@1:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data from CSIPHY1.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ clock-lanes:
+ maxItems: 1
+
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@2:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data from CSIPHY2.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ clock-lanes:
+ maxItems: 1
+
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+ port@3:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+ description:
+ Input port for receiving CSI data from CSIPHY3.
+
+ properties:
+ endpoint:
+ $ref: video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ clock-lanes:
+ maxItems: 1
+
+ data-lanes:
+ minItems: 1
+ maxItems: 4
+
+ required:
+ - data-lanes
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - clock-names
+ - interrupts
+ - interrupt-names
+ - interconnects
+ - interconnect-names
+ - iommus
+ - power-domains
+ - power-domain-names
+ - vdd-csiphy-1p2-supply
+ - vdd-csiphy-1p8-supply
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-sm8150.h>
+ #include <dt-bindings/clock/qcom,sm8150-camcc.h>
+ #include <dt-bindings/interconnect/qcom,sm8150.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ isp@acb3000 {
+ compatible = "qcom,sm8150-camss";
+
+ reg = <0x0 0x0acb3000 0x0 0x1000>,
+ <0x0 0x0acba000 0x0 0x1000>,
+ <0x0 0x0acc8000 0x0 0x1000>,
+ <0x0 0x0accf000 0x0 0x1000>,
+ <0x0 0x0ac65000 0x0 0x1000>,
+ <0x0 0x0ac66000 0x0 0x1000>,
+ <0x0 0x0ac67000 0x0 0x1000>,
+ <0x0 0x0ac68000 0x0 0x1000>,
+ <0x0 0x0acaf000 0x0 0x4000>,
+ <0x0 0x0acb6000 0x0 0x4000>,
+ <0x0 0x0acc4000 0x0 0x4000>,
+ <0x0 0x0accb000 0x0 0x4000>;
+ reg-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1";
+
+ interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 359 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 360 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "csid0",
+ "csid1",
+ "csid_lite0",
+ "csid_lite1",
+ "csiphy0",
+ "csiphy1",
+ "csiphy2",
+ "csiphy3",
+ "vfe0",
+ "vfe1",
+ "vfe_lite0",
+ "vfe_lite1";
+
+ clocks = <&gcc GCC_CAMERA_AHB_CLK>,
+ <&gcc GCC_CAMERA_HF_AXI_CLK>,
+ <&camcc CAM_CC_CAMNOC_AXI_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
+ <&camcc CAM_CC_CSIPHY0_CLK>,
+ <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY1_CLK>,
+ <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY2_CLK>,
+ <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
+ <&camcc CAM_CC_CSIPHY3_CLK>,
+ <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
+ <&camcc CAM_CC_IFE_0_CLK>,
+ <&camcc CAM_CC_IFE_0_AXI_CLK>,
+ <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_1_CLK>,
+ <&camcc CAM_CC_IFE_1_AXI_CLK>,
+ <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_1_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_0_CSID_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CPHY_RX_CLK>,
+ <&camcc CAM_CC_IFE_LITE_1_CSID_CLK>;
+ clock-names = "gcc_ahb",
+ "gcc_axi_hf",
+ "camnoc_axi",
+ "cpas_ahb",
+ "slow_ahb_src",
+ "csiphy0",
+ "csiphy0_timer",
+ "csiphy1",
+ "csiphy1_timer",
+ "csiphy2",
+ "csiphy2_timer",
+ "csiphy3",
+ "csiphy3_timer",
+ "vfe0",
+ "vfe0_axi",
+ "vfe0_cphy_rx",
+ "vfe0_csid",
+ "vfe1",
+ "vfe1_axi",
+ "vfe1_cphy_rx",
+ "vfe1_csid",
+ "vfe_lite0",
+ "vfe_lite0_cphy_rx",
+ "vfe_lite0_csid",
+ "vfe_lite1",
+ "vfe_lite1_cphy_rx",
+ "vfe_lite1_csid";
+
+ interconnects = <&gem_noc MASTER_AMPSS_M0 0 &config_noc SLAVE_CAMERA_CFG 0>,
+ <&mmss_noc MASTER_CAMNOC_HF0 0 &mc_virt SLAVE_EBI_CH0 0>;
+ interconnect-names = "ahb", "hf_0";
+
+ iommus = <&apps_smmu 0x840 0x620>,
+ <&apps_smmu 0x860 0x620>,
+ <&apps_smmu 0xa40 0x620>,
+ <&apps_smmu 0xa60 0x620>,
+ <&apps_smmu 0xc40 0x620>,
+ <&apps_smmu 0xc60 0x620>,
+ <&apps_smmu 0xe40 0x620>,
+ <&apps_smmu 0xe60 0x620>;
+
+ power-domains = <&camcc IFE_0_GDSC>,
+ <&camcc IFE_1_GDSC>,
+ <&camcc TITAN_TOP_GDSC>;
+ power-domain-names = "ife0", "ife1", "top";
+
+ vdd-csiphy-1p2-supply = <&vreg_l3c_1p2>;
+ vdd-csiphy-1p8-supply = <&vreg_l1c_1p8>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ csiphy_ep0: endpoint {
+ clock-lanes = <7>;
+ data-lanes = <0 1 2 3>;
+ remote-endpoint = <&sensor_ep>;
+ };
+ };
+ };
+ };
+ };
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/8] media: qcom: camss: Add SM8150 support
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 1/8] dt-bindings: media: Add qcom,sm8150-camss Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 3/8] dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor Gaurav Suman via B4 Relay
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add the SM8150 (Titan 175) camera subsystem. The CSID, VFE and bus
blocks are the same as on SM6150/SDM845 (Titan 17x), so the gen2 CSID
and VFE 17x code is reused, but SM8150 needs its own resources:
- four CSIPHYs, four CSIDs and four VFEs (two of each are lite),
- clock rates from the SM8150 camera clock controller tables,
- camnoc_axi at 400 MHz. At its 19.2 MHz boot rate the VFE gets a
start of frame and one reg update but never a buffer done,
- the CSIPHY v1.1 lane settings (downstream cam_csiphy_1_1_hwreg.h).
The SM6150 entry uses the QCM2290 v1.2 table; with it the sensor
streams but the CSID never sees data.
Tested on an LG G8x ThinQ with three sensors on CSIPHY0, 1 and 2 (4
lanes each, up to 1190 Mbps per lane): 30 fps RAW10 through CSID0
and VFE0 RDI0, with libcamera's simple pipeline handler.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
.../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 80 +++++++
drivers/media/platform/qcom/camss/camss-vfe.c | 2 +
drivers/media/platform/qcom/camss/camss.c | 250 +++++++++++++++++++++
drivers/media/platform/qcom/camss/camss.h | 1 +
4 files changed, 333 insertions(+)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index dac8d2ecf79957dc05c5524dc439791ce097c785..3d8992d5dbc7bfd1f7447303f44386e67d90b830 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -144,6 +144,81 @@ csiphy_lane_regs lane_regs_sa8775p[] = {
{0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
};
+/* SM8150 (Titan 175): CSIPHY v1.1, 2-phase lane settings */
+static const struct
+csiphy_lane_regs lane_regs_sm8150[] = {
+ {0x0004, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x002C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0034, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x001C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0014, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0028, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x003C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0000, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0008, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x000C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0060, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0064, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0704, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x072C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0734, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x071C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0714, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0728, 0x04, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x073C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0700, 0x80, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0708, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x070C, 0xA5, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0760, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0764, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0204, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x022C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0234, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x021C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0214, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0228, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x023C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0200, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0208, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x020C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0260, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0264, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0404, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x042C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0434, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x041C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0414, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0428, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x043C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0400, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0408, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x040C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0460, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0464, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0604, 0x0C, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x062C, 0x01, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0634, 0x0F, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x061C, 0x0A, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0614, 0x60, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0628, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x063C, 0xB8, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0600, 0x90, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0608, 0x0E, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE},
+ {0x060C, 0x00, 0x00, CSIPHY_DNP_PARAMS},
+ {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0660, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS},
+ {0x0664, 0x7F, 0x00, CSIPHY_DEFAULT_PARAMS},
+};
+
/* GEN2 1.0 2PH */
static const struct
csiphy_lane_regs lane_regs_sdm845[] = {
@@ -1131,6 +1206,7 @@ static bool csiphy_is_gen2(u32 version)
switch (version) {
case CAMSS_2290:
case CAMSS_6150:
+ case CAMSS_8150:
case CAMSS_6350:
case CAMSS_7280:
case CAMSS_8250:
@@ -1221,6 +1297,10 @@ static int csiphy_init(struct csiphy_device *csiphy)
regs->lane_regs = &lane_regs_sdm845[0];
regs->lane_array_size = ARRAY_SIZE(lane_regs_sdm845);
break;
+ case CAMSS_8150:
+ regs->lane_regs = &lane_regs_sm8150[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8150);
+ break;
case CAMSS_2290:
case CAMSS_6150:
regs->lane_regs = &lane_regs_qcm2290[0];
diff --git a/drivers/media/platform/qcom/camss/camss-vfe.c b/drivers/media/platform/qcom/camss/camss-vfe.c
index 2680a9914765fa2c8f3c2b38a5f4f0e0bcf4d873..4f89e8901d530410b243581d3953b6b023a8c7c3 100644
--- a/drivers/media/platform/qcom/camss/camss-vfe.c
+++ b/drivers/media/platform/qcom/camss/camss-vfe.c
@@ -343,6 +343,7 @@ static u32 vfe_src_pad_code(struct vfe_line *line, u32 sink_code,
case CAMSS_660:
case CAMSS_2290:
case CAMSS_6150:
+ case CAMSS_8150:
case CAMSS_6350:
case CAMSS_7280:
case CAMSS_8x96:
@@ -2004,6 +2005,7 @@ static int vfe_bpl_align_rdi(struct vfe_device *vfe)
switch (vfe->camss->res->version) {
case CAMSS_6150:
+ case CAMSS_8150:
case CAMSS_6350:
case CAMSS_7280:
case CAMSS_8250:
diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
index c54185c93a8a98fc6a20fdb8e0f9f8e61bc41058..bda61bf1f573965e662c00545bc207f5a30867b9 100644
--- a/drivers/media/platform/qcom/camss/camss.c
+++ b/drivers/media/platform/qcom/camss/camss.c
@@ -5699,6 +5699,255 @@ static const struct camss_resources sdm845_resources = {
.vfe_num = ARRAY_SIZE(vfe_res_845),
};
+static const struct camss_subdev_resources csiphy_res_sm8150[] = {
+ /* CSIPHY0 */
+ {
+ .regulators = {
+ { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+ { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+ },
+ .clock = { "csiphy0", "csiphy0_timer" },
+ .clock_rate = { { 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy0" },
+ .interrupt = { "csiphy0" },
+ .csiphy = {
+ .id = 0,
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sdm845
+ }
+ },
+ /* CSIPHY1 */
+ {
+ .regulators = {
+ { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+ { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+ },
+ .clock = { "csiphy1", "csiphy1_timer" },
+ .clock_rate = { { 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy1" },
+ .interrupt = { "csiphy1" },
+ .csiphy = {
+ .id = 1,
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sdm845
+ }
+ },
+ /* CSIPHY2 */
+ {
+ .regulators = {
+ { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+ { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+ },
+ .clock = { "csiphy2", "csiphy2_timer" },
+ .clock_rate = { { 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy2" },
+ .interrupt = { "csiphy2" },
+ .csiphy = {
+ .id = 2,
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sdm845
+ }
+ },
+ /* CSIPHY3 */
+ {
+ .regulators = {
+ { .supply = "vdd-csiphy-1p2", .init_load_uA = 35000 },
+ { .supply = "vdd-csiphy-1p8", .init_load_uA = 5000 }
+ },
+ .clock = { "csiphy3", "csiphy3_timer" },
+ .clock_rate = { { 400000000 },
+ { 300000000 } },
+ .reg = { "csiphy3" },
+ .interrupt = { "csiphy3" },
+ .csiphy = {
+ .id = 3,
+ .hw_ops = &csiphy_ops_3ph_1_0,
+ .formats = &csiphy_formats_sdm845
+ }
+ },
+};
+
+static const struct camss_subdev_resources csid_res_sm8150[] = {
+ /* CSID0 */
+ {
+ .regulators = {},
+ .clock = { "vfe0_cphy_rx", "vfe0_csid" },
+ .clock_rate = { { 400000000 },
+ { 400000000, 480000000, 600000000 } },
+ .reg = { "csid0" },
+ .interrupt = { "csid0" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID1 */
+ {
+ .regulators = {},
+ .clock = { "vfe1_cphy_rx", "vfe1_csid" },
+ .clock_rate = { { 400000000 },
+ { 400000000, 480000000, 600000000 } },
+ .reg = { "csid1" },
+ .interrupt = { "csid1" },
+ .csid = {
+ .is_lite = false,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID_LITE0 */
+ {
+ .regulators = {},
+ .clock = { "vfe_lite0_cphy_rx", "vfe_lite0_csid" },
+ .clock_rate = { { 400000000 },
+ { 400000000, 480000000, 600000000 } },
+ .reg = { "csid_lite0" },
+ .interrupt = { "csid_lite0" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+ /* CSID_LITE1 */
+ {
+ .regulators = {},
+ .clock = { "vfe_lite1_cphy_rx", "vfe_lite1_csid" },
+ .clock_rate = { { 400000000 },
+ { 400000000, 480000000, 600000000 } },
+ .reg = { "csid_lite1" },
+ .interrupt = { "csid_lite1" },
+ .csid = {
+ .is_lite = true,
+ .hw_ops = &csid_ops_gen2,
+ .parent_dev_ops = &vfe_parent_dev_ops,
+ .formats = &csid_formats_gen2
+ }
+ },
+};
+
+static const struct camss_subdev_resources vfe_res_sm8150[] = {
+ /* VFE0 */
+ {
+ .regulators = {},
+ .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "slow_ahb_src",
+ "vfe0", "vfe0_axi" },
+ .clock_rate = { { 0 },
+ { 400000000 },
+ { 0 },
+ { 0 },
+ { 400000000, 558000000, 637000000, 847000000, 950000000 },
+ { 0 } },
+ .reg = { "vfe0" },
+ .interrupt = { "vfe0" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = true,
+ .pd_name = "ife0",
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE1 */
+ {
+ .regulators = {},
+ .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "slow_ahb_src",
+ "vfe1", "vfe1_axi" },
+ .clock_rate = { { 0 },
+ { 400000000 },
+ { 0 },
+ { 0 },
+ { 400000000, 558000000, 637000000, 847000000, 950000000 },
+ { 0 } },
+ .reg = { "vfe1" },
+ .interrupt = { "vfe1" },
+ .vfe = {
+ .line_num = 3,
+ .is_lite = false,
+ .has_pd = true,
+ .pd_name = "ife1",
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE_LITE0 */
+ {
+ .regulators = {},
+ .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "slow_ahb_src",
+ "vfe_lite0" },
+ .clock_rate = { { 0 },
+ { 400000000 },
+ { 0 },
+ { 0 },
+ { 320000000, 400000000, 480000000, 600000000 } },
+ .reg = { "vfe_lite0" },
+ .interrupt = { "vfe_lite0" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+ /* VFE_LITE1 */
+ {
+ .regulators = {},
+ .clock = { "gcc_axi_hf", "camnoc_axi", "cpas_ahb", "slow_ahb_src",
+ "vfe_lite1" },
+ .clock_rate = { { 0 },
+ { 400000000 },
+ { 0 },
+ { 0 },
+ { 320000000, 400000000, 480000000, 600000000 } },
+ .reg = { "vfe_lite1" },
+ .interrupt = { "vfe_lite1" },
+ .vfe = {
+ .line_num = 4,
+ .is_lite = true,
+ .hw_ops = &vfe_ops_170,
+ .formats_rdi = &vfe_formats_rdi_845,
+ .formats_pix = &vfe_formats_pix_845
+ }
+ },
+};
+
+static const struct resources_icc icc_res_sm8150[] = {
+ {
+ .name = "ahb",
+ .icc_bw_tbl.avg = 38400,
+ .icc_bw_tbl.peak = 76800,
+ },
+ {
+ .name = "hf_0",
+ .icc_bw_tbl.avg = 2097152,
+ .icc_bw_tbl.peak = 2097152,
+ },
+};
+
+static const struct camss_resources sm8150_resources = {
+ .version = CAMSS_8150,
+ .pd_name = "top",
+ .csiphy_res = csiphy_res_sm8150,
+ .csid_res = csid_res_sm8150,
+ .vfe_res = vfe_res_sm8150,
+ .icc_res = icc_res_sm8150,
+ .icc_path_num = ARRAY_SIZE(icc_res_sm8150),
+ .csiphy_num = ARRAY_SIZE(csiphy_res_sm8150),
+ .csid_num = ARRAY_SIZE(csid_res_sm8150),
+ .vfe_num = ARRAY_SIZE(vfe_res_sm8150),
+};
+
static const struct camss_resources sm6150_resources = {
.version = CAMSS_6150,
.pd_name = "top",
@@ -5824,6 +6073,7 @@ static const struct of_device_id camss_dt_match[] = {
{ .compatible = "qcom,sdm845-camss", .data = &sdm845_resources },
{ .compatible = "qcom,sm6150-camss", .data = &sm6150_resources },
{ .compatible = "qcom,sm6350-camss", .data = &sm6350_resources },
+ { .compatible = "qcom,sm8150-camss", .data = &sm8150_resources },
{ .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
{ .compatible = "qcom,sm8550-camss", .data = &sm8550_resources },
{ .compatible = "qcom,sm8650-camss", .data = &sm8650_resources },
diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
index 7dc2fd9f03e0dc2ded8e4a603d6cfec4d8e6a62b..74d8cc2921be9da7673494cd0785c8f9b90b4a3e 100644
--- a/drivers/media/platform/qcom/camss/camss.h
+++ b/drivers/media/platform/qcom/camss/camss.h
@@ -89,6 +89,7 @@ enum camss_version {
CAMSS_8x39,
CAMSS_8x53,
CAMSS_8x96,
+ CAMSS_8150,
CAMSS_8250,
CAMSS_8280XP,
CAMSS_8300,
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/8] dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 1/8] dt-bindings: media: Add qcom,sm8150-camss Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 2/8] media: qcom: camss: Add SM8150 support Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 4/8] media: i2c: Add Samsung S5K3M3 image sensor driver Gaurav Suman via B4 Relay
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add bindings for the Samsung S5K3M3 (ISOCELL 3M3) 13MP sensor, used
as the wide camera of the LG G8x ThinQ.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
.../bindings/media/i2c/samsung,s5k3m3.yaml | 104 +++++++++++++++++++++
1 file changed, 104 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..434f5d4326b726d0a65288a2a91b750e38a8706e
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml
@@ -0,0 +1,104 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/samsung,s5k3m3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung S5K3M3 Image Sensor
+
+description:
+ Samsung S5K3M3 (ISOCELL 3M3) is a 13MP image sensor controlled over a
+ serial camera control bus. The driver supports 4160x3120 at 30 frames per
+ second, RAW10 over a 4-lane MIPI D-PHY interface.
+
+maintainers:
+ - Gaurav Suman <gauravsuman007@gmail.com>
+
+allOf:
+ - $ref: /schemas/media/video-interface-devices.yaml#
+
+properties:
+ compatible:
+ const: samsung,s5k3m3
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: MCLK supply clock.
+ maxItems: 1
+
+ reset-gpios:
+ description: Active low GPIO connected to RESET pad of the sensor.
+ maxItems: 1
+
+ vdda-supply:
+ description: Analogue voltage supply, 2.8 volts.
+
+ vddd-supply:
+ description: Digital core voltage supply.
+
+ vddio-supply:
+ description: Digital I/O voltage supply, 1.8 volts.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ required:
+ - data-lanes
+ - link-frequencies
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - reset-gpios
+ - port
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera@10 {
+ compatible = "samsung,s5k3m3";
+ reg = <0x10>;
+ clocks = <&camera_mclk 0>;
+ assigned-clocks = <&camera_mclk 0>;
+ assigned-clock-rates = <19200000>;
+ reset-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>;
+ vdda-supply = <&vreg_2p8>;
+ vddd-supply = <&vreg_1p05>;
+ vddio-supply = <&vreg_1p8>;
+ orientation = <0>;
+ rotation = <90>;
+
+ port {
+ endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <595200000>;
+ remote-endpoint = <&csiphy_ep>;
+ };
+ };
+ };
+ };
+...
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 4/8] media: i2c: Add Samsung S5K3M3 image sensor driver
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
` (2 preceding siblings ...)
2026-11-09 22:38 ` [PATCH 3/8] dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 5/8] dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor Gaurav Suman via B4 Relay
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add a V4L2 sub-device driver for the Samsung S5K3M3 13MP sensor. It
supports one mode, 4160x3120 RAW10 at 30 fps on four CSI-2 lanes at
1190.4 Mbps per lane, from a 19.2 MHz MCLK, with exposure, analogue
gain, vertical blanking and test pattern controls.
The register settings come from the LG G8x ThinQ vendor camera
module data (com.qti.sensormodule.s5k3m3.bin): a short initialisation
sequence (soft reset, then 3 ms) and the full-resolution mode. The
S5K3M5 driver's settings make the sensor stream but nothing reaches
the CSI receiver, so a separate driver is used for now; folding it
into s5k3m5.c as a variant could be done later.
Tested on an LG G8x ThinQ (SM8150, CSIPHY1).
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
MAINTAINERS | 8 +
drivers/media/i2c/Kconfig | 10 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/s5k3m3-regs.h | 71 +++++++
drivers/media/i2c/s5k3m3.c | 451 ++++++++++++++++++++++++++++++++++++++++
5 files changed, 541 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index aa647f5d37ddbe68343b59eac64fe7831e219f04..fb12d4c0c22e957c6babb9d4b22105fa06047772 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22009,6 +22009,14 @@ S: Maintained
F: include/linux/delayacct.h
F: kernel/delayacct.c
+SAMSUNG S5K3M3 CAMERA DRIVER
+M: Gaurav Suman <gauravsuman007@gmail.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml
+F: drivers/media/i2c/s5k3m3-regs.h
+F: drivers/media/i2c/s5k3m3.c
+
TASK DELAY MONITORING TOOLS
M: Andrew Morton <akpm@linux-foundation.org>
M: Wang Yaxin <wang.yaxin@zte.com.cn>
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 11c30252540e9ceb0bef6c60f1d4a89a9e5928f4..9f797ab00fe7ef0b28080d1fd2b07c4f5d19402d 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -836,6 +836,16 @@ config VIDEO_S5C73M3
This is a V4L2 sensor driver for Samsung S5C73M3
8 Mpixel camera.
+config VIDEO_S5K3M3
+ tristate "Samsung S5K3M3 sensor support"
+ select V4L2_CCI_I2C
+ help
+ This is a V4L2 sensor driver for Samsung S5K3M3 13MP raw
+ camera sensor.
+
+ To compile this driver as a module, choose M here: the
+ module will be called s5k3m3.
+
config VIDEO_S5K3M5
tristate "Samsung S5K3M5 sensor support"
select V4L2_CCI_I2C
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 59e31af457cd3e8bcc5c015b7a0ca9f3be0cff4f..2ecb65cf4fd036d9109abdf450f8ebe4b945de42 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -133,6 +133,7 @@ obj-$(CONFIG_VIDEO_RDACM20) += rdacm20.o
obj-$(CONFIG_VIDEO_RDACM21) += rdacm21.o
obj-$(CONFIG_VIDEO_RJ54N1) += rj54n1cb0c.o
obj-$(CONFIG_VIDEO_S5C73M3) += s5c73m3/
+obj-$(CONFIG_VIDEO_S5K3M3) += s5k3m3.o
obj-$(CONFIG_VIDEO_S5K3M5) += s5k3m5.o
obj-$(CONFIG_VIDEO_S5K5BAF) += s5k5baf.o
obj-$(CONFIG_VIDEO_S5K6A3) += s5k6a3.o
diff --git a/drivers/media/i2c/s5k3m3-regs.h b/drivers/media/i2c/s5k3m3-regs.h
new file mode 100644
index 0000000000000000000000000000000000000000..d21b6c9074e8e4f2cc18d57a6d0048bb0864d8a9
--- /dev/null
+++ b/drivers/media/i2c/s5k3m3-regs.h
@@ -0,0 +1,71 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Register settings from the LG G8x ThinQ vendor camera module data
+ * (com.qti.sensormodule.s5k3m3.bin). 16-bit address and data; the third
+ * column is a delay in microseconds after the write.
+ */
+static const struct cam_reg s5k3m3_init_regs[] = {
+ { 0xfcfc, 0x4000, 0 },
+ { 0x6010, 0x0001, 3000 },
+ { 0xfcfc, 0x4000, 0 },
+ { 0x6214, 0x7971, 0 },
+ { 0x6218, 0x7150, 0 },
+ { 0x0300, 0x0004, 0 },
+ { 0x0302, 0x0001, 0 },
+ { 0x0304, 0x0006, 0 },
+ { 0x0308, 0x0008, 0 },
+ { 0x030a, 0x0001, 0 },
+ { 0x030c, 0x0004, 0 },
+ { 0x3644, 0x0060, 0 },
+ { 0x0216, 0x0000, 0 },
+ { 0xf496, 0x0048, 0 },
+ { 0x1118, 0x43c8, 0 },
+ { 0x1124, 0x43c8, 0 },
+ { 0x3058, 0x0000, 0 },
+};
+
+static const struct cam_reg s5k3m3_mode_regs[] = {
+ { 0xfcfc, 0x4000, 0 },
+ { 0x6214, 0x7971, 0 },
+ { 0x6218, 0x7150, 0 },
+ { 0x0136, 0x1333, 0 },
+ { 0x0306, 0x0096, 0 },
+ { 0x030c, 0x0003, 0 },
+ { 0x030e, 0x005d, 0 },
+ { 0x0344, 0x0020, 0 },
+ { 0x0346, 0x0008, 0 },
+ { 0x0348, 0x105f, 0 },
+ { 0x034a, 0x0c37, 0 },
+ { 0x034c, 0x1040, 0 },
+ { 0x034e, 0x0c30, 0 },
+ { 0x0340, 0x0cbc, 0 },
+ { 0x0342, 0x1328, 0 },
+ { 0x3000, 0x0001, 0 },
+ { 0xf440, 0x002f, 0 },
+ { 0xf494, 0x0030, 0 },
+ { 0x3604, 0x0000, 0 },
+ { 0xf4cc, 0x0029, 0 },
+ { 0xf4ce, 0x002c, 0 },
+ { 0xf4d0, 0x0034, 0 },
+ { 0xf4d2, 0x0035, 0 },
+ { 0xf4d4, 0x0038, 0 },
+ { 0xf4d6, 0x0039, 0 },
+ { 0xf4d8, 0x0034, 0 },
+ { 0xf4da, 0x0035, 0 },
+ { 0xf4dc, 0x0038, 0 },
+ { 0xf4de, 0x0039, 0 },
+ { 0x0200, 0x0618, 0 },
+ { 0x0202, 0x0d27, 0 },
+ { 0x021e, 0x0400, 0 },
+ { 0x021c, 0x0000, 0 },
+ { 0x0900, 0x0011, 0 },
+ { 0x0380, 0x0001, 0 },
+ { 0x0382, 0x0001, 0 },
+ { 0x0384, 0x0001, 0 },
+ { 0x0386, 0x0001, 0 },
+ { 0x0400, 0x0000, 0 },
+ { 0x0404, 0x0010, 0 },
+ { 0x309c, 0x0001, 0 },
+ { 0x0114, 0x0300, 0 },
+ { 0x0216, 0x0000, 0 },
+};
diff --git a/drivers/media/i2c/s5k3m3.c b/drivers/media/i2c/s5k3m3.c
new file mode 100644
index 0000000000000000000000000000000000000000..5436178c5e35538ab2bb8b162f4c2beb769a9c07
--- /dev/null
+++ b/drivers/media/i2c/s5k3m3.c
@@ -0,0 +1,451 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung S5K3M3 13 MP sensor (LG G8x rear wide camera).
+ * Only the full 4160x3120 @ 30 fps 4-lane RAW10 mode is supported.
+ * Register tables come from LG's vendor CamX sensor module (see
+ * s5k3m3-regs.h); the sensor runs from a 19.2 MHz MCLK.
+ */
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <media/v4l2-cci.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
+
+struct cam_reg { u16 addr, val, delay_us; };
+#include "s5k3m3-regs.h"
+
+#define S5K3M3_REG_CHIP_ID CCI_REG16(0x0000)
+#define S5K3M3_CHIP_ID 0x30d3
+#define S5K3M3_REG_MODE_SELECT CCI_REG16(0x0100)
+#define S5K3M3_REG_GROUP_HOLD CCI_REG16(0x0104)
+#define S5K3M3_REG_EXPOSURE CCI_REG16(0x0202)
+#define S5K3M3_REG_AGAIN CCI_REG16(0x0204)
+#define S5K3M3_REG_FLL CCI_REG16(0x0340)
+#define S5K3M3_REG_TEST_PATTERN CCI_REG16(0x0600)
+
+#define S5K3M3_MCLK 19200000
+#define S5K3M3_LINK_FREQ 595200000LL /* 1190.4 Mbps per lane */
+#define S5K3M3_WIDTH 4160
+#define S5K3M3_HEIGHT 3120
+#define S5K3M3_LLP 4904
+#define S5K3M3_FLL 3260 /* 30 fps */
+#define S5K3M3_PIXEL_RATE ((u64)S5K3M3_LLP * S5K3M3_FLL * 30)
+#define S5K3M3_FLL_MAX 0xfff0
+#define S5K3M3_EXP_MARGIN 8
+#define S5K3M3_AGAIN_MIN 0x20 /* 1x */
+#define S5K3M3_AGAIN_MAX 0x200 /* 16x */
+#define S5K3M3_MBUS_CODE MEDIA_BUS_FMT_SGRBG10_1X10
+
+static const s64 s5k3m3_link_freqs[] = { S5K3M3_LINK_FREQ };
+static const char * const s5k3m3_supplies[] = { "vddio", "vdda", "vddd" };
+static const char * const s5k3m3_tp_menu[] = {
+ "Disabled", "Solid Colour", "Colour Bars", "Fade to Grey", "PN9",
+};
+
+struct s5k3m3 {
+ struct device *dev;
+ struct regmap *regmap;
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+ struct clk *mclk;
+ struct gpio_desc *reset;
+ struct regulator_bulk_data supplies[ARRAY_SIZE(s5k3m3_supplies)];
+ struct v4l2_ctrl_handler ctrls;
+ struct v4l2_ctrl *exposure, *vblank;
+};
+
+static inline struct s5k3m3 *to_s5k3m3(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct s5k3m3, sd);
+}
+
+static int s5k3m3_write_table(struct s5k3m3 *s, const struct cam_reg *t, size_t n)
+{
+ int ret = 0;
+ size_t i;
+
+ for (i = 0; i < n && !ret; i++) {
+ cci_write(s->regmap, CCI_REG16(t[i].addr), t[i].val, &ret);
+ if (t[i].delay_us)
+ fsleep(t[i].delay_us);
+ }
+ return ret;
+}
+
+static int s5k3m3_power_on(struct device *dev)
+{
+ struct s5k3m3 *s = to_s5k3m3(dev_get_drvdata(dev));
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(s->supplies), s->supplies);
+ if (ret)
+ return ret;
+ ret = clk_prepare_enable(s->mclk);
+ if (ret) {
+ regulator_bulk_disable(ARRAY_SIZE(s->supplies), s->supplies);
+ return ret;
+ }
+ usleep_range(1000, 1500);
+ gpiod_set_value_cansleep(s->reset, 0); /* out of reset */
+ usleep_range(10000, 12000);
+ return 0;
+}
+
+static int s5k3m3_power_off(struct device *dev)
+{
+ struct s5k3m3 *s = to_s5k3m3(dev_get_drvdata(dev));
+
+ gpiod_set_value_cansleep(s->reset, 1);
+ clk_disable_unprepare(s->mclk);
+ regulator_bulk_disable(ARRAY_SIZE(s->supplies), s->supplies);
+ return 0;
+}
+
+static int s5k3m3_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct s5k3m3 *s = container_of(ctrl->handler, struct s5k3m3, ctrls);
+ int ret = 0;
+
+ if (ctrl->id == V4L2_CID_VBLANK) {
+ s64 max = S5K3M3_HEIGHT + ctrl->val - S5K3M3_EXP_MARGIN;
+
+ __v4l2_ctrl_modify_range(s->exposure, s->exposure->minimum, max,
+ 1, min(s->exposure->val, (s32)max));
+ }
+ if (!pm_runtime_get_if_in_use(s->dev))
+ return 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_EXPOSURE:
+ cci_write(s->regmap, S5K3M3_REG_EXPOSURE, ctrl->val, &ret);
+ break;
+ case V4L2_CID_ANALOGUE_GAIN:
+ cci_write(s->regmap, S5K3M3_REG_AGAIN, ctrl->val, &ret);
+ break;
+ case V4L2_CID_VBLANK:
+ cci_write(s->regmap, S5K3M3_REG_FLL, S5K3M3_HEIGHT + ctrl->val, &ret);
+ break;
+ case V4L2_CID_TEST_PATTERN:
+ cci_write(s->regmap, S5K3M3_REG_TEST_PATTERN, ctrl->val, &ret);
+ break;
+ }
+ pm_runtime_put(s->dev);
+ return ret;
+}
+
+static const struct v4l2_ctrl_ops s5k3m3_ctrl_ops = { .s_ctrl = s5k3m3_set_ctrl };
+
+static int s5k3m3_init_ctrls(struct s5k3m3 *s)
+{
+ struct v4l2_ctrl_handler *h = &s->ctrls;
+ struct v4l2_fwnode_device_properties props;
+ struct v4l2_ctrl *c;
+ u32 vb = S5K3M3_FLL - S5K3M3_HEIGHT, hb = S5K3M3_LLP - S5K3M3_WIDTH;
+ int ret;
+
+ v4l2_ctrl_handler_init(h, 10);
+ c = v4l2_ctrl_new_int_menu(h, &s5k3m3_ctrl_ops, V4L2_CID_LINK_FREQ, 0, 0,
+ s5k3m3_link_freqs);
+ if (c)
+ c->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ v4l2_ctrl_new_std(h, &s5k3m3_ctrl_ops, V4L2_CID_PIXEL_RATE,
+ S5K3M3_PIXEL_RATE, S5K3M3_PIXEL_RATE, 1, S5K3M3_PIXEL_RATE);
+ s->vblank = v4l2_ctrl_new_std(h, &s5k3m3_ctrl_ops, V4L2_CID_VBLANK, vb,
+ S5K3M3_FLL_MAX - S5K3M3_HEIGHT, 1, vb);
+ c = v4l2_ctrl_new_std(h, &s5k3m3_ctrl_ops, V4L2_CID_HBLANK, hb, hb, 1, hb);
+ if (c)
+ c->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ /* start at full-frame exposure, software AGC converges from there */
+ s->exposure = v4l2_ctrl_new_std(h, &s5k3m3_ctrl_ops, V4L2_CID_EXPOSURE, 4,
+ S5K3M3_FLL - S5K3M3_EXP_MARGIN, 1,
+ S5K3M3_FLL - S5K3M3_EXP_MARGIN);
+ v4l2_ctrl_new_std(h, &s5k3m3_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
+ S5K3M3_AGAIN_MIN, S5K3M3_AGAIN_MAX, 1, S5K3M3_AGAIN_MIN * 4);
+ v4l2_ctrl_new_std_menu_items(h, &s5k3m3_ctrl_ops, V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(s5k3m3_tp_menu) - 1, 0, 0, s5k3m3_tp_menu);
+ ret = v4l2_fwnode_device_parse(s->dev, &props);
+ if (!ret)
+ v4l2_ctrl_new_fwnode_properties(h, &s5k3m3_ctrl_ops, &props);
+ if (h->error)
+ return h->error;
+ s->sd.ctrl_handler = h;
+ return 0;
+}
+
+static int s5k3m3_enable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ u32 pad, u64 streams)
+{
+ struct s5k3m3 *s = to_s5k3m3(sd);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(s->dev);
+ if (ret)
+ return ret;
+ ret = s5k3m3_write_table(s, s5k3m3_init_regs, ARRAY_SIZE(s5k3m3_init_regs));
+ if (!ret)
+ ret = s5k3m3_write_table(s, s5k3m3_mode_regs,
+ ARRAY_SIZE(s5k3m3_mode_regs));
+ if (!ret)
+ ret = __v4l2_ctrl_handler_setup(&s->ctrls);
+ if (!ret)
+ ret = cci_write(s->regmap, S5K3M3_REG_MODE_SELECT, 0x0100, NULL);
+ if (ret) {
+ dev_err(s->dev, "stream on failed: %d\n", ret);
+ pm_runtime_put(s->dev);
+ }
+ return ret;
+}
+
+static int s5k3m3_disable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ u32 pad, u64 streams)
+{
+ struct s5k3m3 *s = to_s5k3m3(sd);
+
+ cci_write(s->regmap, S5K3M3_REG_MODE_SELECT, 0, NULL);
+ pm_runtime_put(s->dev);
+ return 0;
+}
+
+static void s5k3m3_fill_fmt(struct v4l2_mbus_framefmt *f)
+{
+ f->code = S5K3M3_MBUS_CODE;
+ f->width = S5K3M3_WIDTH;
+ f->height = S5K3M3_HEIGHT;
+ f->field = V4L2_FIELD_NONE;
+ f->colorspace = V4L2_COLORSPACE_RAW;
+ f->ycbcr_enc = V4L2_YCBCR_ENC_601;
+ f->quantization = V4L2_QUANTIZATION_FULL_RANGE;
+ f->xfer_func = V4L2_XFER_FUNC_NONE;
+}
+
+static int s5k3m3_set_fmt(struct v4l2_subdev *sd,
+ const struct v4l2_subdev_client_info *ci,
+ struct v4l2_subdev_state *st,
+ struct v4l2_subdev_format *fmt)
+{
+ s5k3m3_fill_fmt(&fmt->format);
+ *v4l2_subdev_state_get_format(st, 0) = fmt->format;
+ return 0;
+}
+
+static int s5k3m3_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index)
+ return -EINVAL;
+ code->code = S5K3M3_MBUS_CODE;
+ return 0;
+}
+
+static int s5k3m3_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ if (fse->index || fse->code != S5K3M3_MBUS_CODE)
+ return -EINVAL;
+ fse->min_width = S5K3M3_WIDTH;
+ fse->max_width = S5K3M3_WIDTH;
+ fse->min_height = S5K3M3_HEIGHT;
+ fse->max_height = S5K3M3_HEIGHT;
+ return 0;
+}
+
+static int s5k3m3_get_selection(struct v4l2_subdev *sd,
+ const struct v4l2_subdev_client_info *ci,
+ struct v4l2_subdev_state *st,
+ struct v4l2_subdev_selection *sel)
+{
+ switch (sel->target) {
+ case V4L2_SEL_TGT_CROP: /* analogue crop of the mode (0x0344..0x034a) */
+ sel->r.left = 32;
+ sel->r.top = 8;
+ sel->r.width = 4160;
+ sel->r.height = 3120;
+ return 0;
+ case V4L2_SEL_TGT_CROP_DEFAULT:
+ case V4L2_SEL_TGT_CROP_BOUNDS: /* active pixel array */
+ case V4L2_SEL_TGT_NATIVE_SIZE:
+ sel->r.left = 0;
+ sel->r.top = 0;
+ sel->r.width = 4224;
+ sel->r.height = 3136;
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static int s5k3m3_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *st)
+{
+ s5k3m3_fill_fmt(v4l2_subdev_state_get_format(st, 0));
+ return 0;
+}
+
+static const struct v4l2_subdev_pad_ops s5k3m3_pad_ops = {
+ .enum_mbus_code = s5k3m3_enum_mbus_code,
+ .enum_frame_size = s5k3m3_enum_frame_size,
+ .get_fmt = v4l2_subdev_get_fmt,
+ .set_fmt = s5k3m3_set_fmt,
+ .get_selection = s5k3m3_get_selection,
+ .enable_streams = s5k3m3_enable_streams,
+ .disable_streams = s5k3m3_disable_streams,
+};
+
+static const struct v4l2_subdev_video_ops s5k3m3_video_ops = {
+ .s_stream = v4l2_subdev_s_stream_helper,
+};
+
+static const struct v4l2_subdev_ops s5k3m3_ops = {
+ .video = &s5k3m3_video_ops,
+ .pad = &s5k3m3_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops s5k3m3_internal_ops = {
+ .init_state = s5k3m3_init_state,
+};
+
+static int s5k3m3_check_hw(struct s5k3m3 *s)
+{
+ struct fwnode_handle *ep;
+ struct v4l2_fwnode_endpoint bus = { .bus_type = V4L2_MBUS_CSI2_DPHY };
+ u64 id = 0;
+ int ret;
+
+ ep = fwnode_graph_get_next_endpoint(dev_fwnode(s->dev), NULL);
+ if (!ep)
+ return -EPROBE_DEFER;
+ ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus);
+ fwnode_handle_put(ep);
+ if (ret)
+ return ret;
+ if (bus.bus.mipi_csi2.num_data_lanes != 4)
+ ret = dev_err_probe(s->dev, -EINVAL, "need 4 data lanes\n");
+ v4l2_fwnode_endpoint_free(&bus);
+ if (ret)
+ return ret;
+
+ ret = s5k3m3_power_on(s->dev);
+ if (ret)
+ return ret;
+ cci_read(s->regmap, S5K3M3_REG_CHIP_ID, &id, &ret);
+ if (!ret && id != S5K3M3_CHIP_ID)
+ ret = -ENODEV;
+ if (ret)
+ dev_err(s->dev, "chip id 0x%llx, error %d\n", id, ret);
+ return ret;
+}
+
+static int s5k3m3_probe(struct i2c_client *client)
+{
+ struct device *dev = &client->dev;
+ struct s5k3m3 *s;
+ unsigned int i;
+ int ret;
+
+ s = devm_kzalloc(dev, sizeof(*s), GFP_KERNEL);
+ if (!s)
+ return -ENOMEM;
+ s->dev = dev;
+ v4l2_i2c_subdev_init(&s->sd, client, &s5k3m3_ops);
+ s->sd.internal_ops = &s5k3m3_internal_ops;
+
+ s->regmap = devm_cci_regmap_init_i2c(client, 16);
+ if (IS_ERR(s->regmap))
+ return PTR_ERR(s->regmap);
+ s->mclk = devm_clk_get(dev, NULL);
+ if (IS_ERR(s->mclk))
+ return dev_err_probe(dev, PTR_ERR(s->mclk), "no clock\n");
+ ret = clk_set_rate(s->mclk, S5K3M3_MCLK);
+ if (ret)
+ return ret;
+ s->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(s->reset))
+ return dev_err_probe(dev, PTR_ERR(s->reset), "no reset gpio\n");
+ for (i = 0; i < ARRAY_SIZE(s5k3m3_supplies); i++)
+ s->supplies[i].supply = s5k3m3_supplies[i];
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(s->supplies), s->supplies);
+ if (ret)
+ return ret;
+
+ ret = s5k3m3_check_hw(s);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ s5k3m3_power_off(dev);
+ return ret;
+ }
+
+ ret = s5k3m3_init_ctrls(s);
+ if (ret)
+ goto err_power;
+ s->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ s->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
+ s->pad.flags = MEDIA_PAD_FL_SOURCE;
+ ret = media_entity_pads_init(&s->sd.entity, 1, &s->pad);
+ if (ret)
+ goto err_ctrls;
+ s->sd.state_lock = s->ctrls.lock;
+ ret = v4l2_subdev_init_finalize(&s->sd);
+ if (ret)
+ goto err_entity;
+
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ ret = v4l2_async_register_subdev_sensor(&s->sd);
+ if (ret)
+ goto err_pm;
+ pm_runtime_idle(dev);
+ return 0;
+
+err_pm:
+ pm_runtime_disable(dev);
+ pm_runtime_set_suspended(dev);
+ v4l2_subdev_cleanup(&s->sd);
+err_entity:
+ media_entity_cleanup(&s->sd.entity);
+err_ctrls:
+ v4l2_ctrl_handler_free(&s->ctrls);
+err_power:
+ s5k3m3_power_off(dev);
+ return ret;
+}
+
+static void s5k3m3_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct s5k3m3 *s = to_s5k3m3(sd);
+
+ v4l2_async_unregister_subdev(sd);
+ v4l2_subdev_cleanup(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_ctrl_handler_free(&s->ctrls);
+ pm_runtime_disable(&client->dev);
+ if (!pm_runtime_status_suspended(&client->dev))
+ s5k3m3_power_off(&client->dev);
+ pm_runtime_set_suspended(&client->dev);
+}
+
+static DEFINE_RUNTIME_DEV_PM_OPS(s5k3m3_pm_ops, s5k3m3_power_off, s5k3m3_power_on, NULL);
+
+static const struct of_device_id s5k3m3_of_match[] = {
+ { .compatible = "samsung,s5k3m3" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, s5k3m3_of_match);
+
+static struct i2c_driver s5k3m3_driver = {
+ .driver = {
+ .name = "s5k3m3",
+ .of_match_table = s5k3m3_of_match,
+ .pm = pm_ptr(&s5k3m3_pm_ops),
+ },
+ .probe = s5k3m3_probe,
+ .remove = s5k3m3_remove,
+};
+module_i2c_driver(s5k3m3_driver);
+
+MODULE_DESCRIPTION("Samsung S5K3M3 image sensor driver");
+MODULE_LICENSE("GPL");
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 5/8] dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
` (3 preceding siblings ...)
2026-11-09 22:38 ` [PATCH 4/8] media: i2c: Add Samsung S5K3M3 image sensor driver Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 6/8] media: i2c: Add Samsung S5KGD1 image sensor driver Gaurav Suman via B4 Relay
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add bindings for the Samsung S5KGD1 (ISOCELL GD1) 32MP quad-Bayer
sensor, used as the front camera of the LG G8x ThinQ.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
.../bindings/media/i2c/samsung,s5kgd1.yaml | 105 +++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/samsung,s5kgd1.yaml b/Documentation/devicetree/bindings/media/i2c/samsung,s5kgd1.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..4b01f1057afe70665bb445c8395a6deaabc8bd9d
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/samsung,s5kgd1.yaml
@@ -0,0 +1,105 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/samsung,s5kgd1.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung S5KGD1 Image Sensor
+
+description:
+ Samsung S5KGD1 (ISOCELL GD1) is a 32MP image sensor with a quad-Bayer
+ (tetracell) colour filter array, controlled over a serial camera control
+ bus. The driver supports the 2x2 binned 3264x2448 mode at 30 frames per
+ second, RAW10 over a 4-lane MIPI D-PHY interface.
+
+maintainers:
+ - Gaurav Suman <gauravsuman007@gmail.com>
+
+allOf:
+ - $ref: /schemas/media/video-interface-devices.yaml#
+
+properties:
+ compatible:
+ const: samsung,s5kgd1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ description: MCLK supply clock.
+ maxItems: 1
+
+ reset-gpios:
+ description: Active low GPIO connected to RESET pad of the sensor.
+ maxItems: 1
+
+ vdda-supply:
+ description: Analogue voltage supply, 2.8 volts.
+
+ vddd-supply:
+ description: Digital core voltage supply.
+
+ vddio-supply:
+ description: Digital I/O voltage supply, 1.8 volts.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ properties:
+ endpoint:
+ $ref: /schemas/media/video-interfaces.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ items:
+ - const: 1
+ - const: 2
+ - const: 3
+ - const: 4
+
+ required:
+ - data-lanes
+ - link-frequencies
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - reset-gpios
+ - port
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera@2d {
+ compatible = "samsung,s5kgd1";
+ reg = <0x2d>;
+ clocks = <&camera_mclk 0>;
+ assigned-clocks = <&camera_mclk 0>;
+ assigned-clock-rates = <19200000>;
+ reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
+ vdda-supply = <&vreg_2p8>;
+ vddd-supply = <&vreg_1p05>;
+ vddio-supply = <&vreg_1p8>;
+ orientation = <0>;
+ rotation = <90>;
+
+ port {
+ endpoint {
+ data-lanes = <1 2 3 4>;
+ link-frequencies = /bits/ 64 <380800000>;
+ remote-endpoint = <&csiphy_ep>;
+ };
+ };
+ };
+ };
+...
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 6/8] media: i2c: Add Samsung S5KGD1 image sensor driver
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
` (4 preceding siblings ...)
2026-11-09 22:38 ` [PATCH 5/8] dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 7/8] dt-bindings: media: i2c: Add ON Semiconductor LC898123F40 Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 8/8] media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver Gaurav Suman via B4 Relay
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add a V4L2 sub-device driver for the Samsung S5KGD1 32MP quad-Bayer
sensor. It supports the 2x2 binned 3264x2448 RAW10 mode at 30 fps on
four CSI-2 lanes at 761.6 Mbps per lane, from a 19.2 MHz MCLK, with
exposure, analogue gain, vertical blanking and test pattern controls.
The register settings come from the LG G8x ThinQ vendor camera
module data (com.qti.sensormodule.s5kgd1_front.bin). The
initialisation sequence is long (5474 writes, mostly a firmware patch
through the indirect 0x6028/0x602a/0x6f12 window) and is written at
every stream start.
Tested on an LG G8x ThinQ (SM8150, CSIPHY2).
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
MAINTAINERS | 8 +
drivers/media/i2c/Kconfig | 10 +
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/s5kgd1-regs.h | 6137 +++++++++++++++++++++++++++++++++++++++
drivers/media/i2c/s5kgd1.c | 451 +++
5 files changed, 6607 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fb12d4c0c22e957c6babb9d4b22105fa06047772..b13cf3ad43a185802b31a89176fd85d5ba2c6d1b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22017,6 +22017,14 @@ F: Documentation/devicetree/bindings/media/i2c/samsung,s5k3m3.yaml
F: drivers/media/i2c/s5k3m3-regs.h
F: drivers/media/i2c/s5k3m3.c
+SAMSUNG S5KGD1 CAMERA DRIVER
+M: Gaurav Suman <gauravsuman007@gmail.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/media/i2c/samsung,s5kgd1.yaml
+F: drivers/media/i2c/s5kgd1-regs.h
+F: drivers/media/i2c/s5kgd1.c
+
TASK DELAY MONITORING TOOLS
M: Andrew Morton <akpm@linux-foundation.org>
M: Wang Yaxin <wang.yaxin@zte.com.cn>
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 9f797ab00fe7ef0b28080d1fd2b07c4f5d19402d..2477db9a17fac4d5278e2428f9b840a0698e56af 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -868,6 +868,16 @@ config VIDEO_S5K6A3
This is a V4L2 sensor driver for Samsung S5K6A3 raw
camera sensor.
+config VIDEO_S5KGD1
+ tristate "Samsung S5KGD1 sensor support"
+ select V4L2_CCI_I2C
+ help
+ This is a V4L2 sensor driver for Samsung S5KGD1 32MP quad-Bayer
+ raw camera sensor.
+
+ To compile this driver as a module, choose M here: the
+ module will be called s5kgd1.
+
config VIDEO_S5KJN1
tristate "Samsung S5KJN1 sensor support"
select V4L2_CCI_I2C
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 2ecb65cf4fd036d9109abdf450f8ebe4b945de42..7e714dbcbf69d55576be1abe76311c3478511201 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -137,6 +137,7 @@ obj-$(CONFIG_VIDEO_S5K3M3) += s5k3m3.o
obj-$(CONFIG_VIDEO_S5K3M5) += s5k3m5.o
obj-$(CONFIG_VIDEO_S5K5BAF) += s5k5baf.o
obj-$(CONFIG_VIDEO_S5K6A3) += s5k6a3.o
+obj-$(CONFIG_VIDEO_S5KGD1) += s5kgd1.o
obj-$(CONFIG_VIDEO_S5KJN1) += s5kjn1.o
obj-$(CONFIG_VIDEO_S5KJN5) += s5kjn5.o
obj-$(CONFIG_VIDEO_SAA6588) += saa6588.o
diff --git a/drivers/media/i2c/s5kgd1-regs.h b/drivers/media/i2c/s5kgd1-regs.h
new file mode 100644
index 0000000000000000000000000000000000000000..5b35cd2391b555090818c2e9dba2984901b7ea8f
--- /dev/null
+++ b/drivers/media/i2c/s5kgd1-regs.h
@@ -0,0 +1,6137 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Register settings from the LG G8x ThinQ vendor camera module data
+ * (com.qti.sensormodule.s5kgd1_front.bin). 16-bit address and data; the third
+ * column is a delay in microseconds after the write.
+ */
+static const struct cam_reg s5kgd1_init_regs[] = {
+ { 0x6028, 0x2001, 0 },
+ { 0x602a, 0x518c, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x07f0, 0 },
+ { 0x6f12, 0x39bc, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x2de9, 0 },
+ { 0x6f12, 0xff4f, 0 },
+ { 0x6f12, 0x0446, 0 },
+ { 0x6f12, 0x0878, 0 },
+ { 0x6f12, 0x85b0, 0 },
+ { 0x6f12, 0x9946, 0 },
+ { 0x6f12, 0x0028, 0 },
+ { 0x6f12, 0x7dd0, 0 },
+ { 0x6f12, 0x01f0, 0 },
+ { 0x6f12, 0x40fa, 0 },
+ { 0x6f12, 0x0028, 0 },
+ { 0x6f12, 0x79d0, 0 },
+ { 0x6f12, 0x0025, 0 },
+ { 0x6f12, 0x01f0, 0 },
+ { 0x6f12, 0x3bfa, 0 },
+ { 0x6f12, 0x0328, 0 },
+ { 0x6f12, 0x7cd0, 0 },
+ { 0x6f12, 0x01f0, 0 },
+ { 0x6f12, 0x3cfa, 0 },
+ { 0x6f12, 0x070a, 0 },
+ { 0x6f12, 0xb5fa, 0 },
+ { 0x6f12, 0x85f0, 0 },
+ { 0x6f12, 0xc0f1, 0 },
+ { 0x6f12, 0x2006, 0 },
+ { 0x6f12, 0x092e, 0 },
+ { 0x6f12, 0x00d2, 0 },
+ { 0x6f12, 0x0926, 0 },
+ { 0x6f12, 0x093e, 0 },
+ { 0x6f12, 0xf540, 0 },
+ { 0x6f12, 0x05f0, 0 },
+ { 0x6f12, 0xff0a, 0 },
+ { 0x6f12, 0xb7fa, 0 },
+ { 0x6f12, 0x87f0, 0 },
+ { 0x6f12, 0xc0f1, 0 },
+ { 0x6f12, 0x2005, 0 },
+ { 0x6f12, 0x092d, 0 },
+ { 0x6f12, 0x00d2, 0 },
+ { 0x6f12, 0x0925, 0 },
+ { 0x6f12, 0x093d, 0 },
+ { 0x6f12, 0xef40, 0 },
+ { 0x6f12, 0x07f0, 0 },
+ { 0x6f12, 0xff08, 0 },
+ { 0x6f12, 0x0021, 0 },
+ { 0x6f12, 0xfe4b, 0 },
+ { 0x6f12, 0xb3f8, 0 },
+ { 0x6f12, 0x4202, 0 },
+ { 0x6f12, 0x5fea, 0 },
+ { 0x6f12, 0x000b, 0 },
+ { 0x6f12, 0x06d0, 0 },
+ { 0x6f12, 0xfc49, 0 },
+ { 0x6f12, 0x01eb, 0 },
+ { 0x6f12, 0x0910, 0 },
+ { 0x6f12, 0x00f5, 0 },
+ { 0x6f12, 0x0050, 0 },
+ { 0x6f12, 0xd0f8, 0 },
+ { 0x6f12, 0x641a, 0 },
+ { 0x6f12, 0x09eb, 0 },
+ { 0x6f12, 0x8902, 0 },
+ { 0x6f12, 0x0020, 0 },
+ { 0x6f12, 0xee46, 0 },
+ { 0x6f12, 0x03eb, 0 },
+ { 0x6f12, 0xc209, 0 },
+ { 0x6f12, 0x00eb, 0 },
+ { 0x6f12, 0x8003, 0 },
+ { 0x6f12, 0x09eb, 0 },
+ { 0x6f12, 0x4302, 0 },
+ { 0x6f12, 0x02eb, 0 },
+ { 0x6f12, 0x4507, 0 },
+ { 0x6f12, 0xb7f9, 0 },
+ { 0x6f12, 0x8230, 0 },
+ { 0x6f12, 0xb7f9, 0 },
+ { 0x6f12, 0x84c0, 0 },
+ { 0x6f12, 0x02eb, 0 },
+ { 0x6f12, 0x4607, 0 },
+ { 0x6f12, 0xaceb, 0 },
+ { 0x6f12, 0x030c, 0 },
+ { 0x6f12, 0xb7f9, 0 },
+ { 0x6f12, 0x0a20, 0 },
+ { 0x6f12, 0xb7f9, 0 },
+ { 0x6f12, 0x0c70, 0 },
+ { 0x6f12, 0x0cfb, 0 },
+ { 0x6f12, 0x08fc, 0 },
+ { 0x6f12, 0xbf1a, 0 },
+ { 0x6f12, 0x07fb, 0 },
+ { 0x6f12, 0x0af7, 0 },
+ { 0x6f12, 0x0cf1, 0 },
+ { 0x6f12, 0x800c, 0 },
+ { 0x6f12, 0x8037, 0 },
+ { 0x6f12, 0x03eb, 0 },
+ { 0x6f12, 0x2c23, 0 },
+ { 0x6f12, 0x02eb, 0 },
+ { 0x6f12, 0x2722, 0 },
+ { 0x6f12, 0x1a44, 0 },
+ { 0x6f12, 0x4ef8, 0 },
+ { 0x6f12, 0x2020, 0 },
+ { 0x6f12, 0x079f, 0 },
+ { 0x6f12, 0xba40, 0 },
+ { 0x6f12, 0x4ef8, 0 },
+ { 0x6f12, 0x2020, 0 },
+ { 0x6f12, 0x401c, 0 },
+ { 0x6f12, 0x0428, 0 },
+ { 0x6f12, 0xd7d3, 0 },
+ { 0x6f12, 0xbbf1, 0 },
+ { 0x6f12, 0x000f, 0 },
+ { 0x6f12, 0x2bd0, 0 },
+ { 0x6f12, 0x0098, 0 },
+ { 0x6f12, 0xd4f8, 0 },
+ { 0x6f12, 0x0021, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x6f12, 0x90fb, 0 },
+ { 0x6f12, 0xf1f0, 0 },
+ { 0x6f12, 0x1044, 0 },
+ { 0x6f12, 0xc4f8, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x0198, 0 },
+ { 0x6f12, 0xd4f8, 0 },
+ { 0x6f12, 0x0421, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x6f12, 0x90fb, 0 },
+ { 0x6f12, 0xf1f0, 0 },
+ { 0x6f12, 0x1044, 0 },
+ { 0x6f12, 0xc4f8, 0 },
+ { 0x6f12, 0x0401, 0 },
+ { 0x6f12, 0x0298, 0 },
+ { 0x6f12, 0xd4f8, 0 },
+ { 0x6f12, 0x0821, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x6f12, 0x90fb, 0 },
+ { 0x6f12, 0xf1f0, 0 },
+ { 0x6f12, 0x1044, 0 },
+ { 0x6f12, 0xc4f8, 0 },
+ { 0x6f12, 0x0801, 0 },
+ { 0x6f12, 0x0398, 0 },
+ { 0x6f12, 0x01e0, 0 },
+ { 0x6f12, 0x25e0, 0 },
+ { 0x6f12, 0x05e0, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x6f12, 0x90fb, 0 },
+ { 0x6f12, 0xf1f0, 0 },
+ { 0x6f12, 0xd4f8, 0 },
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+ { 0x6f12, 0x0076, 0 },
+ { 0x6f12, 0x02ab, 0 },
+ { 0x6f12, 0x03aa, 0 },
+ { 0x6f12, 0x1021, 0 },
+ { 0x6f12, 0x0598, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0x56ff, 0 },
+ { 0x6f12, 0x08eb, 0 },
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+ { 0x6f12, 0x6d1c, 0 },
+ { 0x6f12, 0x4886, 0 },
+ { 0x6f12, 0x042d, 0 },
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+ { 0x6f12, 0x0025, 0 },
+ { 0x6f12, 0xb046, 0 },
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+ { 0x6f12, 0x0026, 0 },
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+ { 0x6f12, 0x0098, 0 },
+ { 0x6f12, 0x02ab, 0 },
+ { 0x6f12, 0x03aa, 0 },
+ { 0x6f12, 0x1021, 0 },
+ { 0x6f12, 0x0598, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0x42ff, 0 },
+ { 0x6f12, 0x27f8, 0 },
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+ { 0x6f12, 0x0098, 0 },
+ { 0x6f12, 0x02ab, 0 },
+ { 0x6f12, 0x03aa, 0 },
+ { 0x6f12, 0x1021, 0 },
+ { 0x6f12, 0x0598, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0x38ff, 0 },
+ { 0x6f12, 0x07eb, 0 },
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+ { 0x6f12, 0x0881, 0 },
+ { 0x6f12, 0x042e, 0 },
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+ { 0x6f12, 0x6d1c, 0 },
+ { 0x6f12, 0x042d, 0 },
+ { 0x6f12, 0xe1db, 0 },
+ { 0x6f12, 0x0026, 0 },
+ { 0x6f12, 0x0025, 0 },
+ { 0x6f12, 0x04eb, 0 },
+ { 0x6f12, 0x461a, 0 },
+ { 0x6f12, 0xcde9, 0 },
+ { 0x6f12, 0x0098, 0 },
+ { 0x6f12, 0x02ab, 0 },
+ { 0x6f12, 0x03aa, 0 },
+ { 0x6f12, 0x1021, 0 },
+ { 0x6f12, 0x0598, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0x23ff, 0 },
+ { 0x6f12, 0x0aeb, 0 },
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+ { 0x6f12, 0x02ab, 0 },
+ { 0x6f12, 0x3882, 0 },
+ { 0x6f12, 0xcde9, 0 },
+ { 0x6f12, 0x0098, 0 },
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+ { 0x6f12, 0x2649, 0 },
+ { 0x6f12, 0x2648, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xf7ff, 0 },
+ { 0x6f12, 0x264c, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2649, 0 },
+ { 0x6f12, 0x2060, 0 },
+ { 0x6f12, 0x2648, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xf0ff, 0 },
+ { 0x6f12, 0x6060, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2449, 0 },
+ { 0x6f12, 0x2548, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xeaff, 0 },
+ { 0x6f12, 0xa060, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2349, 0 },
+ { 0x6f12, 0x2448, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xe4ff, 0 },
+ { 0x6f12, 0xe060, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2249, 0 },
+ { 0x6f12, 0x2348, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xdeff, 0 },
+ { 0x6f12, 0x2061, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2149, 0 },
+ { 0x6f12, 0x2248, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xd8ff, 0 },
+ { 0x6f12, 0xa062, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x2049, 0 },
+ { 0x6f12, 0x2148, 0 },
+ { 0x6f12, 0xfdf7, 0 },
+ { 0x6f12, 0xd4fc, 0 },
+ { 0x6f12, 0x2149, 0 },
+ { 0x6f12, 0x2048, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x8864, 0 },
+ { 0x6f12, 0x2049, 0 },
+ { 0x6f12, 0x2148, 0 },
+ { 0x6f12, 0xfdf7, 0 },
+ { 0x6f12, 0xccfc, 0 },
+ { 0x6f12, 0x0122, 0 },
+ { 0x6f12, 0x2049, 0 },
+ { 0x6f12, 0x2048, 0 },
+ { 0x6f12, 0xfff7, 0 },
+ { 0x6f12, 0xc5ff, 0 },
+ { 0x6f12, 0x2063, 0 },
+ { 0x6f12, 0x1f48, 0 },
+ { 0x6f12, 0x204c, 0 },
+ { 0x6f12, 0x0122, 0 },
+ { 0x6f12, 0xb0f8, 0 },
+ { 0x6f12, 0xcc03, 0 },
+ { 0x6f12, 0xa080, 0 },
+ { 0x6f12, 0x1e49, 0 },
+ { 0x6f12, 0x1f48, 0 },
+ { 0x6f12, 0xfdf7, 0 },
+ { 0x6f12, 0xbcfc, 0 },
+ { 0x6f12, 0x0020, 0 },
+ { 0x6f12, 0xa081, 0 },
+ { 0x6f12, 0x6081, 0 },
+ { 0x6f12, 0x2081, 0 },
+ { 0x6f12, 0xa071, 0 },
+ { 0x6f12, 0xf9f7, 0 },
+ { 0x6f12, 0xa0fd, 0 },
+ { 0x6f12, 0xbde8, 0 },
+ { 0x6f12, 0x1040, 0 },
+ { 0x6f12, 0xfcf7, 0 },
+ { 0x6f12, 0xafbb, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x51a1, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x7547, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0xce00, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x5301, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x7361, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x54c1, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x276f, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x5615, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0xe573, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x5697, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0xeeb3, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x5fdb, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x574d, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x6177, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x6d83, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x618b, 0 },
+ { 0x6f12, 0x2000, 0 },
+ { 0x6f12, 0x5d90, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x62bb, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0acb, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x6349, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0xa89b, 0 },
+ { 0x6f12, 0x2000, 0 },
+ { 0x6f12, 0x9420, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0xf270, 0 },
+ { 0x6f12, 0x2001, 0 },
+ { 0x6f12, 0x59b3, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x3325, 0 },
+ { 0xfcfc, 0x4000, 0 },
+ { 0x0bcc, 0x0000, 0 },
+};
+
+static const struct cam_reg s5kgd1_mode_regs[] = {
+ { 0xfcfc, 0x4000, 0 },
+ { 0x6214, 0xe9f0, 0 },
+ { 0x6218, 0xe150, 0 },
+ { 0x6242, 0x0e00, 0 },
+ { 0x6028, 0x2000, 0 },
+ { 0x602a, 0x10bc, 0 },
+ { 0x6f12, 0xf9f0, 0 },
+ { 0x6028, 0x2001, 0 },
+ { 0x602a, 0xf000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x4b86, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x4de0, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xf1ea, 0 },
+ { 0x6f12, 0x0008, 0 },
+ { 0x6f12, 0x13c0, 0 },
+ { 0x6f12, 0x00fd, 0 },
+ { 0x602a, 0xf008, 0 },
+ { 0x6f12, 0x00e4, 0 },
+ { 0x602a, 0xf1f0, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xf230, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xf23a, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x2000, 0 },
+ { 0x602a, 0xf1f4, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xf23e, 0 },
+ { 0x6f12, 0x123d, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x602a, 0xf228, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xf21c, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x0226, 0 },
+ { 0x6f12, 0x00c8, 0 },
+ { 0x6f12, 0x00e6, 0 },
+ { 0x602a, 0xf2a4, 0 },
+ { 0x6f12, 0x0300, 0 },
+ { 0x602a, 0xf2a8, 0 },
+ { 0x6f12, 0x1000, 0 },
+ { 0x602a, 0xf2ac, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0320, 0 },
+ { 0x6f12, 0x011b, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x6f12, 0x0200, 0 },
+ { 0x6f12, 0x03d3, 0 },
+ { 0x6f12, 0x05a7, 0 },
+ { 0x6f12, 0x0ad3, 0 },
+ { 0x6f12, 0x0320, 0 },
+ { 0x6f12, 0x0320, 0 },
+ { 0x6f12, 0x011b, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x6f12, 0x0200, 0 },
+ { 0x6f12, 0x1000, 0 },
+ { 0x6f12, 0x0800, 0 },
+ { 0x6f12, 0x1000, 0 },
+ { 0x6f12, 0x1000, 0 },
+ { 0x602a, 0xce80, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x1111, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0008, 0 },
+ { 0x6f12, 0x0008, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xcea4, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0xcea2, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0xcea6, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x6f12, 0x0200, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0xf800, 0 },
+ { 0x6028, 0x2000, 0 },
+ { 0x0344, 0x0018, 0 },
+ { 0x0348, 0x1997, 0 },
+ { 0x0346, 0x0010, 0 },
+ { 0x034a, 0x133f, 0 },
+ { 0x034c, 0x0cc0, 0 },
+ { 0x034e, 0x0990, 0 },
+ { 0x0352, 0x0004, 0 },
+ { 0x602a, 0x12f2, 0 },
+ { 0x6f12, 0x0d10, 0 },
+ { 0x6f12, 0x0a18, 0 },
+ { 0x6f12, 0x19b0, 0 },
+ { 0x6f12, 0x1350, 0 },
+ { 0x0bc6, 0x0000, 0 },
+ { 0x0342, 0x38c0, 0 },
+ { 0x0340, 0x0a49, 0 },
+ { 0x0702, 0x0000, 0 },
+ { 0x0900, 0x0122, 0 },
+ { 0x0380, 0x0002, 0 },
+ { 0x0382, 0x0002, 0 },
+ { 0x0384, 0x0002, 0 },
+ { 0x0386, 0x0002, 0 },
+ { 0x602a, 0x20de, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x602a, 0x2108, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x6f12, 0x0011, 0 },
+ { 0x0402, 0x1010, 0 },
+ { 0x0404, 0x1000, 0 },
+ { 0x0400, 0x1010, 0 },
+ { 0x021e, 0x0000, 0 },
+ { 0x0202, 0x0100, 0 },
+ { 0x022c, 0x0100, 0 },
+ { 0x0226, 0x0100, 0 },
+ { 0x0bc0, 0x0040, 0 },
+ { 0x602a, 0x2500, 0 },
+ { 0x6f12, 0x0080, 0 },
+ { 0x0204, 0x0100, 0 },
+ { 0x0136, 0x1333, 0 },
+ { 0x0304, 0x0003, 0 },
+ { 0x030c, 0x0000, 0 },
+ { 0x0306, 0x010d, 0 },
+ { 0x0302, 0x0003, 0 },
+ { 0x0300, 0x0002, 0 },
+ { 0x030e, 0x0003, 0 },
+ { 0x0312, 0x0002, 0 },
+ { 0x0310, 0x00ee, 0 },
+ { 0x030a, 0x0002, 0 },
+ { 0x0308, 0x0008, 0 },
+ { 0x602a, 0x10b8, 0 },
+ { 0x6f12, 0x0020, 0 },
+ { 0x602a, 0x1ee0, 0 },
+ { 0x6f12, 0x0078, 0 },
+ { 0x602a, 0x1eb6, 0 },
+ { 0x6f12, 0x0206, 0 },
+ { 0x602a, 0x2870, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x602a, 0x23a0, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x0fe8, 0x49c1, 0 },
+ { 0x602a, 0x3022, 0 },
+ { 0x6f12, 0x1281, 0 },
+ { 0x0fea, 0x0040, 0 },
+ { 0x602a, 0x32e8, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x0bc8, 0x0001, 0 },
+ { 0x0b06, 0x0101, 0 },
+ { 0x602a, 0x3302, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x602a, 0x3304, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x0b08, 0x0000, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x602a, 0x54a2, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x120e, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x0b00, 0x0080, 0 },
+ { 0x602a, 0x1212, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x3770, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x602a, 0x2860, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x3220, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x1226, 0 },
+ { 0x6f12, 0x0301, 0 },
+ { 0x0b0a, 0x0101, 0 },
+ { 0x602a, 0x29c8, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x32ec, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x0fe0, 0x0000, 0 },
+ { 0x602a, 0x31e4, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x0116, 0x3000, 0 },
+ { 0x0110, 0x1002, 0 },
+ { 0x602a, 0x1eb8, 0 },
+ { 0x6f12, 0x0301, 0 },
+ { 0x602a, 0x131e, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x602a, 0x2824, 0 },
+ { 0x6f12, 0x1fff, 0 },
+ { 0x602a, 0x12be, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x602a, 0x29c8, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x1146, 0 },
+ { 0x6f12, 0x25e4, 0 },
+ { 0x602a, 0x3dea, 0 },
+ { 0x6f12, 0x0081, 0 },
+ { 0x602a, 0x3034, 0 },
+ { 0x6f12, 0x049b, 0 },
+ { 0x0902, 0x0000, 0 },
+ { 0x602a, 0x138e, 0 },
+ { 0x6f12, 0x13c0, 0 },
+ { 0x602a, 0x1392, 0 },
+ { 0x6f12, 0x0038, 0 },
+ { 0x602a, 0x21b6, 0 },
+ { 0x6f12, 0x0002, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x0d00, 0x0101, 0 },
+ { 0x0d02, 0x0101, 0 },
+ { 0x0114, 0x0301, 0 },
+ { 0x602a, 0x3698, 0 },
+ { 0x6f12, 0x0104, 0 },
+ { 0x602a, 0x5e20, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x602a, 0x5e24, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5e22, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x0d04, 0x0101, 0 },
+ { 0x602a, 0x36ea, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x36fa, 0 },
+ { 0x6f12, 0x2200, 0 },
+ { 0x602a, 0x3702, 0 },
+ { 0x6f12, 0x2200, 0 },
+ { 0x602a, 0x370a, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x602a, 0x3712, 0 },
+ { 0x6f12, 0x0022, 0 },
+ { 0x602a, 0x36ac, 0 },
+ { 0x6f12, 0x0b04, 0 },
+ { 0x602a, 0x36ae, 0 },
+ { 0x6f12, 0x0304, 0 },
+ { 0x602a, 0x36b4, 0 },
+ { 0x6f12, 0x0b0c, 0 },
+ { 0x602a, 0x36b6, 0 },
+ { 0x6f12, 0x030c, 0 },
+ { 0x602a, 0x369e, 0 },
+ { 0x6f12, 0x0204, 0 },
+ { 0x602a, 0x36a0, 0 },
+ { 0x6f12, 0x0a0c, 0 },
+ { 0x602a, 0x36a6, 0 },
+ { 0x6f12, 0x020c, 0 },
+ { 0x602a, 0x36a8, 0 },
+ { 0x6f12, 0x0a04, 0 },
+ { 0x6028, 0x2001, 0 },
+ { 0x602a, 0x5178, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5180, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5178, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5180, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517a, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5182, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517a, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5182, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517c, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5184, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517c, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5184, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517e, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5186, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x517e, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x5186, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6028, 0x2000, 0 },
+ { 0x602a, 0x3732, 0 },
+ { 0x6f12, 0x0100, 0 },
+ { 0x602a, 0x375c, 0 },
+ { 0x6f12, 0x0080, 0 },
+ { 0x6f12, 0x0080, 0 },
+ { 0x6f12, 0x07c0, 0 },
+ { 0x6f12, 0x07c0, 0 },
+ { 0x6f12, 0x0449, 0 },
+ { 0x6f12, 0x0449, 0 },
+ { 0x602a, 0x376a, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0xf488, 0x0200, 0 },
+ { 0xf48a, 0x0200, 0 },
+ { 0xf48c, 0x0200, 0 },
+ { 0xf48e, 0x0200, 0 },
+ { 0xf446, 0x000c, 0 },
+ { 0xf448, 0x0018, 0 },
+ { 0xf450, 0x0010, 0 },
+ { 0xf44e, 0x0000, 0 },
+ { 0x602a, 0x250a, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0xf468, 0xe000, 0 },
+ { 0x602a, 0x21be, 0 },
+ { 0x6f12, 0x04ce, 0 },
+ { 0x6f12, 0x41a6, 0 },
+ { 0x602a, 0x1230, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x602a, 0x1232, 0 },
+ { 0x6f12, 0x00f0, 0 },
+ { 0x602a, 0x1236, 0 },
+ { 0x6f12, 0x01ff, 0 },
+ { 0x602a, 0x123a, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x6f12, 0x0009, 0 },
+ { 0x6f12, 0xf45a, 0 },
+ { 0xf466, 0x0fcd, 0 },
+ { 0x602a, 0x1ee2, 0 },
+ { 0x6f12, 0x19cd, 0 },
+ { 0x602a, 0x1ee6, 0 },
+ { 0x6f12, 0x030f, 0 },
+ { 0x602a, 0x115e, 0 },
+ { 0x6f12, 0x0048, 0 },
+ { 0x602a, 0x11a6, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x11a8, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x11ae, 0 },
+ { 0x6f12, 0x0003, 0 },
+ { 0x602a, 0x131c, 0 },
+ { 0x6f12, 0x2400, 0 },
+ { 0x602a, 0x2872, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x13fc, 0 },
+ { 0x6f12, 0x0044, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x602a, 0x1edc, 0 },
+ { 0x6f12, 0x5008, 0 },
+ { 0x602a, 0x145e, 0 },
+ { 0x6f12, 0x0049, 0 },
+ { 0x602a, 0x1410, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x1ec8, 0 },
+ { 0x6f12, 0x0503, 0 },
+ { 0x602a, 0x1eca, 0 },
+ { 0x6f12, 0x0504, 0 },
+ { 0x602a, 0x1ed0, 0 },
+ { 0x6f12, 0x040f, 0 },
+ { 0x602a, 0x145c, 0 },
+ { 0x6f12, 0x0035, 0 },
+ { 0x602a, 0x140e, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x2550, 0 },
+ { 0x6f12, 0x193c, 0 },
+ { 0x6028, 0x2000, 0 },
+ { 0x602a, 0x303a, 0 },
+ { 0x6f12, 0x003a, 0 },
+ { 0x6f12, 0x0033, 0 },
+ { 0x602a, 0x3042, 0 },
+ { 0x6f12, 0x0014, 0 },
+ { 0x6f12, 0x000e, 0 },
+ { 0x602a, 0x304a, 0 },
+ { 0x6f12, 0x0110, 0 },
+ { 0x6f12, 0x011c, 0 },
+ { 0x6f12, 0x012c, 0 },
+ { 0x6f12, 0x013c, 0 },
+ { 0x6f12, 0x0150, 0 },
+ { 0x6f12, 0x0168, 0 },
+ { 0x6f12, 0x0180, 0 },
+ { 0x6f12, 0x019c, 0 },
+ { 0x6f12, 0x01bc, 0 },
+ { 0x6f12, 0x01e4, 0 },
+ { 0x602a, 0x3062, 0 },
+ { 0x6f12, 0x012c, 0 },
+ { 0x6f12, 0x0144, 0 },
+ { 0x6f12, 0x0160, 0 },
+ { 0x6f12, 0x0180, 0 },
+ { 0x6f12, 0x01a8, 0 },
+ { 0x6f12, 0x01d8, 0 },
+ { 0x6f12, 0x0214, 0 },
+ { 0x602a, 0x3014, 0 },
+ { 0x6f12, 0x123d, 0 },
+ { 0x602a, 0x2eaa, 0 },
+ { 0x6f12, 0x0200, 0 },
+ { 0x6028, 0x2001, 0 },
+ { 0x602a, 0x4b84, 0 },
+ { 0x6f12, 0x0200, 0 },
+ { 0x6028, 0x2000, 0 },
+ { 0x602a, 0x3778, 0 },
+ { 0x6f12, 0x0101, 0 },
+ { 0x602a, 0x37fc, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x4bfc, 0 },
+ { 0x6f12, 0x9696, 0 },
+ { 0x6f12, 0x9696, 0 },
+ { 0x6f12, 0x9696, 0 },
+ { 0x602a, 0x465c, 0 },
+ { 0x6f12, 0x0505, 0 },
+ { 0x6f12, 0x0505, 0 },
+ { 0x6f12, 0x0505, 0 },
+ { 0x602a, 0x4652, 0 },
+ { 0x6f12, 0x1032, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3200, 0 },
+ { 0x602a, 0x466e, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x602a, 0x469a, 0 },
+ { 0x6f12, 0x1032, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3200, 0 },
+ { 0x602a, 0x46ac, 0 },
+ { 0x6f12, 0x1027, 0 },
+ { 0x6f12, 0x2727, 0 },
+ { 0x6f12, 0x2727, 0 },
+ { 0x6f12, 0x2700, 0 },
+ { 0x602a, 0x4676, 0 },
+ { 0x6f12, 0x1014, 0 },
+ { 0x6f12, 0x1414, 0 },
+ { 0x6f12, 0x1414, 0 },
+ { 0x6f12, 0x1400, 0 },
+ { 0x602a, 0x4688, 0 },
+ { 0x6f12, 0x1027, 0 },
+ { 0x6f12, 0x2727, 0 },
+ { 0x6f12, 0x2727, 0 },
+ { 0x6f12, 0x2700, 0 },
+ { 0x602a, 0x4c0e, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x602a, 0x3b1e, 0 },
+ { 0x6f12, 0x0078, 0 },
+ { 0x602a, 0x4c20, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x602a, 0x3b12, 0 },
+ { 0x6f12, 0x0005, 0 },
+ { 0x602a, 0x3af2, 0 },
+ { 0x6f12, 0x0007, 0 },
+ { 0x602a, 0x3af6, 0 },
+ { 0x6f12, 0x000a, 0 },
+ { 0x602a, 0x3afa, 0 },
+ { 0x6f12, 0x000c, 0 },
+ { 0x602a, 0x3afe, 0 },
+ { 0x6f12, 0x0032, 0 },
+ { 0x602a, 0x3b02, 0 },
+ { 0x6f12, 0x0039, 0 },
+ { 0x602a, 0x3b06, 0 },
+ { 0x6f12, 0x0037, 0 },
+ { 0x602a, 0x46be, 0 },
+ { 0x6f12, 0x107d, 0 },
+ { 0x6f12, 0x7d7d, 0 },
+ { 0x6f12, 0x7d7d, 0 },
+ { 0x6f12, 0x7d00, 0 },
+ { 0x602a, 0x46c8, 0 },
+ { 0x6f12, 0xafaf, 0 },
+ { 0x6f12, 0xafaf, 0 },
+ { 0x6f12, 0xafaf, 0 },
+ { 0x602a, 0x46d0, 0 },
+ { 0x6f12, 0x10fa, 0 },
+ { 0x6f12, 0xfafa, 0 },
+ { 0x6f12, 0xfafa, 0 },
+ { 0x6f12, 0xfa00, 0 },
+ { 0x602a, 0x3b2e, 0 },
+ { 0x6f12, 0x0005, 0 },
+ { 0x602a, 0x3b32, 0 },
+ { 0x6f12, 0x0074, 0 },
+ { 0x602a, 0x4c28, 0 },
+ { 0x6f12, 0x1080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8000, 0 },
+ { 0x602a, 0x4c32, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x6f12, 0x8080, 0 },
+ { 0x602a, 0x4c3a, 0 },
+ { 0x6f12, 0x1009, 0 },
+ { 0x6f12, 0x0909, 0 },
+ { 0x6f12, 0x0909, 0 },
+ { 0x6f12, 0x0900, 0 },
+ { 0x602a, 0x4c44, 0 },
+ { 0x6f12, 0x0909, 0 },
+ { 0x6f12, 0x0909, 0 },
+ { 0x6f12, 0x0909, 0 },
+ { 0x602a, 0x4c4c, 0 },
+ { 0x6f12, 0x1004, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0400, 0 },
+ { 0x602a, 0x4c56, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x6f12, 0x0404, 0 },
+ { 0x602a, 0x3e06, 0 },
+ { 0x6f12, 0x000a, 0 },
+ { 0x602a, 0x3e0a, 0 },
+ { 0x6f12, 0x000a, 0 },
+ { 0x602a, 0x3e2e, 0 },
+ { 0x6f12, 0x000a, 0 },
+ { 0x602a, 0x37fe, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x602a, 0x3e0e, 0 },
+ { 0x6f12, 0x00af, 0 },
+ { 0x602a, 0x3e12, 0 },
+ { 0x6f12, 0x00af, 0 },
+ { 0x602a, 0x3e16, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3e1a, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3e1e, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3e22, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3e26, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3e2a, 0 },
+ { 0x6f12, 0x0004, 0 },
+ { 0x602a, 0x3cb2, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x3ba2, 0 },
+ { 0x6f12, 0x0001, 0 },
+ { 0x602a, 0x4c5e, 0 },
+ { 0x6f12, 0x4035, 0 },
+ { 0x6f12, 0x3535, 0 },
+ { 0x6f12, 0x3535, 0 },
+ { 0x6f12, 0x3501, 0 },
+ { 0x602a, 0x4c68, 0 },
+ { 0x6f12, 0x3535, 0 },
+ { 0x6f12, 0x3535, 0 },
+ { 0x6f12, 0x3535, 0 },
+ { 0x602a, 0x4c70, 0 },
+ { 0x6f12, 0x40c8, 0 },
+ { 0x6f12, 0xc8c8, 0 },
+ { 0x6f12, 0xc8c8, 0 },
+ { 0x6f12, 0xc801, 0 },
+ { 0x602a, 0x4c7a, 0 },
+ { 0x6f12, 0xc8c8, 0 },
+ { 0x6f12, 0xc8c8, 0 },
+ { 0x6f12, 0xc8c8, 0 },
+ { 0x602a, 0x4c82, 0 },
+ { 0x6f12, 0x4085, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8501, 0 },
+ { 0x602a, 0x4c8c, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x602a, 0x4c94, 0 },
+ { 0x6f12, 0x4085, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8585, 0 },
+ { 0x6f12, 0x8501, 0 },
+ { 0x602a, 0x4c9e, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x602a, 0x4ca6, 0 },
+ { 0x6f12, 0x4032, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3232, 0 },
+ { 0x6f12, 0x3201, 0 },
+ { 0x602a, 0x4cb0, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x602a, 0x4cb8, 0 },
+ { 0x6f12, 0x4021, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2101, 0 },
+ { 0x602a, 0x4cc2, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x6f12, 0x2121, 0 },
+ { 0x602a, 0x3da6, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x602a, 0x3daa, 0 },
+ { 0x6f12, 0x0032, 0 },
+ { 0x602a, 0x3db0, 0 },
+ { 0x6f12, 0x01ab, 0 },
+ { 0x6f12, 0x0000, 0 },
+ { 0x6f12, 0x01ac, 0 },
+ { 0x6f12, 0x0050, 0 },
+ { 0x6f12, 0x01ad, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x6f12, 0x01ae, 0 },
+ { 0x6f12, 0x0064, 0 },
+ { 0x6f12, 0x01af, 0 },
+ { 0x6f12, 0x00c8, 0 },
+ { 0x6f12, 0x01b0, 0 },
+ { 0x6f12, 0x00c8, 0 },
+ { 0x602a, 0x3dd4, 0 },
+ { 0x6f12, 0x01b4, 0 },
+ { 0x6f12, 0x0032, 0 },
+ { 0x6f12, 0x01b5, 0 },
+ { 0x6f12, 0x0050, 0 },
+ { 0x6f12, 0x01b6, 0 },
+ { 0x6f12, 0x0050, 0 },
+ { 0x6f12, 0x01b7, 0 },
+ { 0x6f12, 0x00c8, 0 },
+ { 0x6f12, 0x01b8, 0 },
+ { 0x6f12, 0x00c8, 0 },
+ { 0x6f12, 0x01b9, 0 },
+ { 0x6f12, 0x0081, 0 },
+ { 0xf452, 0x001b, 0 },
+ { 0x602a, 0x3b22, 0 },
+ { 0x6f12, 0x0001, 0 },
+};
diff --git a/drivers/media/i2c/s5kgd1.c b/drivers/media/i2c/s5kgd1.c
new file mode 100644
index 0000000000000000000000000000000000000000..b7bd7e18cde178a5066faa254ded535053ce93ec
--- /dev/null
+++ b/drivers/media/i2c/s5kgd1.c
@@ -0,0 +1,451 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Samsung S5KGD1 32 MP quad-Bayer sensor (LG G8x front camera).
+ * Only the 2x2-binned 3264x2448 @ 30 fps 4-lane RAW10 mode is supported.
+ * Register tables come from LG's vendor CamX sensor module (see
+ * s5kgd1-regs.h); the sensor runs from a 19.2 MHz MCLK.
+ */
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <media/v4l2-cci.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
+
+struct cam_reg { u16 addr, val, delay_us; };
+#include "s5kgd1-regs.h"
+
+#define S5KGD1_REG_CHIP_ID CCI_REG16(0x0000)
+#define S5KGD1_CHIP_ID 0x0841
+#define S5KGD1_REG_MODE_SELECT CCI_REG16(0x0100)
+#define S5KGD1_REG_GROUP_HOLD CCI_REG16(0x0104)
+#define S5KGD1_REG_EXPOSURE CCI_REG16(0x0202)
+#define S5KGD1_REG_AGAIN CCI_REG16(0x0204)
+#define S5KGD1_REG_FLL CCI_REG16(0x0340)
+#define S5KGD1_REG_TEST_PATTERN CCI_REG16(0x0600)
+
+#define S5KGD1_MCLK 19200000
+#define S5KGD1_LINK_FREQ 380800000LL /* 761.6 Mbps per lane */
+#define S5KGD1_WIDTH 3264
+#define S5KGD1_HEIGHT 2448
+#define S5KGD1_LLP 14528
+#define S5KGD1_FLL 2633 /* 30 fps */
+#define S5KGD1_PIXEL_RATE ((u64)S5KGD1_LLP * S5KGD1_FLL * 30)
+#define S5KGD1_FLL_MAX 0xfff0
+#define S5KGD1_EXP_MARGIN 8
+#define S5KGD1_AGAIN_MIN 0x20 /* 1x */
+#define S5KGD1_AGAIN_MAX 0x200 /* 16x */
+#define S5KGD1_MBUS_CODE MEDIA_BUS_FMT_SGRBG10_1X10
+
+static const s64 s5kgd1_link_freqs[] = { S5KGD1_LINK_FREQ };
+static const char * const s5kgd1_supplies[] = { "vddio", "vdda", "vddd" };
+static const char * const s5kgd1_tp_menu[] = {
+ "Disabled", "Solid Colour", "Colour Bars", "Fade to Grey", "PN9",
+};
+
+struct s5kgd1 {
+ struct device *dev;
+ struct regmap *regmap;
+ struct v4l2_subdev sd;
+ struct media_pad pad;
+ struct clk *mclk;
+ struct gpio_desc *reset;
+ struct regulator_bulk_data supplies[ARRAY_SIZE(s5kgd1_supplies)];
+ struct v4l2_ctrl_handler ctrls;
+ struct v4l2_ctrl *exposure, *vblank;
+};
+
+static inline struct s5kgd1 *to_s5kgd1(struct v4l2_subdev *sd)
+{
+ return container_of(sd, struct s5kgd1, sd);
+}
+
+static int s5kgd1_write_table(struct s5kgd1 *s, const struct cam_reg *t, size_t n)
+{
+ int ret = 0;
+ size_t i;
+
+ for (i = 0; i < n && !ret; i++) {
+ cci_write(s->regmap, CCI_REG16(t[i].addr), t[i].val, &ret);
+ if (t[i].delay_us)
+ fsleep(t[i].delay_us);
+ }
+ return ret;
+}
+
+static int s5kgd1_power_on(struct device *dev)
+{
+ struct s5kgd1 *s = to_s5kgd1(dev_get_drvdata(dev));
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(s->supplies), s->supplies);
+ if (ret)
+ return ret;
+ ret = clk_prepare_enable(s->mclk);
+ if (ret) {
+ regulator_bulk_disable(ARRAY_SIZE(s->supplies), s->supplies);
+ return ret;
+ }
+ usleep_range(1000, 1500);
+ gpiod_set_value_cansleep(s->reset, 0); /* out of reset */
+ usleep_range(10000, 12000);
+ return 0;
+}
+
+static int s5kgd1_power_off(struct device *dev)
+{
+ struct s5kgd1 *s = to_s5kgd1(dev_get_drvdata(dev));
+
+ gpiod_set_value_cansleep(s->reset, 1);
+ clk_disable_unprepare(s->mclk);
+ regulator_bulk_disable(ARRAY_SIZE(s->supplies), s->supplies);
+ return 0;
+}
+
+static int s5kgd1_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct s5kgd1 *s = container_of(ctrl->handler, struct s5kgd1, ctrls);
+ int ret = 0;
+
+ if (ctrl->id == V4L2_CID_VBLANK) {
+ s64 max = S5KGD1_HEIGHT + ctrl->val - S5KGD1_EXP_MARGIN;
+
+ __v4l2_ctrl_modify_range(s->exposure, s->exposure->minimum, max,
+ 1, min(s->exposure->val, (s32)max));
+ }
+ if (!pm_runtime_get_if_in_use(s->dev))
+ return 0;
+
+ switch (ctrl->id) {
+ case V4L2_CID_EXPOSURE:
+ cci_write(s->regmap, S5KGD1_REG_EXPOSURE, ctrl->val, &ret);
+ break;
+ case V4L2_CID_ANALOGUE_GAIN:
+ cci_write(s->regmap, S5KGD1_REG_AGAIN, ctrl->val, &ret);
+ break;
+ case V4L2_CID_VBLANK:
+ cci_write(s->regmap, S5KGD1_REG_FLL, S5KGD1_HEIGHT + ctrl->val, &ret);
+ break;
+ case V4L2_CID_TEST_PATTERN:
+ cci_write(s->regmap, S5KGD1_REG_TEST_PATTERN, ctrl->val, &ret);
+ break;
+ }
+ pm_runtime_put(s->dev);
+ return ret;
+}
+
+static const struct v4l2_ctrl_ops s5kgd1_ctrl_ops = { .s_ctrl = s5kgd1_set_ctrl };
+
+static int s5kgd1_init_ctrls(struct s5kgd1 *s)
+{
+ struct v4l2_ctrl_handler *h = &s->ctrls;
+ struct v4l2_fwnode_device_properties props;
+ struct v4l2_ctrl *c;
+ u32 vb = S5KGD1_FLL - S5KGD1_HEIGHT, hb = S5KGD1_LLP - S5KGD1_WIDTH;
+ int ret;
+
+ v4l2_ctrl_handler_init(h, 10);
+ c = v4l2_ctrl_new_int_menu(h, &s5kgd1_ctrl_ops, V4L2_CID_LINK_FREQ, 0, 0,
+ s5kgd1_link_freqs);
+ if (c)
+ c->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ v4l2_ctrl_new_std(h, &s5kgd1_ctrl_ops, V4L2_CID_PIXEL_RATE,
+ S5KGD1_PIXEL_RATE, S5KGD1_PIXEL_RATE, 1, S5KGD1_PIXEL_RATE);
+ s->vblank = v4l2_ctrl_new_std(h, &s5kgd1_ctrl_ops, V4L2_CID_VBLANK, vb,
+ S5KGD1_FLL_MAX - S5KGD1_HEIGHT, 1, vb);
+ c = v4l2_ctrl_new_std(h, &s5kgd1_ctrl_ops, V4L2_CID_HBLANK, hb, hb, 1, hb);
+ if (c)
+ c->flags |= V4L2_CTRL_FLAG_READ_ONLY;
+ /* start at full-frame exposure, software AGC converges from there */
+ s->exposure = v4l2_ctrl_new_std(h, &s5kgd1_ctrl_ops, V4L2_CID_EXPOSURE, 4,
+ S5KGD1_FLL - S5KGD1_EXP_MARGIN, 1,
+ S5KGD1_FLL - S5KGD1_EXP_MARGIN);
+ v4l2_ctrl_new_std(h, &s5kgd1_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
+ S5KGD1_AGAIN_MIN, S5KGD1_AGAIN_MAX, 1, S5KGD1_AGAIN_MIN * 4);
+ v4l2_ctrl_new_std_menu_items(h, &s5kgd1_ctrl_ops, V4L2_CID_TEST_PATTERN,
+ ARRAY_SIZE(s5kgd1_tp_menu) - 1, 0, 0, s5kgd1_tp_menu);
+ ret = v4l2_fwnode_device_parse(s->dev, &props);
+ if (!ret)
+ v4l2_ctrl_new_fwnode_properties(h, &s5kgd1_ctrl_ops, &props);
+ if (h->error)
+ return h->error;
+ s->sd.ctrl_handler = h;
+ return 0;
+}
+
+static int s5kgd1_enable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ u32 pad, u64 streams)
+{
+ struct s5kgd1 *s = to_s5kgd1(sd);
+ int ret;
+
+ ret = pm_runtime_resume_and_get(s->dev);
+ if (ret)
+ return ret;
+ ret = s5kgd1_write_table(s, s5kgd1_init_regs, ARRAY_SIZE(s5kgd1_init_regs));
+ if (!ret)
+ ret = s5kgd1_write_table(s, s5kgd1_mode_regs,
+ ARRAY_SIZE(s5kgd1_mode_regs));
+ if (!ret)
+ ret = __v4l2_ctrl_handler_setup(&s->ctrls);
+ if (!ret)
+ ret = cci_write(s->regmap, S5KGD1_REG_MODE_SELECT, 0x0100, NULL);
+ if (ret) {
+ dev_err(s->dev, "stream on failed: %d\n", ret);
+ pm_runtime_put(s->dev);
+ }
+ return ret;
+}
+
+static int s5kgd1_disable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ u32 pad, u64 streams)
+{
+ struct s5kgd1 *s = to_s5kgd1(sd);
+
+ cci_write(s->regmap, S5KGD1_REG_MODE_SELECT, 0, NULL);
+ pm_runtime_put(s->dev);
+ return 0;
+}
+
+static void s5kgd1_fill_fmt(struct v4l2_mbus_framefmt *f)
+{
+ f->code = S5KGD1_MBUS_CODE;
+ f->width = S5KGD1_WIDTH;
+ f->height = S5KGD1_HEIGHT;
+ f->field = V4L2_FIELD_NONE;
+ f->colorspace = V4L2_COLORSPACE_RAW;
+ f->ycbcr_enc = V4L2_YCBCR_ENC_601;
+ f->quantization = V4L2_QUANTIZATION_FULL_RANGE;
+ f->xfer_func = V4L2_XFER_FUNC_NONE;
+}
+
+static int s5kgd1_set_fmt(struct v4l2_subdev *sd,
+ const struct v4l2_subdev_client_info *ci,
+ struct v4l2_subdev_state *st,
+ struct v4l2_subdev_format *fmt)
+{
+ s5kgd1_fill_fmt(&fmt->format);
+ *v4l2_subdev_state_get_format(st, 0) = fmt->format;
+ return 0;
+}
+
+static int s5kgd1_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+ if (code->index)
+ return -EINVAL;
+ code->code = S5KGD1_MBUS_CODE;
+ return 0;
+}
+
+static int s5kgd1_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_state *st,
+ struct v4l2_subdev_frame_size_enum *fse)
+{
+ if (fse->index || fse->code != S5KGD1_MBUS_CODE)
+ return -EINVAL;
+ fse->min_width = S5KGD1_WIDTH;
+ fse->max_width = S5KGD1_WIDTH;
+ fse->min_height = S5KGD1_HEIGHT;
+ fse->max_height = S5KGD1_HEIGHT;
+ return 0;
+}
+
+static int s5kgd1_get_selection(struct v4l2_subdev *sd,
+ const struct v4l2_subdev_client_info *ci,
+ struct v4l2_subdev_state *st,
+ struct v4l2_subdev_selection *sel)
+{
+ switch (sel->target) {
+ case V4L2_SEL_TGT_CROP: /* analogue crop of the mode (0x0344..0x034a) */
+ sel->r.left = 24;
+ sel->r.top = 16;
+ sel->r.width = 6528;
+ sel->r.height = 4896;
+ return 0;
+ case V4L2_SEL_TGT_CROP_DEFAULT:
+ case V4L2_SEL_TGT_CROP_BOUNDS: /* active pixel array */
+ case V4L2_SEL_TGT_NATIVE_SIZE:
+ sel->r.left = 0;
+ sel->r.top = 0;
+ sel->r.width = 6560;
+ sel->r.height = 4928;
+ return 0;
+ }
+ return -EINVAL;
+}
+
+static int s5kgd1_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *st)
+{
+ s5kgd1_fill_fmt(v4l2_subdev_state_get_format(st, 0));
+ return 0;
+}
+
+static const struct v4l2_subdev_pad_ops s5kgd1_pad_ops = {
+ .enum_mbus_code = s5kgd1_enum_mbus_code,
+ .enum_frame_size = s5kgd1_enum_frame_size,
+ .get_fmt = v4l2_subdev_get_fmt,
+ .set_fmt = s5kgd1_set_fmt,
+ .get_selection = s5kgd1_get_selection,
+ .enable_streams = s5kgd1_enable_streams,
+ .disable_streams = s5kgd1_disable_streams,
+};
+
+static const struct v4l2_subdev_video_ops s5kgd1_video_ops = {
+ .s_stream = v4l2_subdev_s_stream_helper,
+};
+
+static const struct v4l2_subdev_ops s5kgd1_ops = {
+ .video = &s5kgd1_video_ops,
+ .pad = &s5kgd1_pad_ops,
+};
+
+static const struct v4l2_subdev_internal_ops s5kgd1_internal_ops = {
+ .init_state = s5kgd1_init_state,
+};
+
+static int s5kgd1_check_hw(struct s5kgd1 *s)
+{
+ struct fwnode_handle *ep;
+ struct v4l2_fwnode_endpoint bus = { .bus_type = V4L2_MBUS_CSI2_DPHY };
+ u64 id = 0;
+ int ret;
+
+ ep = fwnode_graph_get_next_endpoint(dev_fwnode(s->dev), NULL);
+ if (!ep)
+ return -EPROBE_DEFER;
+ ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus);
+ fwnode_handle_put(ep);
+ if (ret)
+ return ret;
+ if (bus.bus.mipi_csi2.num_data_lanes != 4)
+ ret = dev_err_probe(s->dev, -EINVAL, "need 4 data lanes\n");
+ v4l2_fwnode_endpoint_free(&bus);
+ if (ret)
+ return ret;
+
+ ret = s5kgd1_power_on(s->dev);
+ if (ret)
+ return ret;
+ cci_read(s->regmap, S5KGD1_REG_CHIP_ID, &id, &ret);
+ if (!ret && id != S5KGD1_CHIP_ID)
+ ret = -ENODEV;
+ if (ret)
+ dev_err(s->dev, "chip id 0x%llx, error %d\n", id, ret);
+ return ret;
+}
+
+static int s5kgd1_probe(struct i2c_client *client)
+{
+ struct device *dev = &client->dev;
+ struct s5kgd1 *s;
+ unsigned int i;
+ int ret;
+
+ s = devm_kzalloc(dev, sizeof(*s), GFP_KERNEL);
+ if (!s)
+ return -ENOMEM;
+ s->dev = dev;
+ v4l2_i2c_subdev_init(&s->sd, client, &s5kgd1_ops);
+ s->sd.internal_ops = &s5kgd1_internal_ops;
+
+ s->regmap = devm_cci_regmap_init_i2c(client, 16);
+ if (IS_ERR(s->regmap))
+ return PTR_ERR(s->regmap);
+ s->mclk = devm_clk_get(dev, NULL);
+ if (IS_ERR(s->mclk))
+ return dev_err_probe(dev, PTR_ERR(s->mclk), "no clock\n");
+ ret = clk_set_rate(s->mclk, S5KGD1_MCLK);
+ if (ret)
+ return ret;
+ s->reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(s->reset))
+ return dev_err_probe(dev, PTR_ERR(s->reset), "no reset gpio\n");
+ for (i = 0; i < ARRAY_SIZE(s5kgd1_supplies); i++)
+ s->supplies[i].supply = s5kgd1_supplies[i];
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(s->supplies), s->supplies);
+ if (ret)
+ return ret;
+
+ ret = s5kgd1_check_hw(s);
+ if (ret) {
+ if (ret != -EPROBE_DEFER)
+ s5kgd1_power_off(dev);
+ return ret;
+ }
+
+ ret = s5kgd1_init_ctrls(s);
+ if (ret)
+ goto err_power;
+ s->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ s->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
+ s->pad.flags = MEDIA_PAD_FL_SOURCE;
+ ret = media_entity_pads_init(&s->sd.entity, 1, &s->pad);
+ if (ret)
+ goto err_ctrls;
+ s->sd.state_lock = s->ctrls.lock;
+ ret = v4l2_subdev_init_finalize(&s->sd);
+ if (ret)
+ goto err_entity;
+
+ pm_runtime_set_active(dev);
+ pm_runtime_enable(dev);
+ ret = v4l2_async_register_subdev_sensor(&s->sd);
+ if (ret)
+ goto err_pm;
+ pm_runtime_idle(dev);
+ return 0;
+
+err_pm:
+ pm_runtime_disable(dev);
+ pm_runtime_set_suspended(dev);
+ v4l2_subdev_cleanup(&s->sd);
+err_entity:
+ media_entity_cleanup(&s->sd.entity);
+err_ctrls:
+ v4l2_ctrl_handler_free(&s->ctrls);
+err_power:
+ s5kgd1_power_off(dev);
+ return ret;
+}
+
+static void s5kgd1_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct s5kgd1 *s = to_s5kgd1(sd);
+
+ v4l2_async_unregister_subdev(sd);
+ v4l2_subdev_cleanup(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_ctrl_handler_free(&s->ctrls);
+ pm_runtime_disable(&client->dev);
+ if (!pm_runtime_status_suspended(&client->dev))
+ s5kgd1_power_off(&client->dev);
+ pm_runtime_set_suspended(&client->dev);
+}
+
+static DEFINE_RUNTIME_DEV_PM_OPS(s5kgd1_pm_ops, s5kgd1_power_off, s5kgd1_power_on, NULL);
+
+static const struct of_device_id s5kgd1_of_match[] = {
+ { .compatible = "samsung,s5kgd1" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, s5kgd1_of_match);
+
+static struct i2c_driver s5kgd1_driver = {
+ .driver = {
+ .name = "s5kgd1",
+ .of_match_table = s5kgd1_of_match,
+ .pm = pm_ptr(&s5kgd1_pm_ops),
+ },
+ .probe = s5kgd1_probe,
+ .remove = s5kgd1_remove,
+};
+module_i2c_driver(s5kgd1_driver);
+
+MODULE_DESCRIPTION("Samsung S5KGD1 image sensor driver");
+MODULE_LICENSE("GPL");
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 7/8] dt-bindings: media: i2c: Add ON Semiconductor LC898123F40
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
` (5 preceding siblings ...)
2026-11-09 22:38 ` [PATCH 6/8] media: i2c: Add Samsung S5KGD1 image sensor driver Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 8/8] media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver Gaurav Suman via B4 Relay
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add bindings for the LC898123F40 optical image stabilisation and
autofocus controller, used in the main camera module of the LG G8x
ThinQ.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
.../bindings/media/i2c/onnn,lc898123f40.yaml | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/i2c/onnn,lc898123f40.yaml b/Documentation/devicetree/bindings/media/i2c/onnn,lc898123f40.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..ac0ab6a8793547a5a3617b75bcc590a1e01af602
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/onnn,lc898123f40.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/i2c/onnn,lc898123f40.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ON Semiconductor LC898123F40 OIS and autofocus controller
+
+maintainers:
+ - Gaurav Suman <gauravsuman007@gmail.com>
+
+description:
+ The LC898123F40 is an optical image stabilisation and autofocus
+ controller with built-in flash memory for its firmware, controlled over
+ I2C. It drives the voice coil motors of a camera module. Only the
+ autofocus (lens position) function is described here.
+
+properties:
+ compatible:
+ const: onnn,lc898123f40
+
+ reg:
+ maxItems: 1
+
+ vdd-supply:
+ description: Supply for the controller and the voice coil motors.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ camera-lens@3e {
+ compatible = "onnn,lc898123f40";
+ reg = <0x3e>;
+ vdd-supply = <&vreg_2p8>;
+ };
+ };
+...
--
2.49.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 8/8] media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver
2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
` (6 preceding siblings ...)
2026-11-09 22:38 ` [PATCH 7/8] dt-bindings: media: i2c: Add ON Semiconductor LC898123F40 Gaurav Suman via B4 Relay
@ 2026-11-09 22:38 ` Gaurav Suman via B4 Relay
7 siblings, 0 replies; 9+ messages in thread
From: Gaurav Suman via B4 Relay @ 2026-11-09 22:38 UTC (permalink / raw)
To: Bryan O'Donoghue, Vladimir Zapolskiy, Loic Poulain,
Mauro Carvalho Chehab, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Gaurav Suman, Bryan O'Donoghue, Sakari Ailus
Cc: linux-arm-msm, linux-media, devicetree, linux-kernel
From: Gaurav Suman <gauravsuman007@gmail.com>
Add a V4L2 lens sub-device driver for the autofocus function of the
LC898123F40 OIS/AF controller. The controller runs firmware from its
own flash; the lens position is a 32-bit value written to register
0xf01a, and 0xf012 = 1 enables the servo, as in the LG G8x ThinQ
vendor camera data. Only V4L2_CID_FOCUS_ABSOLUTE (0..2047) is
supported; image stabilisation is not.
Tested on an LG G8x ThinQ: sweeping the position visibly moves focus
on the IMX363 main camera.
This was written and tested with the help of an AI coding assistant
(Claude Opus 5.5, Anthropic); I reviewed the change and the results.
Signed-off-by: Gaurav Suman <gauravsuman007@gmail.com>
---
MAINTAINERS | 7 +++
drivers/media/i2c/Kconfig | 10 ++++
drivers/media/i2c/Makefile | 1 +
drivers/media/i2c/lc898123.c | 138 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 156 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index b13cf3ad43a185802b31a89176fd85d5ba2c6d1b..ab3d82598865973241112a0e5636e3679ea8d35d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20984,6 +20984,13 @@ S: Maintained
T: git git://linuxtv.org/media.git
F: drivers/media/i2c/ov9734.c
+ON SEMICONDUCTOR LC898123 LENS DRIVER
+M: Gaurav Suman <gauravsuman007@gmail.com>
+L: linux-media@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/media/i2c/onnn,lc898123f40.yaml
+F: drivers/media/i2c/lc898123.c
+
ONBOARD USB HUB DRIVER
M: Matthias Kaehlcke <mka@chromium.org>
L: linux-usb@vger.kernel.org
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index 2477db9a17fac4d5278e2428f9b840a0698e56af..fa4d26a27381bd23eafc88dd0af0facbe2fc8ac4 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -1022,6 +1022,16 @@ config VIDEO_DW9807_VCM
capability. This is designed for linear control of
voice coil motors, controlled via I2C serial interface.
+config VIDEO_LC898123
+ tristate "LC898123F40 lens autofocus support"
+ select V4L2_CCI_I2C
+ help
+ This is a driver for the autofocus function of the ON
+ Semiconductor LC898123F40 optical image stabilisation and
+ autofocus controller, controlled via I2C serial interface.
+ Only the lens position is controlled; image stabilisation is
+ not supported. The controller runs firmware from its own flash.
+
endif
menu "Flash devices"
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index 7e714dbcbf69d55576be1abe76311c3478511201..836bf5b8a44e260567b34977b191c1f0f6e3667e 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -36,6 +36,7 @@ obj-$(CONFIG_VIDEO_DW9714) += dw9714.o
obj-$(CONFIG_VIDEO_DW9719) += dw9719.o
obj-$(CONFIG_VIDEO_DW9768) += dw9768.o
obj-$(CONFIG_VIDEO_DW9807_VCM) += dw9807-vcm.o
+obj-$(CONFIG_VIDEO_LC898123) += lc898123.o
obj-$(CONFIG_VIDEO_ET8EK8) += et8ek8/
obj-$(CONFIG_VIDEO_GC0308) += gc0308.o
obj-$(CONFIG_VIDEO_GC0310) += gc0310.o
diff --git a/drivers/media/i2c/lc898123.c b/drivers/media/i2c/lc898123.c
new file mode 100644
index 0000000000000000000000000000000000000000..69516ad964d6035e8b2db91ad9fc9c95fa8c9b80
--- /dev/null
+++ b/drivers/media/i2c/lc898123.c
@@ -0,0 +1,138 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * ON Semiconductor LC898123F40 OIS/AF controller, autofocus part only
+ * (LG G8x rear main camera). The controller runs its own factory-flashed
+ * firmware; the lens position is a 32-bit big-endian value in 0xF01A and
+ * 0xF012 = 1 enables the servo, as LG's CamX module data does.
+ */
+#include <linux/delay.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+#include <linux/pm_runtime.h>
+#include <linux/regulator/consumer.h>
+#include <media/v4l2-cci.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+
+#define LC898123_REG_SERVO CCI_REG32(0xf012)
+#define LC898123_REG_AF_POS CCI_REG32(0xf01a)
+#define LC898123_REG_OIS_CTRL CCI_REG8(0xf100)
+#define LC898123_POS_MAX 2047
+#define LC898123_POS_DEFAULT 1024
+
+struct lc898123 {
+ struct regmap *regmap;
+ struct v4l2_subdev sd;
+ struct v4l2_ctrl_handler ctrls;
+ struct v4l2_ctrl *focus;
+};
+
+static int lc898123_set_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct lc898123 *lc = container_of(ctrl->handler, struct lc898123, ctrls);
+
+ if (ctrl->id != V4L2_CID_FOCUS_ABSOLUTE)
+ return -EINVAL;
+ return cci_write(lc->regmap, LC898123_REG_AF_POS, ctrl->val, NULL);
+}
+
+static const struct v4l2_ctrl_ops lc898123_ctrl_ops = { .s_ctrl = lc898123_set_ctrl };
+
+static int lc898123_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
+{
+ struct lc898123 *lc = container_of(sd, struct lc898123, sd);
+ int ret = 0;
+
+ cci_write(lc->regmap, LC898123_REG_OIS_CTRL, 0, &ret);
+ cci_write(lc->regmap, LC898123_REG_SERVO, 1, &ret);
+ if (!ret)
+ ret = __v4l2_ctrl_handler_setup(&lc->ctrls);
+ return ret;
+}
+
+static const struct v4l2_subdev_internal_ops lc898123_internal_ops = {
+ .open = lc898123_open,
+};
+
+static const struct v4l2_subdev_ops lc898123_ops = { };
+
+static int lc898123_probe(struct i2c_client *client)
+{
+ struct lc898123 *lc;
+ u64 val;
+ int ret;
+
+ lc = devm_kzalloc(&client->dev, sizeof(*lc), GFP_KERNEL);
+ if (!lc)
+ return -ENOMEM;
+ ret = devm_regulator_get_enable_optional(&client->dev, "vdd");
+ if (ret && ret != -ENODEV)
+ return dev_err_probe(&client->dev, ret, "vdd supply\n");
+ if (!ret)
+ usleep_range(10000, 12000); /* controller boot from flash */
+
+ lc->regmap = devm_cci_regmap_init_i2c(client, 16);
+ if (IS_ERR(lc->regmap))
+ return PTR_ERR(lc->regmap);
+ ret = cci_read(lc->regmap, LC898123_REG_AF_POS, &val, NULL);
+ if (ret)
+ return dev_err_probe(&client->dev, ret, "no response\n");
+ cci_write(lc->regmap, LC898123_REG_SERVO, 1, NULL);
+
+ v4l2_i2c_subdev_init(&lc->sd, client, &lc898123_ops);
+ lc->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+ lc->sd.internal_ops = &lc898123_internal_ops;
+ lc->sd.entity.function = MEDIA_ENT_F_LENS;
+
+ v4l2_ctrl_handler_init(&lc->ctrls, 1);
+ lc->focus = v4l2_ctrl_new_std(&lc->ctrls, &lc898123_ctrl_ops,
+ V4L2_CID_FOCUS_ABSOLUTE, 0, LC898123_POS_MAX,
+ 1, LC898123_POS_DEFAULT);
+ if (lc->ctrls.error) {
+ ret = lc->ctrls.error;
+ goto err;
+ }
+ lc->sd.ctrl_handler = &lc->ctrls;
+ ret = media_entity_pads_init(&lc->sd.entity, 0, NULL);
+ if (ret)
+ goto err;
+ ret = v4l2_async_register_subdev(&lc->sd);
+ if (ret)
+ goto err_entity;
+ return 0;
+
+err_entity:
+ media_entity_cleanup(&lc->sd.entity);
+err:
+ v4l2_ctrl_handler_free(&lc->ctrls);
+ return ret;
+}
+
+static void lc898123_remove(struct i2c_client *client)
+{
+ struct v4l2_subdev *sd = i2c_get_clientdata(client);
+ struct lc898123 *lc = container_of(sd, struct lc898123, sd);
+
+ v4l2_async_unregister_subdev(sd);
+ media_entity_cleanup(&sd->entity);
+ v4l2_ctrl_handler_free(&lc->ctrls);
+}
+
+static const struct of_device_id lc898123_of_match[] = {
+ { .compatible = "onnn,lc898123f40" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, lc898123_of_match);
+
+static struct i2c_driver lc898123_driver = {
+ .driver = {
+ .name = "lc898123",
+ .of_match_table = lc898123_of_match,
+ },
+ .probe = lc898123_probe,
+ .remove = lc898123_remove,
+};
+module_i2c_driver(lc898123_driver);
+
+MODULE_DESCRIPTION("LC898123F40 autofocus driver");
+MODULE_LICENSE("GPL");
--
2.49.1
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2026-11-09 22:38 [PATCH 0/8] Add SM8150 CAMSS and LG G8x ThinQ camera sensors Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 1/8] dt-bindings: media: Add qcom,sm8150-camss Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 2/8] media: qcom: camss: Add SM8150 support Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 3/8] dt-bindings: media: i2c: Add Samsung S5K3M3 image sensor Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 4/8] media: i2c: Add Samsung S5K3M3 image sensor driver Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 5/8] dt-bindings: media: i2c: Add Samsung S5KGD1 image sensor Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 6/8] media: i2c: Add Samsung S5KGD1 image sensor driver Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 7/8] dt-bindings: media: i2c: Add ON Semiconductor LC898123F40 Gaurav Suman via B4 Relay
2026-11-09 22:38 ` [PATCH 8/8] media: i2c: Add ON Semiconductor LC898123F40 lens autofocus driver Gaurav Suman via B4 Relay
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