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From: Alexandre Courbot <acourbot@nvidia.com>
To: Danilo Krummrich <dakr@kernel.org>,
	Alice Ryhl <aliceryhl@google.com>,
	 David Airlie <airlied@gmail.com>,
	Simona Vetter <simona@ffwll.ch>
Cc: John Hubbard <jhubbard@nvidia.com>,
	 Alistair Popple <apopple@nvidia.com>,
	Timur Tabi <ttabi@nvidia.com>,
	 Eliot Courtney <ecourtney@nvidia.com>,
	Zhi Wang <zhiw@nvidia.com>,
	 nova-gpu@lists.linux.dev, rust-for-linux@vger.kernel.org,
	 linux-kernel@vger.kernel.org,
	Alexandre Courbot <acourbot@nvidia.com>
Subject: [PATCH v3 10/13] gpu: nova-core: falcon: allow DMA transfers to read from a framebuffer address
Date: Tue, 10 Nov 2026 19:20:59 +0900	[thread overview]
Message-ID: <20261110-r000-fw-v3-10-20d79ebb646f@nvidia.com> (raw)
In-Reply-To: <20261110-r000-fw-v3-0-20d79ebb646f@nvidia.com>

The r000 boot protocol has a load-and-execute event in which GSP-RM asks
the driver to load a Heavy-Secured binary from framebuffer memory into
the GSP falcon's memory by DMA in order to run it.

Nova-core's falcon DMA loading method currently only supports loading
from a DMA object that the driver has allocated, so there is no way to
copy an image from framebuffer memory that an event supplied.

Address this by making the source of a falcon DMA transfer an enum,
which can be either a DMA object, or a GPU framebuffer address.

The framebuffer address source has no user yet, but will be used by the
r000 boot protocol.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 drivers/gpu/nova-core/falcon.rs | 45 +++++++++++++++++++++++++++--------------
 1 file changed, 30 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs
index 04da14d48895..facf65a17c0f 100644
--- a/drivers/gpu/nova-core/falcon.rs
+++ b/drivers/gpu/nova-core/falcon.rs
@@ -140,6 +140,15 @@ pub(crate) enum FalconMem {
     Dmem { tag: bool },
 }
 
+/// Where a falcon DMA transfer reads from.
+pub(crate) enum FalconDmaSource<'a> {
+    /// A DMA object in system memory.
+    Sysmem(&'a Coherent<'a, [u8]>),
+    /// GPU framebuffer memory at physical address `base`.
+    #[expect(dead_code)]
+    Framebuffer { base: u64 },
+}
+
 bounded_enum! {
     /// Defines the Framebuffer Interface (FBIF) aperture type.
     /// This determines the memory type for external memory access during a DMA transfer, which is
@@ -544,13 +553,10 @@ pub(crate) fn with_fbif_transcfg<R>(
         Ok(result)
     }
 
-    /// Perform a DMA write according to `load_offsets` from `dma_obj` into the falcon's
-    /// `target_mem`.
-    ///
-    /// `sec` is set if the loaded firmware is expected to run in secure mode.
+    /// Perform a DMA write according to `load_offsets` from `src` into the falcon's `target_mem`.
     fn dma_wr(
         &self,
-        dma_obj: &Coherent<'_, [u8]>,
+        src: FalconDmaSource<'_>,
         target_mem: FalconMem,
         load_offsets: FalconDmaLoadTarget,
     ) -> Result {
@@ -571,15 +577,20 @@ fn dma_wr(
             FalconMem::Dmem { tag: false } => (0, usize::from_safe_cast(load_offsets.src_start)),
         };
 
-        let dma_base = {
-            // Upper limit of transfer is `(num_transfers * DMA_LEN) + load_offsets.src_start`.
-            let end_offset = num_transfers
-                .checked_mul(DMA_LEN)
-                .and_then(|size| size.checked_add(load_offsets.src_start))
-                .map(usize::from_safe_cast)
-                .ok_or(EOVERFLOW)?;
+        let dma_base = match src {
+            FalconDmaSource::Sysmem(dma_obj) => {
+                // Upper limit of transfer is `(num_transfers * DMA_LEN) + load_offsets.src_start`.
+                let end_offset = num_transfers
+                    .checked_mul(DMA_LEN)
+                    .and_then(|size| size.checked_add(load_offsets.src_start))
+                    .map(usize::from_safe_cast)
+                    .ok_or(EOVERFLOW)?;
 
-            io_project!(dma_obj, [try: base_offset..end_offset]).dma_address()
+                io_project!(dma_obj, [try: base_offset..end_offset]).dma_address()
+            }
+            FalconDmaSource::Framebuffer { base } => base
+                .checked_add(u64::from_safe_cast(base_offset))
+                .ok_or(EOVERFLOW)?,
         };
 
         if dma_base % DmaAddress::from(DMA_LEN) > 0 {
@@ -661,9 +672,13 @@ fn dma_load<F: FalconFirmware<Target = E> + FalconDmaLoadable>(&self, fw: &F) ->
                     .with_mem_type(FalconFbifMemType::Physical)
             });
 
-        self.dma_wr(&dma_obj, FalconMem::ImemSecure, fw.imem_sec_load_params())?;
         self.dma_wr(
-            &dma_obj,
+            FalconDmaSource::Sysmem(&dma_obj),
+            FalconMem::ImemSecure,
+            fw.imem_sec_load_params(),
+        )?;
+        self.dma_wr(
+            FalconDmaSource::Sysmem(&dma_obj),
             FalconMem::Dmem { tag: false },
             fw.dmem_load_params(),
         )?;

-- 
2.56.0


  parent reply	other threads:[~2026-11-10 10:21 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-10 10:20 [PATCH v3 00/13] gpu: nova-core: generic bootloader and falcon DMA changes for r000 Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 01/13] gpu: nova-core: separate the generic falcon bootloader from FWSEC Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 02/13] gpu: nova-core: falcon: widen the IMEM PIO offset to 24 bits Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 03/13] gpu: nova-core: move the bootloader DMEM descriptor out of FWSEC Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 04/13] gpu: nova-core: run the generic bootloader from its own type Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 05/13] gpu: nova-core: place the generic bootloader at the top of IMEM Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 06/13] rust: io: register: implement Copy and Clone for RegisterArrayLoc Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 07/13] gpu: nova-core: falcon: introduce and use with_fbif_transcfg Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 08/13] gpu: nova-core: falcon: rename the local variables of dma_wr() Alexandre Courbot
2026-11-10 10:20 ` [PATCH v3 09/13] gpu: nova-core: falcon: allow DMEM DMA transfers to request tagging Alexandre Courbot
2026-11-10 10:20 ` Alexandre Courbot [this message]
2026-11-10 10:21 ` [PATCH v3 11/13] gpu: nova-core: falcon: use src_start as FB offset for all DMA transfers Alexandre Courbot
2026-11-10 10:21 ` [PATCH v3 12/13] gpu: nova-core: falcon: check the per-block DMA offsets for overflow Alexandre Courbot
2026-11-10 10:21 ` [PATCH v3 13/13] gpu: nova-core: falcon: program the FBIF_TRANSCFG register in dma_wr Alexandre Courbot

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