[PATCH 00/12] arm64: dts: hisilicon: DT warning fixes

[PATCH 00/12] arm64: dts: hisilicon: DT warning fixes

[Rob Herring (Arm)]

Another batch of DT schema warning fixes for HiSilicon platforms. This 
fixes most of the remaining warnings on HiSilicon platforms.

It's best if the whole series is taken together.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
Rob Herring (Arm) (12):
      dt-bindings: mfd: syscon: Add HiSilicon register bank compatibles
      dt-bindings: mfd: Add HiSilicon reboot mode syscon schema
      arm64: dts: hisilicon: Add specific syscon compatibles
      arm64: dts: hisilicon: Describe ADV7533 supplies
      arm64: dts: hisilicon: Drop HiKey DSI endpoint unit-address
      arm64: dts: hisilicon: hi3798cv200: pinctrl node fixes
      arm64: dts: hisilicon: hip05: Rename the HIP05 NOR flash node
      arm64: dts: hisilicon: Move non-MMIO nodes out of simple-bus nodes
      arm64: dts: hisilicon: Correct DMA node names
      arm64: dts: hisilicon: hi6220: Correct I2S channel ordering
      arm64: dts: hisilicon: Remove obsolete HiKey970 PMIC GPIO property
      arm64: dts: hisilicon: Remove unsupported SBSA UART "reg-io-width"

 .../bindings/mfd/hisilicon,hi6220-reboot-mode.yaml |  34 +++++
 Documentation/devicetree/bindings/mfd/syscon.yaml  |   4 +
 .../arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 138 ++++++++++-----------
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts  |  17 ++-
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi          | 119 +++++++++---------
 arch/arm64/boot/dts/hisilicon/hi3670.dtsi          |  26 ++--
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi     |   4 +-
 .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi |  69 +++++------
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts     |  11 +-
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi          | 118 +++++++++---------
 .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi |  10 +-
 .../arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi |   8 +-
 arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi   |   1 -
 arch/arm64/boot/dts/hisilicon/hip05-d02.dts        |   2 +-
 arch/arm64/boot/dts/hisilicon/hip06.dtsi           |   2 +-
 arch/arm64/boot/dts/hisilicon/hip07.dtsi           |   5 +-
 16 files changed, 310 insertions(+), 258 deletions(-)
---
base-commit: aaa2f954c21b205a0bcd0961e5b2be4e82e58455
change-id: 20261111-dtbs-hisi-95212ea0d174

Best regards,
--  
Rob Herring (Arm) <robh@kernel.org>

[PATCH 01/12] dt-bindings: mfd: syscon: Add HiSilicon register bank compatibles

[Rob Herring (Arm)]

Several HiSilicon syscon blocks are missing specific compatibles. Add
compatibles for the Hi6220 media NOC ADE, HIP06/HIP07 SerDes control,
and HIP07 DSA CPLD register banks accessed through syscon references.
The names are based on the label names in the .dts files.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 Documentation/devicetree/bindings/mfd/syscon.yaml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index dae706ca7642..1e2a46ac2e3a 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -69,8 +69,12 @@ properties:
               - fsl,vf610-anatop
               - fsl,vf610-mscm-cpucfg
               - hisilicon,dsa-subctrl
+              - hisilicon,hi6220-medianoc-ade
               - hisilicon,hi6220-sramctrl
               - hisilicon,hip04-ppe
+              - hisilicon,hip06-serdes-ctrl
+              - hisilicon,hip07-dsa-cpld
+              - hisilicon,hip07-serdes-ctrl
               - hisilicon,pcie-sas-subctrl
               - hisilicon,peri-subctrl
               - hpe,gxp-sysreg

-- 
2.53.0

[PATCH 02/12] dt-bindings: mfd: Add HiSilicon reboot mode syscon schema

[Rob Herring (Arm)]

Add a dedicated schema for the HiSilicon reboot-mode syscon nodes and
their reboot-mode child device which are missing a specific compatible.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 .../bindings/mfd/hisilicon,hi6220-reboot-mode.yaml | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6220-reboot-mode.yaml b/Documentation/devicetree/bindings/mfd/hisilicon,hi6220-reboot-mode.yaml
new file mode 100644
index 000000000000..8114d87d5f95
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6220-reboot-mode.yaml
@@ -0,0 +1,34 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/hisilicon,hi6220-reboot-mode.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HiSilicon reboot mode system controller
+
+maintainers:
+  - Wei Xu <xuwei5@hisilicon.com>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - hisilicon,hi3660-reboot-mode
+          - hisilicon,hi6220-reboot-mode
+      - const: syscon
+      - const: simple-mfd
+
+  reg:
+    maxItems: 1
+
+  reboot-mode:
+    $ref: /schemas/power/reset/syscon-reboot-mode.yaml#
+
+required:
+  - compatible
+  - reg
+
+allOf:
+  - $ref: syscon-common.yaml#
+
+unevaluatedProperties: false

-- 
2.53.0

[PATCH 03/12] arm64: dts: hisilicon: Add specific syscon compatibles

[Rob Herring (Arm)]

Add specific compatibles for HiSilicon syscon nodes HiKey reboot mode,
Hi6220 media NOC ADE, HIP06/HIP07 SerDes, and DSA CPLD syscon.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 3 ++-
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts    | 3 ++-
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi         | 2 +-
 arch/arm64/boot/dts/hisilicon/hip06.dtsi          | 2 +-
 arch/arm64/boot/dts/hisilicon/hip07.dtsi          | 4 ++--
 5 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index 27fb08d348c9..acecd2dfeeba 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -56,7 +56,8 @@ ramoops@32000000 {
 	};
 
 	reboot-mode-syscon@32100000 {
-		compatible = "syscon", "simple-mfd";
+		compatible = "hisilicon,hi3660-reboot-mode",
+			     "syscon", "simple-mfd";
 		reg = <0x0 0x32100000 0x0 0x00001000>;
 
 		reboot-mode {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 2d304efe081d..229116477f1d 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -69,7 +69,8 @@ linux,cma {
 	};
 
 	reboot-mode-syscon@5f01000 {
-		compatible = "syscon", "simple-mfd";
+		compatible = "hisilicon,hi6220-reboot-mode",
+			     "syscon", "simple-mfd";
 		reg = <0x0 0x05f01000 0x0 0x00001000>;
 
 		reboot-mode {
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 61eaa7f8c1c9..21eb268b5731 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -294,7 +294,7 @@ acpu_sctrl: acpu_sctrl@f6504000 {
 		};
 
 		medianoc_ade: medianoc_ade@f4520000 {
-			compatible = "syscon";
+			compatible = "hisilicon,hi6220-medianoc-ade", "syscon";
 			reg = <0x0 0xf4520000 0x0 0x4000>;
 		};
 
diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
index 3d7285e6700e..823cd314dd32 100644
--- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi
@@ -450,7 +450,7 @@ pcie_subctl: pcie_subctl@a0000000 {
 		};
 
 		serdes_ctrl: sds_ctrl@c2200000 {
-			compatible = "syscon";
+			compatible = "hisilicon,hip06-serdes-ctrl", "syscon";
 			reg = <0 0xc2200000 0x0 0x80000>;
 		};
 
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index d175e242ee96..b815c1fff6ea 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1229,7 +1229,7 @@ dsa_subctrl: dsa_subctrl@c0000000 {
 		};
 
 		dsa_cpld: dsa_cpld@78000010 {
-			compatible = "syscon";
+			compatible = "hisilicon,hip07-dsa-cpld", "syscon";
 			reg = <0x0 0x78000010 0x0 0x100>;
 			reg-io-width = <2>;
 		};
@@ -1240,7 +1240,7 @@ pcie_subctl: pcie_subctl@a0000000 {
 		};
 
 		serdes_ctrl: sds_ctrl@c2200000 {
-			compatible = "syscon";
+			compatible = "hisilicon,hip07-serdes-ctrl", "syscon";
 			reg = <0 0xc2200000 0x0 0x80000>;
 		};
 

-- 
2.53.0

[PATCH 04/12] arm64: dts: hisilicon: Describe ADV7533 supplies

[Rob Herring (Arm)]

Add the ADV7533 power supply phandles for HiKey and HiKey960. Both
boards have a dedicated HDMI 1.8-V supply. HiKey has a 1.2-V PMIC rail,
while the ADV7533 on HiKey960 uses its HDMI 1.8-V supply for V1P2.
Describe the respective 3.3-V rails as well.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 14 ++++++++++++++
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts    |  6 ++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
index acecd2dfeeba..1b0ba3dd2cde 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts
@@ -192,6 +192,14 @@ wlan_en: wlan-en-1-8v {
 		enable-active-high;
 	};
 
+	fixed_3v3: regulator-3v3 {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
+
 	firmware {
 		optee {
 			compatible = "linaro,optee-tz";
@@ -571,6 +579,12 @@ adv7533: adv7533@39 {
 		status = "okay";
 		compatible = "adi,adv7533";
 		reg = <0x39>;
+		avdd-supply = <&ldo3>;
+		dvdd-supply = <&ldo3>;
+		pvdd-supply = <&ldo3>;
+		a2vdd-supply = <&ldo3>;
+		v3p3-supply = <&fixed_3v3>;
+		v1p2-supply = <&ldo3>;
 		adi,dsi-lanes = <4>;
 		ports {
 			#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 229116477f1d..5f31569cf494 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -505,6 +505,12 @@ &i2c2 {
 	adv7533: adv7533@39 {
 		compatible = "adi,adv7533";
 		reg = <0x39>;
+		avdd-supply = <&ldo15>;
+		dvdd-supply = <&ldo15>;
+		pvdd-supply = <&ldo15>;
+		a2vdd-supply = <&ldo15>;
+		v3p3-supply = <&reg_vdd_3v3>;
+		v1p2-supply = <&ldo22>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <1 2>;
 		pd-gpios = <&gpio0 4 0>;

-- 
2.53.0

[PATCH 05/12] arm64: dts: hisilicon: Drop HiKey DSI endpoint unit-address

[Rob Herring (Arm)]

Rename the DSI output child from endpoint@0 to endpoint because the
node has no reg property.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
index 5f31569cf494..25ff7d7dc176 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts
@@ -300,7 +300,7 @@ ports {
 		port@1 {
 			reg = <1>;
 
-			dsi_out0: endpoint@0 {
+			dsi_out0: endpoint {
 				remote-endpoint = <&adv7533_in>;
 			};
 		};

-- 
2.53.0

[PATCH 06/12] arm64: dts: hisilicon: hi3798cv200: pinctrl node fixes

[Rob Herring (Arm)]

Rename the Poplar pinconf node to pinctrl and correct the gpio9
gpio-ranges tuple.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
index e5010c9d4c39..6d4bd1dec6fe 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi
@@ -214,7 +214,7 @@ combphy1: phy@858 {
 			};
 		};
 
-		pmx0: pinconf@8a21000 {
+		pmx0: pinctrl@8a21000 {
 			compatible = "pinconf-single";
 			reg = <0x8a21000 0x180>;
 			pinctrl-single,register-width = <32>;
@@ -510,7 +510,7 @@ gpio9: gpio@8b29000 {
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
-			gpio-ranges = <&pmx0 0 64 7 &pmx0 71 1>;
+			gpio-ranges = <&pmx0 0 64 7 &pmx0 7 71 1>;
 			clocks = <&crg HISTB_APB_CLK>;
 			clock-names = "apb_pclk";
 			status = "disabled";

-- 
2.53.0

[PATCH 07/12] arm64: dts: hisilicon: hip05: Rename the HIP05 NOR flash node

[Rob Herring (Arm)]

Correct the HIP05 flash node name to be the documented 'flash' rather than
'nor-flash'.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hip05-d02.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
index b7792d443189..eecc09bd8fc9 100644
--- a/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
+++ b/arch/arm64/boot/dts/hisilicon/hip05-d02.dts
@@ -54,7 +54,7 @@ &lbc {
 	ranges = <0 0 0x0 0x90000000 0x08000000>,
 		 <1 0 0x0 0x98000000 0x08000000>;
 
-	nor-flash@0 {
+	flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "numonyx,js28f00a", "cfi-flash";

-- 
2.53.0

[PATCH 08/12] arm64: dts: hisilicon: Move non-MMIO nodes out of simple-bus nodes

[Rob Herring (Arm)]

Move non-MMIO provider nodes out of the soc simple-bus nodes.
This includes HiKey GPIO range helpers, Hi3660 and Hi3670
reset controllers, Hi3660 and Hi6220 thermal zones, Hi6220
stub clock and USB PHY providers, and static CoreSight funnel
and replicator graph helpers.

These nodes do not have register ranges of their own, so they
don't belong under an MMIO "simple-bus".

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 .../arm64/boot/dts/hisilicon/hi3660-coresight.dtsi | 138 ++++++++++-----------
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi          | 117 ++++++++---------
 arch/arm64/boot/dts/hisilicon/hi3670.dtsi          |  26 ++--
 .../arm64/boot/dts/hisilicon/hi6220-coresight.dtsi |  69 +++++------
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi          | 110 ++++++++--------
 .../arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi |  10 +-
 .../arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi |   8 +-
 7 files changed, 236 insertions(+), 242 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
index 4c6a075908d1..7862a03c3094 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660-coresight.dtsi
@@ -9,6 +9,73 @@
  *
  */
 / {
+	/* An invisible combo funnel between clusters and top funnel */
+	funnel {
+		compatible = "arm,coresight-static-funnel";
+		clocks = <&crg_ctrl HI3660_PCLK>;
+		clock-names = "apb_pclk";
+
+		out-ports {
+			port {
+				combo_funnel_out: endpoint {
+					remote-endpoint = <&top_funnel_in>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				combo_funnel_in0: endpoint {
+					remote-endpoint = <&cluster0_etf_out>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				combo_funnel_in1: endpoint {
+					remote-endpoint = <&cluster1_etf_out>;
+				};
+			};
+		};
+	};
+
+	replicator {
+		compatible = "arm,coresight-static-replicator";
+		clocks = <&crg_ctrl HI3660_PCLK>;
+		clock-names = "apb_pclk";
+
+		in-ports {
+			port {
+				replicator_in: endpoint {
+					remote-endpoint = <&top_etf_out>;
+				};
+			};
+		};
+
+		out-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				replicator0_out0: endpoint {
+					remote-endpoint = <&etr_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				replicator0_out1: endpoint {
+					remote-endpoint = <&tpiu_in>;
+				};
+			};
+		};
+	};
+
 	soc {
 		/* A53 cluster internals */
 		etm@ecc40000 {
@@ -303,43 +370,6 @@ cluster1_etf_out: endpoint {
 			};
 		};
 
-		/* An invisible combo funnel between clusters and top funnel */
-		funnel {
-			compatible = "arm,coresight-static-funnel";
-			clocks = <&crg_ctrl HI3660_PCLK>;
-			clock-names = "apb_pclk";
-
-			out-ports {
-				port {
-					combo_funnel_out: endpoint {
-						remote-endpoint =
-							<&top_funnel_in>;
-					};
-				};
-			};
-
-			in-ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					reg = <0>;
-					combo_funnel_in0: endpoint {
-						remote-endpoint =
-							<&cluster0_etf_out>;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-					combo_funnel_in1: endpoint {
-						remote-endpoint =
-							<&cluster1_etf_out>;
-					};
-				};
-			};
-		};
-
 		/* Top internals */
 		funnel@ec031000 {
 			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
@@ -395,40 +425,6 @@ top_etf_out: endpoint {
 			};
 		};
 
-		replicator {
-			compatible = "arm,coresight-static-replicator";
-			clocks = <&crg_ctrl HI3660_PCLK>;
-			clock-names = "apb_pclk";
-
-			in-ports {
-				port {
-					replicator_in: endpoint {
-						remote-endpoint =
-							<&top_etf_out>;
-					};
-				};
-			};
-
-			out-ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					reg = <0>;
-					replicator0_out0: endpoint {
-						remote-endpoint = <&etr_in>;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-					replicator0_out1: endpoint {
-						remote-endpoint = <&tpiu_in>;
-					};
-				};
-			};
-		};
-
 		etr@ec033000 {
 			compatible = "arm,coresight-tmc", "arm,primecell";
 			reg = <0 0xec033000 0 0x1000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 374aa173bec6..9f0b5d5b97cb 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -334,6 +334,65 @@ IRQ_TYPE_LEVEL_LOW)>,
 					  IRQ_TYPE_LEVEL_LOW)>;
 	};
 
+	crg_rst: crg_rst_controller {
+		compatible = "hisilicon,hi3660-reset";
+		#reset-cells = <2>;
+		hisi,rst-syscon = <&crg_ctrl>;
+	};
+
+	iomcu_rst: reset {
+		compatible = "hisilicon,hi3660-reset";
+		hisi,rst-syscon = <&iomcu>;
+		#reset-cells = <2>;
+	};
+
+	thermal-zones {
+		cls0: cls0-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <100>;
+			sustainable-power = <4500>;
+
+			/* sensor ID */
+			thermal-sensors = <&tsensor 1>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <65000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+
+				target: trip-point1 {
+					temperature = <75000>;
+					hysteresis = <1000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					contribution = <1024>;
+					cooling-device =
+						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+
+				map1 {
+					trip = <&target>;
+					contribution = <512>;
+					cooling-device =
+						<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -346,13 +405,6 @@ crg_ctrl: crg_ctrl@fff35000 {
 			#clock-cells = <1>;
 		};
 
-		crg_rst: crg_rst_controller {
-			compatible = "hisilicon,hi3660-reset";
-			#reset-cells = <2>;
-			hisi,rst-syscon = <&crg_ctrl>;
-		};
-
-
 		pctrl: pctrl@e8a09000 {
 			compatible = "hisilicon,hi3660-pctrl", "syscon";
 			reg = <0x0 0xe8a09000 0x0 0x2000>;
@@ -378,12 +430,6 @@ iomcu: iomcu@ffd7e000 {
 
 		};
 
-		iomcu_rst: reset {
-			compatible = "hisilicon,hi3660-reset";
-			hisi,rst-syscon = <&iomcu>;
-			#reset-cells = <2>;
-		};
-
 		mailbox: mailbox@e896b000 {
 			compatible = "hisilicon,hi3660-mbox";
 			reg = <0x0 0xe896b000 0x0 0x1000>;
@@ -1115,51 +1161,6 @@ tsensor: tsensor@fff30000 {
 			#thermal-sensor-cells = <1>;
 		};
 
-		thermal-zones {
-
-			cls0: cls0-thermal {
-				polling-delay = <1000>;
-				polling-delay-passive = <100>;
-				sustainable-power = <4500>;
-
-				/* sensor ID */
-				thermal-sensors = <&tsensor 1>;
-
-				trips {
-					threshold: trip-point0 {
-						temperature = <65000>;
-						hysteresis = <1000>;
-						type = "passive";
-					};
-
-					target: trip-point1 {
-						temperature = <75000>;
-						hysteresis = <1000>;
-						type = "passive";
-					};
-				};
-
-				cooling-maps {
-					map0 {
-						trip = <&target>;
-						contribution = <1024>;
-						cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-					};
-					map1 {
-						trip = <&target>;
-						contribution = <512>;
-						cooling-device = <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-					};
-				};
-			};
-		};
-
 		usb3_otg_bc: usb3_otg_bc@ff200000 {
 			compatible = "hisilicon,hi3660-usb3-otg-bc", "syscon", "simple-mfd";
 			reg = <0x0 0xff200000 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
index 0db1849a2878..835b6a620548 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
@@ -139,6 +139,19 @@ IRQ_TYPE_LEVEL_LOW)>,
 		clock-frequency = <1920000>;
 	};
 
+	crg_rst: crg_rst_controller {
+		compatible = "hisilicon,hi3670-reset",
+			     "hisilicon,hi3660-reset";
+		#reset-cells = <2>;
+		hisi,rst-syscon = <&crg_ctrl>;
+	};
+
+	iomcu_rst: reset {
+		compatible = "hisilicon,hi3660-reset";
+		hisi,rst-syscon = <&iomcu>;
+		#reset-cells = <2>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -151,13 +164,6 @@ crg_ctrl: crg_ctrl@fff35000 {
 			#clock-cells = <1>;
 		};
 
-		crg_rst: crg_rst_controller {
-			compatible = "hisilicon,hi3670-reset",
-				     "hisilicon,hi3660-reset";
-			#reset-cells = <2>;
-			hisi,rst-syscon = <&crg_ctrl>;
-		};
-
 		pctrl: pctrl@e8a09000 {
 			compatible = "hisilicon,hi3670-pctrl", "syscon";
 			reg = <0x0 0xe8a09000 0x0 0x1000>;
@@ -194,12 +200,6 @@ media2_crg: media2_crgctrl@e8900000 {
 			#clock-cells = <1>;
 		};
 
-		iomcu_rst: reset {
-			compatible = "hisilicon,hi3660-reset";
-			hisi,rst-syscon = <&iomcu>;
-			#reset-cells = <2>;
-		};
-
 		uart0: serial@fdf02000 {
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xfdf02000 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
index 3f387f4cf5e0..7d540cb040d3 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220-coresight.dtsi
@@ -9,6 +9,39 @@
  */
 
 / {
+	replicator {
+		compatible = "arm,coresight-static-replicator";
+		clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
+		clock-names = "apb_pclk";
+
+		in-ports {
+			port {
+				replicator_in: endpoint {
+					remote-endpoint = <&etf_out>;
+				};
+			};
+		};
+
+		out-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				replicator_out0: endpoint {
+					remote-endpoint = <&etr_in>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				replicator_out1: endpoint {
+					remote-endpoint = <&tpiu_in>;
+				};
+			};
+		};
+	};
+
 	soc {
 		funnel@f6401000 {
 			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
@@ -60,42 +93,6 @@ etf_out: endpoint {
 			};
 		};
 
-		replicator {
-			compatible = "arm,coresight-static-replicator";
-			clocks = <&acpu_sctrl HI6220_ACPU_SFT_AT_S>;
-			clock-names = "apb_pclk";
-
-			in-ports {
-				port {
-					replicator_in: endpoint {
-						remote-endpoint =
-							<&etf_out>;
-					};
-				};
-			};
-
-			out-ports {
-				#address-cells = <1>;
-				#size-cells = <0>;
-
-				port@0 {
-					reg = <0>;
-					replicator_out0: endpoint {
-						remote-endpoint =
-							<&etr_in>;
-					};
-				};
-
-				port@1 {
-					reg = <1>;
-					replicator_out1: endpoint {
-						remote-endpoint =
-							<&tpiu_in>;
-					};
-				};
-			};
-		};
-
 		etr@f6404000 {
 			compatible = "arm,coresight-tmc", "arm,primecell";
 			reg = <0 0xf6404000 0 0x1000>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 21eb268b5731..8bb74b4274a9 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -249,6 +249,61 @@ timer {
 			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
+	stub_clock: stub_clock {
+		compatible = "hisilicon,hi6220-stub-clk";
+		hisilicon,hi6220-clk-sram = <&sram>;
+		#clock-cells = <1>;
+		mbox-names = "mbox-tx";
+		mboxes = <&mailbox 1 0 11>;
+	};
+
+	usb_phy: usbphy {
+		compatible = "hisilicon,hi6220-usb-phy";
+		#phy-cells = <0>;
+		phy-supply = <&reg_5v_hub>;
+		hisilicon,peripheral-syscon = <&sys_ctrl>;
+	};
+
+	thermal-zones {
+		cls0: cls0-thermal {
+			polling-delay = <1000>;
+			polling-delay-passive = <100>;
+			sustainable-power = <3326>;
+
+			/* sensor ID */
+			thermal-sensors = <&tsensor 2>;
+
+			trips {
+				threshold: trip-point0 {
+					temperature = <65000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+
+				target: trip-point1 {
+					temperature = <75000>;
+					hysteresis = <0>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device =
+						<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+						<&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+				};
+			};
+		};
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -298,14 +353,6 @@ medianoc_ade: medianoc_ade@f4520000 {
 			reg = <0x0 0xf4520000 0x0 0x4000>;
 		};
 
-		stub_clock: stub_clock {
-			compatible = "hisilicon,hi6220-stub-clk";
-			hisilicon,hi6220-clk-sram = <&sram>;
-			#clock-cells = <1>;
-			mbox-names = "mbox-tx";
-			mboxes = <&mailbox 1 0 11>;
-		};
-
 		uart0: serial@f8015000 {	/* console */
 			compatible = "arm,pl011", "arm,primecell";
 			reg = <0x0 0xf8015000 0x0 0x1000>;
@@ -769,13 +816,6 @@ i2c2: i2c@f7102000 {
 			status = "disabled";
 		};
 
-		usb_phy: usbphy {
-			compatible = "hisilicon,hi6220-usb-phy";
-			#phy-cells = <0>;
-			phy-supply = <&reg_5v_hub>;
-			hisilicon,peripheral-syscon = <&sys_ctrl>;
-		};
-
 		usb: usb@f72c0000 {
 			compatible = "hisilicon,hi6220-usb";
 			reg = <0x0 0xf72c0000 0x0 0x40000>;
@@ -872,46 +912,6 @@ i2s0: i2s@f7118000 {
 			#sound-dai-cells = <1>;
 		};
 
-		thermal-zones {
-
-			cls0: cls0-thermal {
-				polling-delay = <1000>;
-				polling-delay-passive = <100>;
-				sustainable-power = <3326>;
-
-				/* sensor ID */
-				thermal-sensors = <&tsensor 2>;
-
-				trips {
-					threshold: trip-point0 {
-						temperature = <65000>;
-						hysteresis = <0>;
-						type = "passive";
-					};
-
-					target: trip-point1 {
-						temperature = <75000>;
-						hysteresis = <0>;
-						type = "passive";
-					};
-				};
-
-				cooling-maps {
-					map0 {
-						trip = <&target>;
-						cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
-								 <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
-					};
-				};
-			};
-		};
-
 		ade: ade@f4100000 {
 			compatible = "hisilicon,hi6220-ade";
 			reg = <0x0 0xf4100000 0x0 0x7800>;
diff --git a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
index b801a48041f9..dd1426c4eada 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi
@@ -7,12 +7,12 @@
 #include <dt-bindings/pinctrl/hisi.h>
 
 / {
-	soc {
-		/* [IOMG_000, IOMG_123] */
-		range: gpio-range {
-			#pinctrl-single,gpio-range-cells = <3>;
-		};
+	/* [IOMG_000, IOMG_123] */
+	range: gpio-range {
+		#pinctrl-single,gpio-range-cells = <3>;
+	};
 
+	soc {
 		pmx0: pinmux@e896c000 {
 			compatible = "pinctrl-single";
 			reg = <0x0 0xe896c000 0x0 0x1f0>;
diff --git a/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi b/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
index 8f7bf80e6ece..cd924a091214 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey970-pinctrl.dtsi
@@ -6,11 +6,11 @@
 #include <dt-bindings/pinctrl/hisi.h>
 
 / {
-	soc {
-		range: gpio-range {
-			#pinctrl-single,gpio-range-cells = <3>;
-		};
+	range: gpio-range {
+		#pinctrl-single,gpio-range-cells = <3>;
+	};
 
+	soc {
 		pmx0: pinmux@e896c000 {
 			compatible = "pinctrl-single";
 			reg = <0x0 0xe896c000 0x0 0x72c>;

-- 
2.53.0

[PATCH 09/12] arm64: dts: hisilicon: Correct DMA node names

[Rob Herring (Arm)]

Use the dma-controller node name required by the K3 DMA binding.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 2 +-
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
index 9f0b5d5b97cb..f9c1f7718b82 100644
--- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi
@@ -604,7 +604,7 @@ uart6: serial@fff32000 {
 			status = "disabled";
 		};
 
-		dma0: dma@fdf30000 {
+		dma0: dma-controller@fdf30000 {
 			compatible = "hisilicon,k3-dma-1.0";
 			reg = <0x0 0xfdf30000 0x0 0x1000>;
 			#dma-cells = <1>;
diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 8bb74b4274a9..1cf552d02ecd 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -412,7 +412,7 @@ uart4: serial@f7114000 {
 			status = "disabled";
 		};
 
-		dma0: dma@f7370000 {
+		dma0: dma-controller@f7370000 {
 			compatible = "hisilicon,k3-dma-1.0";
 			reg = <0x0 0xf7370000 0x0 0x1000>;
 			#dma-cells = <1>;

-- 
2.53.0

[PATCH 10/12] arm64: dts: hisilicon: hi6220: Correct I2S channel ordering

[Rob Herring (Arm)]

List the Hi6220 I2S transmit channel before receive, preserving the
channel-to-name association while matching the binding order.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
index 1cf552d02ecd..2d65d9b501ce 100644
--- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi
@@ -906,8 +906,8 @@ i2s0: i2s@f7118000 {
 			clocks = <&sys_ctrl HI6220_DACODEC_PCLK>,
 				 <&sys_ctrl HI6220_BBPPLL0_DIV>;
 			clock-names = "dacodec", "i2s-base";
-			dmas = <&dma0 15 &dma0 14>;
-			dma-names = "rx", "tx";
+			dmas = <&dma0 14>, <&dma0 15>;
+			dma-names = "tx", "rx";
 			hisilicon,sysctrl-syscon = <&sys_ctrl>;
 			#sound-dai-cells = <1>;
 		};

-- 
2.53.0

[PATCH 11/12] arm64: dts: hisilicon: Remove obsolete HiKey970 PMIC GPIO property

[Rob Herring (Arm)]

The PMIC IRQ driver obtains its interrupt using platform_get_irq().
Remove the unused gpios property; interrupt-parent and interrupts
already describe the same line.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
index 299c4ab630e8..12f1f972ffde 100644
--- a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
@@ -21,7 +21,6 @@ pmic: pmic@0 {
 
 			#interrupt-cells = <2>;
 			interrupt-controller;
-			gpios = <&gpio28 0 0>;
 
 			regulators {
 				ldo3: ldo3 { /* HDMI */

-- 
2.53.0

[PATCH 12/12] arm64: dts: hisilicon: Remove unsupported SBSA UART "reg-io-width"

[Rob Herring (Arm)]

The SBSA UART driver uses 4 byte access width by default and
"reg-io-width" is not supported in the binding, so drop it.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
---
 arch/arm64/boot/dts/hisilicon/hip07.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index b815c1fff6ea..08c8a57e5471 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1196,7 +1196,6 @@ uart0: serial@602b0000 {
 			interrupt-parent = <&mbigen_uart>;
 			interrupts = <807 4>;
 			current-speed = <115200>;
-			reg-io-width = <4>;
 			status = "disabled";
 		};
 

-- 
2.53.0