From: Vladimir Bely <vlwwwwww@gmail.com>
To: Jiaxing Hu <gahing@gahingwoo.com>
Cc: heiko@sntech.de, ulfh@kernel.org, finley.xiao@rock-chips.com,
zhangqing@rock-chips.com, abel.vesa@oss.qualcomm.com,
tomeu@tomeuvizoso.net, royalnet026@gmail.com,
sebastian.reichel@collabora.com, shawn.lin@rock-chips.com,
chaoyi.chen@rock-chips.com, diederik@cknow-tech.com,
linux-rockchip@lists.infradead.org, linux-pm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v16 09/16] pmdomain: rockchip: add optional per-domain power-on settle delay
Date: Fri, 13 Nov 2026 16:23:22 +0300 [thread overview]
Message-ID: <20261113132323.159015-1-vlwwwwww@gmail.com> (raw)
In-Reply-To: <20261108065917.135194-10-gahing@gahingwoo.com>
On Sun, Nov 08, 2026 at 07:59:10PM +1300, Jiaxing Hu wrote:
> The NPU power domain is switched off when the driver probes, so the first
> power-on goes through this wait even when the bootloader left the NPU on.
[...]
> + [RK3576_PD_NPU] = DOMAIN_RK3576_R("npu", 0x0, BIT(0), BIT(0), 0, 0x0, 0, 0, 0, 0, false),
Hi Jiaxing,
(reply to https://lore.kernel.org/all/20261108065917.135194-10-gahing@gahingwoo.com/ )
This probe-time power-off hangs a board that does not enable the NPU.
I hit it with v14 as Armbian carries it on 7.3.3; v16 has the same
DOMAIN_RK3576_R("npu", ...), so I expect the same there, but I have not
run v16.
Board: FriendlyElec NanoPi R76S. Its DTS has no domain-supply on pd_npu
and the NPU nodes stay disabled. vdd_npu_s0 is RK806 dcdc-reg2,
regulator-boot-on, no consumers.
On about every second boot the SoC hangs hard ~30 s after start: no
oops, no answer to SysRq over the serial console, only the watchdog
gets it out. The last console line is "vdd_npu_s0: disabling" from
regulator_late_cleanup(). The kernel without the series (7.2.8) does
not hang. 10 boots each, no hang, with any of:
- regulator_ignore_unused
- regulator-always-on on vdd_npu_s0 only
- the NPU enabled as in your ROCK 4D patch (domain-supply and
npu-supply on vdd_npu_s0, cores and MMUs okay)
PMU registers after boot (regmap debugfs of 27380000.power-management):
NPU not enabled NPU enabled as on ROCK 4D
0x110 req 0x000013e0 0x000013fe
0x128 idle 0x000313e0 0x000313fe
0x214 pwr 0x0000003e 0x000001fe
0x230 stat 0x003e4181 0x01fe4181
With the NPU not enabled, nputop/npu0/npu1 (bits 6..8 at 0x214) are
still powered and their idle requests (bits 1..4 at 0x110) are not set,
while pm_genpd_summary lists npu, nputop, npu0 and npu1 as off-0 from
early boot.
My reading: rockchip_pm_add_one_domain() powers the parent "npu" domain
off at probe because of need_regulator, but the children U-Boot left on
are neither idled nor powered off first, and genpd then treats them as
off, so nothing cleans them up. When vdd_npu_s0 is cut later, the bus
hangs on those NIUs. I have not dumped the PMU on a kernel without the
series and have not tested a kernel fix, so this is a report rather
than a diagnosis. Idling and powering off the children that are on
before the parent at probe, or skipping the probe power-off when there
is no domain-supply, look like possible directions.
This would hit every RK3576 board that does not enable the NPU, which
is most of them.
More detail: https://github.com/gahingwoo/linux-rk3576-npu/issues/4
I am happy to test patches on the R76S; it has a serial console.
Thanks,
Vladimir
next prev parent reply other threads:[~2026-11-13 13:23 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-08 6:59 [PATCH v16 00/16] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 01/16] accel/rocket: request the core clocks by name Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 02/16] accel/rocket: take the completion register writes under job_lock Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 03/16] accel/rocket: wait for a running IRQ handler before resetting a core Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 04/16] accel/rocket: let the core suspend after a reset Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 05/16] accel/rocket: factor the completion tail out of the IRQ handler Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 06/16] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 07/16] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 08/16] dt-bindings: iommu: rockchip: describe the RK3576 NPU MMU Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 09/16] pmdomain: rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-11-11 7:46 ` Finley Xiao
2026-11-13 13:23 ` Vladimir Bely [this message]
2026-11-08 6:59 ` [PATCH v16 10/16] pmdomain: rockchip: cycle an optional power-domain reset on power-on Jiaxing Hu
2026-11-11 8:23 ` Finley Xiao
2026-11-12 7:21 ` Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 11/16] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 12/16] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 13/16] accel/rocket: add a GET_PARAM ioctl for the hardware version Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 14/16] arm64: dts: rockchip: add NPU core domain clocks and resets to rk3576 Jiaxing Hu
2026-11-11 9:06 ` Finley Xiao
2026-11-08 6:59 ` [PATCH v16 15/16] arm64: dts: rockchip: add NPU (RKNN) nodes " Jiaxing Hu
2026-11-08 6:59 ` [PATCH v16 16/16] arm64: dts: rockchip: enable the NPU on rk3576-rock-4d Jiaxing Hu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261113132323.159015-1-vlwwwwww@gmail.com \
--to=vlwwwwww@gmail.com \
--cc=abel.vesa@oss.qualcomm.com \
--cc=chaoyi.chen@rock-chips.com \
--cc=diederik@cknow-tech.com \
--cc=finley.xiao@rock-chips.com \
--cc=gahing@gahingwoo.com \
--cc=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=royalnet026@gmail.com \
--cc=sebastian.reichel@collabora.com \
--cc=shawn.lin@rock-chips.com \
--cc=tomeu@tomeuvizoso.net \
--cc=ulfh@kernel.org \
--cc=zhangqing@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®