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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Swapnil Jakhade <sjakhade@cadence.com>, <vkoul@kernel.org>,
	<p.zabel@pengutronix.de>, <linux-phy@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>
Cc: <mparab@cadence.com>, <lokeshvutla@ti.com>
Subject: Re: [PATCH 13/14] phy: cadence-torrent: Add debug information for PHY configuration
Date: Thu, 13 May 2021 13:24:00 +0530	[thread overview]
Message-ID: <24ec95cd-aa7c-6262-4065-7281788ab684@ti.com> (raw)
In-Reply-To: <1617946456-27773-14-git-send-email-sjakhade@cadence.com>

Hi Swapnil,

On 09/04/21 11:04 am, Swapnil Jakhade wrote:
> Display information in probe regarding PHY configuration parameters like
> single link or multilink protocol information along with number of lanes
> used for each protocol link.
> 
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
> ---
>  drivers/phy/cadence/phy-cadence-torrent.c | 32 +++++++++++++++++++++--
>  1 file changed, 30 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
> index bf37569c6c51..39145e56e061 100644
> --- a/drivers/phy/cadence/phy-cadence-torrent.c
> +++ b/drivers/phy/cadence/phy-cadence-torrent.c
> @@ -574,6 +574,24 @@ static const struct coefficients vltg_coeff[4][4] = {
>  	}
>  };
>  
> +static const char *cdns_torrent_get_phy_type(enum cdns_torrent_phy_type phy_type)
> +{
> +	switch (phy_type) {
> +	case TYPE_DP:
> +		return "DisplayPort";
> +	case TYPE_PCIE:
> +		return "PCIe";
> +	case TYPE_SGMII:
> +		return "SGMII";
> +	case TYPE_QSGMII:
> +		return "QSGMII";
> +	case TYPE_USB:
> +		return "USB";
> +	default:
> +		return "None";
> +	}
> +}
> +
>  /*
>   * Set registers responsible for enabling and configuring SSC, with second and
>   * third register values provided by parameters.
> @@ -2504,8 +2522,7 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
>  				init_dp_regmap++;
>  			}
>  
> -			dev_info(dev, "%d lanes, max bit rate %d.%03d Gbps\n",
> -				 cdns_phy->phys[node].num_lanes,
> +			dev_info(dev, "DP max bit rate %d.%03d Gbps\n",
>  				 cdns_phy->max_bit_rate / 1000,
>  				 cdns_phy->max_bit_rate % 1000);
>  
> @@ -2539,6 +2556,17 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev)
>  		goto put_lnk_rst;
>  	}
>  
> +	if (cdns_phy->nsubnodes > 1)
> +		dev_info(dev, "%s (%d lanes) & %s (%d lanes)",
> +			 cdns_torrent_get_phy_type(cdns_phy->phys[0].phy_type),
> +			 cdns_phy->phys[0].num_lanes,
> +			 cdns_torrent_get_phy_type(cdns_phy->phys[1].phy_type),
> +			 cdns_phy->phys[1].num_lanes);
> +	else
> +		dev_info(dev, "%s (%d lanes)",
> +			 cdns_torrent_get_phy_type(cdns_phy->phys[0].phy_type),
> +			 cdns_phy->phys[0].num_lanes);

Make all of this dev_dbg() or dev_vdbg() and avoid noisy boot log.

Thanks
Kishon

  reply	other threads:[~2021-05-13  7:54 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-09  5:34 [PATCH 00/14] PHY: Add multilink DP support in Cadence Torrent PHY driver Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 01/14] phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message Swapnil Jakhade
2021-05-13  6:35   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 02/14] phy: cadence-torrent: Reorder few functions to remove function declarations Swapnil Jakhade
2021-05-13  6:37   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 03/14] phy: cadence-torrent: Add enum to support different input reference clocks Swapnil Jakhade
2021-05-13  6:43   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 04/14] phy: cadence-torrent: Select register configuration based on PHY reference clock Swapnil Jakhade
2021-05-13  6:48   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 05/14] phy: cadence-torrent: Add PHY registers for DP in array format Swapnil Jakhade
2021-05-13  6:52   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 06/14] phy: cadence-torrent: Reorder functions to avoid function declarations Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 07/14] " Swapnil Jakhade
2021-04-09  5:34 ` [PATCH 08/14] phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock Swapnil Jakhade
2021-05-13  6:59   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 09/14] phy: cadence-torrent: Add separate functions for reusable code Swapnil Jakhade
2021-05-13  7:00   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 10/14] phy: cadence-torrent: Add function to get PLL to be configured for DP Swapnil Jakhade
2021-05-13  7:12   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 11/14] phy: cadence-torrent: Add multilink DP support Swapnil Jakhade
2021-05-13  7:44   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 12/14] phy: cadence-torrent: Add PCIe + DP multilink configuration Swapnil Jakhade
2021-05-13  7:47   ` Kishon Vijay Abraham I
2021-04-09  5:34 ` [PATCH 13/14] phy: cadence-torrent: Add debug information for PHY configuration Swapnil Jakhade
2021-05-13  7:54   ` Kishon Vijay Abraham I [this message]
2021-04-09  5:34 ` [PATCH 14/14] phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation Swapnil Jakhade
2021-05-13  7:55   ` Kishon Vijay Abraham I

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