From: Kishon Vijay Abraham I <kishon@ti.com>
To: Swapnil Jakhade <sjakhade@cadence.com>, <vkoul@kernel.org>,
<p.zabel@pengutronix.de>, <linux-phy@lists.infradead.org>,
<linux-kernel@vger.kernel.org>
Cc: <mparab@cadence.com>, <lokeshvutla@ti.com>
Subject: Re: [PATCH 01/14] phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message
Date: Thu, 13 May 2021 12:05:52 +0530 [thread overview]
Message-ID: <286c7937-d426-c50e-21b0-3fc24b6e367a@ti.com> (raw)
In-Reply-To: <1617946456-27773-2-git-send-email-sjakhade@cadence.com>
On 09/04/21 11:04 am, Swapnil Jakhade wrote:
> Script checkpatch with --strict option gives message:
> CHECK: Avoid CamelCase: <REF_CLK_19_2MHz>
> CHECK: Avoid CamelCase: <REF_CLK_25MHz>
> Fix this by removing CamelCase usage. No functional change.
>
> Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> drivers/phy/cadence/phy-cadence-torrent.c | 24 +++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c
> index 0477e7beebbf..ff647669f1a3 100644
> --- a/drivers/phy/cadence/phy-cadence-torrent.c
> +++ b/drivers/phy/cadence/phy-cadence-torrent.c
> @@ -24,8 +24,8 @@
> #include <linux/reset.h>
> #include <linux/regmap.h>
>
> -#define REF_CLK_19_2MHz 19200000
> -#define REF_CLK_25MHz 25000000
> +#define REF_CLK_19_2MHZ 19200000
> +#define REF_CLK_25MHZ 25000000
>
> #define MAX_NUM_LANES 4
> #define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */
> @@ -695,12 +695,12 @@ static int cdns_torrent_dp_configure_rate(struct cdns_torrent_phy *cdns_phy,
> ndelay(200);
>
> /* DP Rate Change - VCO Output settings. */
> - if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHz) {
> + if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHZ) {
> /* PMA common configuration 19.2MHz */
> cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz(cdns_phy, dp->link_rate,
> dp->ssc);
> cdns_torrent_dp_pma_cmn_cfg_19_2mhz(cdns_phy);
> - } else if (cdns_phy->ref_clk_rate == REF_CLK_25MHz) {
> + } else if (cdns_phy->ref_clk_rate == REF_CLK_25MHZ) {
> /* PMA common configuration 25MHz */
> cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy, dp->link_rate,
> dp->ssc);
> @@ -993,8 +993,8 @@ static int cdns_torrent_dp_init(struct phy *phy)
> struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
>
> switch (cdns_phy->ref_clk_rate) {
> - case REF_CLK_19_2MHz:
> - case REF_CLK_25MHz:
> + case REF_CLK_19_2MHZ:
> + case REF_CLK_25MHZ:
> /* Valid Ref Clock Rate */
> break;
> default:
> @@ -1026,11 +1026,11 @@ static int cdns_torrent_dp_init(struct phy *phy)
>
> /* PHY PMA registers configuration functions */
> /* Initialize PHY with max supported link rate, without SSC. */
> - if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHz)
> + if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHZ)
> cdns_torrent_dp_pma_cmn_vco_cfg_19_2mhz(cdns_phy,
> cdns_phy->max_bit_rate,
> false);
> - else if (cdns_phy->ref_clk_rate == REF_CLK_25MHz)
> + else if (cdns_phy->ref_clk_rate == REF_CLK_25MHZ)
> cdns_torrent_dp_pma_cmn_vco_cfg_25mhz(cdns_phy,
> cdns_phy->max_bit_rate,
> false);
> @@ -1074,10 +1074,10 @@ static void cdns_torrent_dp_pma_cfg(struct cdns_torrent_phy *cdns_phy,
> {
> unsigned int i;
>
> - if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHz)
> + if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHZ)
> /* PMA common configuration 19.2MHz */
> cdns_torrent_dp_pma_cmn_cfg_19_2mhz(cdns_phy);
> - else if (cdns_phy->ref_clk_rate == REF_CLK_25MHz)
> + else if (cdns_phy->ref_clk_rate == REF_CLK_25MHZ)
> /* PMA common configuration 25MHz */
> cdns_torrent_dp_pma_cmn_cfg_25mhz(cdns_phy);
>
> @@ -1529,10 +1529,10 @@ static void cdns_torrent_dp_pma_lane_cfg(struct cdns_torrent_phy *cdns_phy,
> unsigned int lane)
> {
> /* Per lane, refclock-dependent receiver detection setting */
> - if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHz)
> + if (cdns_phy->ref_clk_rate == REF_CLK_19_2MHZ)
> cdns_torrent_phy_write(cdns_phy->regmap_tx_lane_cdb[lane],
> TX_RCVDET_ST_TMR, 0x0780);
> - else if (cdns_phy->ref_clk_rate == REF_CLK_25MHz)
> + else if (cdns_phy->ref_clk_rate == REF_CLK_25MHZ)
> cdns_torrent_phy_write(cdns_phy->regmap_tx_lane_cdb[lane],
> TX_RCVDET_ST_TMR, 0x09C4);
>
>
next prev parent reply other threads:[~2021-05-13 6:36 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-09 5:34 [PATCH 00/14] PHY: Add multilink DP support in Cadence Torrent PHY driver Swapnil Jakhade
2021-04-09 5:34 ` [PATCH 01/14] phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK message Swapnil Jakhade
2021-05-13 6:35 ` Kishon Vijay Abraham I [this message]
2021-04-09 5:34 ` [PATCH 02/14] phy: cadence-torrent: Reorder few functions to remove function declarations Swapnil Jakhade
2021-05-13 6:37 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 03/14] phy: cadence-torrent: Add enum to support different input reference clocks Swapnil Jakhade
2021-05-13 6:43 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 04/14] phy: cadence-torrent: Select register configuration based on PHY reference clock Swapnil Jakhade
2021-05-13 6:48 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 05/14] phy: cadence-torrent: Add PHY registers for DP in array format Swapnil Jakhade
2021-05-13 6:52 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 06/14] phy: cadence-torrent: Reorder functions to avoid function declarations Swapnil Jakhade
2021-04-09 5:34 ` [PATCH 07/14] " Swapnil Jakhade
2021-04-09 5:34 ` [PATCH 08/14] phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clock Swapnil Jakhade
2021-05-13 6:59 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 09/14] phy: cadence-torrent: Add separate functions for reusable code Swapnil Jakhade
2021-05-13 7:00 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 10/14] phy: cadence-torrent: Add function to get PLL to be configured for DP Swapnil Jakhade
2021-05-13 7:12 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 11/14] phy: cadence-torrent: Add multilink DP support Swapnil Jakhade
2021-05-13 7:44 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 12/14] phy: cadence-torrent: Add PCIe + DP multilink configuration Swapnil Jakhade
2021-05-13 7:47 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 13/14] phy: cadence-torrent: Add debug information for PHY configuration Swapnil Jakhade
2021-05-13 7:54 ` Kishon Vijay Abraham I
2021-04-09 5:34 ` [PATCH 14/14] phy: cadence-torrent: Check PIPE mode PHY status to be ready for operation Swapnil Jakhade
2021-05-13 7:55 ` Kishon Vijay Abraham I
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