[PATCH v2 0/4] some updates and cleanups for hisilicon/sec2.

[PATCH v2 0/4] some updates and cleanups for hisilicon/sec2.

[Qi Tao]

This seires patch mainly add some RAS registers to enhance the 
DFX positioning function and fix some cleanup issues.

Qi Tao (3):
  crypto: hisilicon/sec2 - updates the sec DFX function register
  crypto: hisilicon/sec2 - modify nested macro call
  crypto: hisilicon/sec2 - fix some cleanup issues

Wenkai Lin (1):
  crypto: hisilicon/sec - remove unused parameter

 drivers/crypto/hisilicon/sec2/sec_crypto.c | 33 ++++++++--------------
 drivers/crypto/hisilicon/sec2/sec_main.c   |  5 ++++
 2 files changed, 17 insertions(+), 21 deletions(-)

-- 
2.33.0

[PATCH 1/4] crypto: hisilicon/sec2 - updates the sec DFX function register

[Qi Tao]

As the sec DFX function is enhanced, some RAS registers are added
to the original DFX registers to enhance the DFX positioning function.

Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
 drivers/crypto/hisilicon/sec2/sec_main.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index 7bb99381bbdf..5fc4d56ee873 100644
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -282,6 +282,11 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
 	{"SEC_BD_SAA6                   ",  0x301C38},
 	{"SEC_BD_SAA7                   ",  0x301C3C},
 	{"SEC_BD_SAA8                   ",  0x301C40},
+	{"SEC_RAS_CE_ENABLE             ",  0x301050},
+	{"SEC_RAS_FE_ENABLE             ",  0x301054},
+	{"SEC_RAS_NFE_ENABLE            ",  0x301058},
+	{"SEC_REQ_TRNG_TIME_TH          ",  0x30112C},
+	{"SEC_CHANNEL_RNG_REQ_THLD      ",  0x302110},
 };
 
 /* define the SEC's dfx regs region and region length */
-- 
2.33.0

[PATCH 2/4] crypto: hisilicon/sec2 - modify nested macro call

[Qi Tao]

Nested macros are integrated into a single macro,
making the code simpler.

Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
 drivers/crypto/hisilicon/sec2/sec_crypto.c | 13 ++++---------
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.c b/drivers/crypto/hisilicon/sec2/sec_crypto.c
index f028dcfd0ead..692ba3213cc6 100644
--- a/drivers/crypto/hisilicon/sec2/sec_crypto.c
+++ b/drivers/crypto/hisilicon/sec2/sec_crypto.c
@@ -2145,8 +2145,8 @@ static int sec_skcipher_decrypt(struct skcipher_request *sk_req)
 	return sec_skcipher_crypto(sk_req, false);
 }
 
-#define SEC_SKCIPHER_GEN_ALG(sec_cra_name, sec_set_key, sec_min_key_size, \
-	sec_max_key_size, ctx_init, ctx_exit, blk_size, iv_size)\
+#define SEC_SKCIPHER_ALG(sec_cra_name, sec_set_key, \
+	sec_min_key_size, sec_max_key_size, blk_size, iv_size)\
 {\
 	.base = {\
 		.cra_name = sec_cra_name,\
@@ -2158,8 +2158,8 @@ static int sec_skcipher_decrypt(struct skcipher_request *sk_req)
 		.cra_ctxsize = sizeof(struct sec_ctx),\
 		.cra_module = THIS_MODULE,\
 	},\
-	.init = ctx_init,\
-	.exit = ctx_exit,\
+	.init = sec_skcipher_ctx_init,\
+	.exit = sec_skcipher_ctx_exit,\
 	.setkey = sec_set_key,\
 	.decrypt = sec_skcipher_decrypt,\
 	.encrypt = sec_skcipher_encrypt,\
@@ -2168,11 +2168,6 @@ static int sec_skcipher_decrypt(struct skcipher_request *sk_req)
 	.ivsize = iv_size,\
 }
 
-#define SEC_SKCIPHER_ALG(name, key_func, min_key_size, \
-	max_key_size, blk_size, iv_size) \
-	SEC_SKCIPHER_GEN_ALG(name, key_func, min_key_size, max_key_size, \
-	sec_skcipher_ctx_init, sec_skcipher_ctx_exit, blk_size, iv_size)
-
 static struct sec_skcipher sec_skciphers[] = {
 	{
 		.alg_msk = BIT(0),
-- 
2.33.0

[PATCH 3/4] crypto: hisilicon/sec2 - fix some cleanup issues

[Qi Tao]

This patch fixes following cleanup issues:
 - The return value of the function is
   inconsistent with the actual return type.
 - After the pointer type is directly converted
   to the '__le64' type, the program may crash
   or produce unexpected results.

Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
 drivers/crypto/hisilicon/sec2/sec_crypto.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.c b/drivers/crypto/hisilicon/sec2/sec_crypto.c
index 692ba3213cc6..5d4facf62c86 100644
--- a/drivers/crypto/hisilicon/sec2/sec_crypto.c
+++ b/drivers/crypto/hisilicon/sec2/sec_crypto.c
@@ -118,7 +118,7 @@ struct sec_aead {
 };
 
 /* Get an en/de-cipher queue cyclically to balance load over queues of TFM */
-static inline int sec_alloc_queue_id(struct sec_ctx *ctx, struct sec_req *req)
+static inline u32 sec_alloc_queue_id(struct sec_ctx *ctx, struct sec_req *req)
 {
 	if (req->c_req.encrypt)
 		return (u32)atomic_inc_return(&ctx->enc_qcyclic) %
@@ -1371,7 +1371,7 @@ static int sec_skcipher_bd_fill_v3(struct sec_ctx *ctx, struct sec_req *req)
 	sec_sqe3->bd_param = cpu_to_le32(bd_param);
 
 	sec_sqe3->c_len_ivin |= cpu_to_le32(c_req->c_len);
-	sec_sqe3->tag = cpu_to_le64(req);
+	sec_sqe3->tag = cpu_to_le64((unsigned long)(uintptr_t)req);
 
 	return 0;
 }
-- 
2.33.0

Re: [PATCH 3/4] crypto: hisilicon/sec2 - fix some cleanup issues

[Herbert Xu]

On Fri, Dec 29, 2023 at 02:44:20PM +0800, Qi Tao wrote:
>
> @@ -1371,7 +1371,7 @@ static int sec_skcipher_bd_fill_v3(struct sec_ctx *ctx, struct sec_req *req)
>  	sec_sqe3->bd_param = cpu_to_le32(bd_param);
>  
>  	sec_sqe3->c_len_ivin |= cpu_to_le32(c_req->c_len);
> -	sec_sqe3->tag = cpu_to_le64(req);
> +	sec_sqe3->tag = cpu_to_le64((unsigned long)(uintptr_t)req);

Please explain why you're casting twice.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

Re: [PATCH 3/4] crypto: hisilicon/sec2 - fix some cleanup issues

[taoqi]

On 2024/1/25 17:37, Herbert Xu wrote:
> On Fri, Dec 29, 2023 at 02:44:20PM +0800, Qi Tao wrote:
>>
>> @@ -1371,7 +1371,7 @@ static int sec_skcipher_bd_fill_v3(struct sec_ctx *ctx, struct sec_req *req)
>>   	sec_sqe3->bd_param = cpu_to_le32(bd_param);
>>   
>>   	sec_sqe3->c_len_ivin |= cpu_to_le32(c_req->c_len);
>> -	sec_sqe3->tag = cpu_to_le64(req);
>> +	sec_sqe3->tag = cpu_to_le64((unsigned long)(uintptr_t)req);
> 
> Please explain why you're casting twice.
> 
> Thanks,

I'm sorry. I made a mistake here. unsigned long and uintptr_t are the 
same data type in linux kernel. The type cast is invalidly repeated 
here. Can I just keep (unsigned long) one cast?

Re: [PATCH 3/4] crypto: hisilicon/sec2 - fix some cleanup issues

[Herbert Xu]

On Fri, Jan 26, 2024 at 04:40:39PM +0800, taoqi wrote:
>
> I'm sorry. I made a mistake here. unsigned long and uintptr_t are the same
> data type in linux kernel. The type cast is invalidly repeated here. Can I
> just keep (unsigned long) one cast?

Yes that makes sense.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

[PATCH 4/4] crypto: hisilicon/sec - remove unused parameter

[Qi Tao]

From: Wenkai Lin <linwenkai6@hisilicon.com>

Unused parameter of static functions should be removed.

Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
---
 drivers/crypto/hisilicon/sec2/sec_crypto.c | 16 ++++++----------
 1 file changed, 6 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/hisilicon/sec2/sec_crypto.c b/drivers/crypto/hisilicon/sec2/sec_crypto.c
index 5d4facf62c86..ee6cc2e483ab 100644
--- a/drivers/crypto/hisilicon/sec2/sec_crypto.c
+++ b/drivers/crypto/hisilicon/sec2/sec_crypto.c
@@ -485,8 +485,7 @@ static void sec_alg_resource_free(struct sec_ctx *ctx,
 		sec_free_mac_resource(dev, qp_ctx->res);
 }
 
-static int sec_alloc_qp_ctx_resource(struct hisi_qm *qm, struct sec_ctx *ctx,
-				     struct sec_qp_ctx *qp_ctx)
+static int sec_alloc_qp_ctx_resource(struct sec_ctx *ctx, struct sec_qp_ctx *qp_ctx)
 {
 	u16 q_depth = qp_ctx->qp->sq_depth;
 	struct device *dev = ctx->dev;
@@ -541,8 +540,7 @@ static void sec_free_qp_ctx_resource(struct sec_ctx *ctx, struct sec_qp_ctx *qp_
 	kfree(qp_ctx->req_list);
 }
 
-static int sec_create_qp_ctx(struct hisi_qm *qm, struct sec_ctx *ctx,
-			     int qp_ctx_id, int alg_type)
+static int sec_create_qp_ctx(struct sec_ctx *ctx, int qp_ctx_id)
 {
 	struct sec_qp_ctx *qp_ctx;
 	struct hisi_qp *qp;
@@ -561,7 +559,7 @@ static int sec_create_qp_ctx(struct hisi_qm *qm, struct sec_ctx *ctx,
 	idr_init(&qp_ctx->req_idr);
 	INIT_LIST_HEAD(&qp_ctx->backlog);
 
-	ret = sec_alloc_qp_ctx_resource(qm, ctx, qp_ctx);
+	ret = sec_alloc_qp_ctx_resource(ctx, qp_ctx);
 	if (ret)
 		goto err_destroy_idr;
 
@@ -614,7 +612,7 @@ static int sec_ctx_base_init(struct sec_ctx *ctx)
 	}
 
 	for (i = 0; i < sec->ctx_q_num; i++) {
-		ret = sec_create_qp_ctx(&sec->qm, ctx, i, 0);
+		ret = sec_create_qp_ctx(ctx, i);
 		if (ret)
 			goto err_sec_release_qp_ctx;
 	}
@@ -750,9 +748,7 @@ static void sec_skcipher_uninit(struct crypto_skcipher *tfm)
 	sec_ctx_base_uninit(ctx);
 }
 
-static int sec_skcipher_3des_setkey(struct crypto_skcipher *tfm, const u8 *key,
-				    const u32 keylen,
-				    const enum sec_cmode c_mode)
+static int sec_skcipher_3des_setkey(struct crypto_skcipher *tfm, const u8 *key, const u32 keylen)
 {
 	struct sec_ctx *ctx = crypto_skcipher_ctx(tfm);
 	struct sec_cipher_ctx *c_ctx = &ctx->c_ctx;
@@ -843,7 +839,7 @@ static int sec_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
 
 	switch (c_alg) {
 	case SEC_CALG_3DES:
-		ret = sec_skcipher_3des_setkey(tfm, key, keylen, c_mode);
+		ret = sec_skcipher_3des_setkey(tfm, key, keylen);
 		break;
 	case SEC_CALG_AES:
 	case SEC_CALG_SM4:
-- 
2.33.0

Re: [PATCH v2 0/4] some updates and cleanups for hisilicon/sec2.

[liulongfang]

On 2023/12/29 14:44, Qi Tao wrote:
> This seires patch mainly add some RAS registers to enhance the 
> DFX positioning function and fix some cleanup issues.
> 
> Qi Tao (3):
>   crypto: hisilicon/sec2 - updates the sec DFX function register
>   crypto: hisilicon/sec2 - modify nested macro call
>   crypto: hisilicon/sec2 - fix some cleanup issues
> 
> Wenkai Lin (1):
>   crypto: hisilicon/sec - remove unused parameter
> 
>  drivers/crypto/hisilicon/sec2/sec_crypto.c | 33 ++++++++--------------
>  drivers/crypto/hisilicon/sec2/sec_main.c   |  5 ++++
>  2 files changed, 17 insertions(+), 21 deletions(-)
> 

Reviewed-by: Longfang Liu <liulongfang@huawei.com>

Thanks,
Longfang.

Re: [PATCH v2 0/4] some updates and cleanups for hisilicon/sec2.

[taoqi]

On 2023/12/29 14:44, Qi Tao wrote:
> This seires patch mainly add some RAS registers to enhance the
> DFX positioning function and fix some cleanup issues.
> 
> Qi Tao (3):
>    crypto: hisilicon/sec2 - updates the sec DFX function register
>    crypto: hisilicon/sec2 - modify nested macro call
>    crypto: hisilicon/sec2 - fix some cleanup issues
> 
> Wenkai Lin (1):
>    crypto: hisilicon/sec - remove unused parameter
> 
>   drivers/crypto/hisilicon/sec2/sec_crypto.c | 33 ++++++++--------------
>   drivers/crypto/hisilicon/sec2/sec_main.c   |  5 ++++
>   2 files changed, 17 insertions(+), 21 deletions(-)
> 

I want to follow up on the patch I submitted three weeks ago.
please let me know if there is anything I can do to help move this 
process forward.

Thanks，
Qi Tao