[PATCH v1 0/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[PATCH v1 0/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[Richard Zhu]

Some SoCs have the limitation that PME/AER can't work over MSI. And
vendors route the AER/PME via the dedicated SPI interrupt which is only
handled by the controller driver.

Add the generic get_service_irqs() callback for bridge, to let portdrv
can fetch the vendor specific AER/PME interrupter by it.

Closes: https://lore.kernel.org/linux-pci/20250702223841.GA1905230@bhelgaas/
Tested on LS1046A RDB board, the AER interrupter can be triggered by
pull-out of EP device based on v6.16 kernel.

[PATCH v1 1/2] PCI/portdrv: Use get_service_irqs() callback to get
[PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

drivers/pci/controller/dwc/pcie-designware-host.c | 32 ++++++++++++++++++++++++++++++++
drivers/pci/pcie/portdrv.c                        |  7 +++++++
include/linux/pci.h                               |  1 +

[PATCH v1 1/2] PCI/portdrv: Use get_service_irqs() callback to get PME/AER irqs

[Richard Zhu]

Some PCI host bridges have limitation that AER/PME can't work over MSI.
Vendors route the AER/PME via the dedicated SPI interrupt which is only
handled by the controller driver.

Add the generic get_service_irqs() callback for bridge, to let portdrv
can fetch the vendor specific AER/PME interrupter by it.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 drivers/pci/pcie/portdrv.c | 7 +++++++
 include/linux/pci.h        | 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c
index e8318fd5f6ed5..035e6425ce034 100644
--- a/drivers/pci/pcie/portdrv.c
+++ b/drivers/pci/pcie/portdrv.c
@@ -176,11 +176,18 @@ static int pcie_port_enable_irq_vec(struct pci_dev *dev, int *irqs, int mask)
  */
 static int pcie_init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
 {
+	struct pci_host_bridge *host_bridge = pci_find_host_bridge(dev->bus);
 	int ret, i;
 
 	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
 		irqs[i] = -1;
 
+	if (host_bridge->get_service_irqs) {
+		ret = host_bridge->get_service_irqs(host_bridge, irqs, mask);
+		if (ret > 0)
+			return 0;
+	}
+
 	/*
 	 * If we support PME but can't use MSI/MSI-X for it, we have to
 	 * fall back to INTx or other interrupts, e.g., a system shared
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 05e68f35f3923..e681f2e6adc17 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -597,6 +597,7 @@ struct pci_host_bridge {
 	u8 (*swizzle_irq)(struct pci_dev *, u8 *); /* Platform IRQ swizzler */
 	int (*map_irq)(const struct pci_dev *, u8, u8);
 	void (*release_fn)(struct pci_host_bridge *);
+	int (*get_service_irqs)(struct pci_host_bridge *bridge, int *irqs, int mask);
 	int (*enable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
 	void (*disable_device)(struct pci_host_bridge *bridge, struct pci_dev *dev);
 	void		*release_data;
-- 
2.37.1

[PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[Richard Zhu]

Some PCI host bridges have limitation that AER/PME can't work over MSI.
Vendors route the AER/PME via the dedicated SPI interrupter which is
only handled by the controller driver.

Because that aer and pme had been defined in the snps,dw-pcie.yaml
document. Fetch the vendor specific AER/PME interrupters if they are
defined in the fdt file by generic bridge->get_service_irqs hook.

Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
 .../pci/controller/dwc/pcie-designware-host.c | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 906277f9ffaf7..9393dc99df81f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -13,11 +13,13 @@
 #include <linux/irqdomain.h>
 #include <linux/msi.h>
 #include <linux/of_address.h>
+#include <linux/of_irq.h>
 #include <linux/of_pci.h>
 #include <linux/pci_regs.h>
 #include <linux/platform_device.h>
 
 #include "../../pci.h"
+#include "../../pcie/portdrv.h"
 #include "pcie-designware.h"
 
 static struct pci_ops dw_pcie_ops;
@@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct dw_pcie_rp *pp)
 	return 0;
 }
 
+static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
+				    int *irqs, int mask)
+{
+	struct device *dev = bridge->dev.parent;
+	struct device_node *np = dev->of_node;
+	int ret, count = 0;
+
+	if (!np)
+		return 0;
+
+	if (mask & PCIE_PORT_SERVICE_AER) {
+		ret = of_irq_get_byname(np, "aer");
+		if (ret > 0) {
+			irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
+			count++;
+		}
+	}
+
+	if (mask & PCIE_PORT_SERVICE_PME) {
+		ret = of_irq_get_byname(np, "pme");
+		if (ret > 0) {
+			irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
+			count++;
+		}
+	}
+
+	return count;
+}
+
 int dw_pcie_host_init(struct dw_pcie_rp *pp)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
@@ -476,6 +507,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
 		return -ENOMEM;
 
 	pp->bridge = bridge;
+	pp->bridge->get_service_irqs = dw_pcie_get_service_irqs;
 
 	ret = dw_pcie_host_get_resources(pp);
 	if (ret)
-- 
2.37.1

Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[Hans Zhang]

On 2025/8/7 15:09, Richard Zhu wrote:
> EXTERNAL EMAIL
> 
> Some PCI host bridges have limitation that AER/PME can't work over MSI.
> Vendors route the AER/PME via the dedicated SPI interrupter which is
> only handled by the controller driver.
> 
> Because that aer and pme had been defined in the snps,dw-pcie.yaml
> document. Fetch the vendor specific AER/PME interrupters if they are
> defined in the fdt file by generic bridge->get_service_irqs hook.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>   .../pci/controller/dwc/pcie-designware-host.c | 32 +++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 906277f9ffaf7..9393dc99df81f 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -13,11 +13,13 @@
>   #include <linux/irqdomain.h>
>   #include <linux/msi.h>
>   #include <linux/of_address.h>
> +#include <linux/of_irq.h>
>   #include <linux/of_pci.h>
>   #include <linux/pci_regs.h>
>   #include <linux/platform_device.h>
> 
>   #include "../../pci.h"
> +#include "../../pcie/portdrv.h"
>   #include "pcie-designware.h"
> 
>   static struct pci_ops dw_pcie_ops;
> @@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct dw_pcie_rp *pp)
>          return 0;
>   }
> 
> +static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
> +                                   int *irqs, int mask)
> +{
> +       struct device *dev = bridge->dev.parent;
> +       struct device_node *np = dev->of_node;
> +       int ret, count = 0;
> +
> +       if (!np)
> +               return 0;
> +
> +       if (mask & PCIE_PORT_SERVICE_AER) {
> +               ret = of_irq_get_byname(np, "aer");
> +               if (ret > 0) {
> +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
> +                       count++;
> +               }
> +       }
> +
> +       if (mask & PCIE_PORT_SERVICE_PME) {
> +               ret = of_irq_get_byname(np, "pme");
> +               if (ret > 0) {
> +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
> +                       count++;
> +               }
> +       }
> +

Hi Richard,

As far as I know, some SoCs directly use the misc SPI interrupt derived 
from Synopsys PCIe IP. This includes PME, AER and other interrupts. So 
here, can we assign the interrupt number ourselves?

Also, whether to trigger the AER/PME interrupt in a similar way. 
(generic_handle_domain_irq)
Because there may be a misc SPI interrupt that requires a clear related 
state, what is referred to here is not the AER/PME state.

Best regards,
Hans


> +       return count;
> +}
> +
>   int dw_pcie_host_init(struct dw_pcie_rp *pp)
>   {
>          struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -476,6 +507,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>                  return -ENOMEM;
> 
>          pp->bridge = bridge;
> +       pp->bridge->get_service_irqs = dw_pcie_get_service_irqs;
> 
>          ret = dw_pcie_host_get_resources(pp);
>          if (ret)
> --
> 2.37.1
> 
> 

RE: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[Hongxing Zhu]

> -----Original Message-----
> From: Hans Zhang <hans.zhang@cixtech.com>
> Sent: 2025年8月7日 15:21
> To: Hongxing Zhu <hongxing.zhu@nxp.com>; Frank Li <frank.li@nxp.com>;
> Z.Q. Hou <zhiqiang.hou@nxp.com>; bhelgaas@google.com;
> ilpo.jarvinen@linux.intel.com; Jonthan.Cameron@huawei.com;
> lukas@wunner.de; feng.tang@linux.alibaba.com; jingoohan1@gmail.com;
> mani@kernel.org; lpieralisi@kernel.org; kwilczynski@kernel.org;
> robh@kernel.org
> Cc: linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org;
> imx@lists.linux.dev
> Subject: Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters
> 
> 
> 
> On 2025/8/7 15:09, Richard Zhu wrote:
> > EXTERNAL EMAIL
> >
> > Some PCI host bridges have limitation that AER/PME can't work over MSI.
> > Vendors route the AER/PME via the dedicated SPI interrupter which is
> > only handled by the controller driver.
> >
> > Because that aer and pme had been defined in the snps,dw-pcie.yaml
> > document. Fetch the vendor specific AER/PME interrupters if they are
> > defined in the fdt file by generic bridge->get_service_irqs hook.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > ---
> >   .../pci/controller/dwc/pcie-designware-host.c | 32
> +++++++++++++++++++
> >   1 file changed, 32 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> > b/drivers/pci/controller/dwc/pcie-designware-host.c
> > index 906277f9ffaf7..9393dc99df81f 100644
> > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > @@ -13,11 +13,13 @@
> >   #include <linux/irqdomain.h>
> >   #include <linux/msi.h>
> >   #include <linux/of_address.h>
> > +#include <linux/of_irq.h>
> >   #include <linux/of_pci.h>
> >   #include <linux/pci_regs.h>
> >   #include <linux/platform_device.h>
> >
> >   #include "../../pci.h"
> > +#include "../../pcie/portdrv.h"
> >   #include "pcie-designware.h"
> >
> >   static struct pci_ops dw_pcie_ops;
> > @@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct
> dw_pcie_rp *pp)
> >          return 0;
> >   }
> >
> > +static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
> > +                                   int *irqs, int mask) {
> > +       struct device *dev = bridge->dev.parent;
> > +       struct device_node *np = dev->of_node;
> > +       int ret, count = 0;
> > +
> > +       if (!np)
> > +               return 0;
> > +
> > +       if (mask & PCIE_PORT_SERVICE_AER) {
> > +               ret = of_irq_get_byname(np, "aer");
> > +               if (ret > 0) {
> > +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
> > +                       count++;
> > +               }
> > +       }
> > +
> > +       if (mask & PCIE_PORT_SERVICE_PME) {
> > +               ret = of_irq_get_byname(np, "pme");
> > +               if (ret > 0) {
> > +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
> > +                       count++;
> > +               }
> > +       }
> > +
> 
> Hi Richard,
> 
> As far as I know, some SoCs directly use the misc SPI interrupt derived from
> Synopsys PCIe IP. This includes PME, AER and other interrupts. So here, can
> we assign the interrupt number ourselves?
>
[Richard Zhu] Yes, they can be assigned by vendor themselves. The
 different PME, AER or other interrupts can be defined in the chip
 specific dts files.
> Also, whether to trigger the AER/PME interrupt in a similar way.
> (generic_handle_domain_irq)
[Richard Zhu] This patch-set is just fetch the dedicated AER/PME
interrupt for portdrv in none MSI/MSI-x/INTx mode. The trigger of
 AER/PME would be handled in portdrv.
> Because there may be a misc SPI interrupt that requires a clear related state,
> what is referred to here is not the AER/PME state.
[Richard Zhu]How about to do the other misc SPI interrupts related state
 clear in vendor local driver?

Best Regards
Richard Zhu
> 
> Best regards,
> Hans
> 
> 
> > +       return count;
> > +}
> > +
> >   int dw_pcie_host_init(struct dw_pcie_rp *pp)
> >   {
> >          struct dw_pcie *pci = to_dw_pcie_from_pp(pp); @@ -476,6
> > +507,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
> >                  return -ENOMEM;
> >
> >          pp->bridge = bridge;
> > +       pp->bridge->get_service_irqs = dw_pcie_get_service_irqs;
> >
> >          ret = dw_pcie_host_get_resources(pp);
> >          if (ret)
> > --
> > 2.37.1
> >
> >

Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[mani]

On Thu, Aug 07, 2025 at 07:38:06AM GMT, Hongxing Zhu wrote:
> > -----Original Message-----
> > From: Hans Zhang <hans.zhang@cixtech.com>
> > Sent: 2025年8月7日 15:21
> > To: Hongxing Zhu <hongxing.zhu@nxp.com>; Frank Li <frank.li@nxp.com>;
> > Z.Q. Hou <zhiqiang.hou@nxp.com>; bhelgaas@google.com;
> > ilpo.jarvinen@linux.intel.com; Jonthan.Cameron@huawei.com;
> > lukas@wunner.de; feng.tang@linux.alibaba.com; jingoohan1@gmail.com;
> > mani@kernel.org; lpieralisi@kernel.org; kwilczynski@kernel.org;
> > robh@kernel.org
> > Cc: linux-pci@vger.kernel.org; linux-kernel@vger.kernel.org;
> > imx@lists.linux.dev
> > Subject: Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters
> > 
> > 
> > 
> > On 2025/8/7 15:09, Richard Zhu wrote:
> > > EXTERNAL EMAIL
> > >
> > > Some PCI host bridges have limitation that AER/PME can't work over MSI.
> > > Vendors route the AER/PME via the dedicated SPI interrupter which is
> > > only handled by the controller driver.
> > >
> > > Because that aer and pme had been defined in the snps,dw-pcie.yaml
> > > document. Fetch the vendor specific AER/PME interrupters if they are
> > > defined in the fdt file by generic bridge->get_service_irqs hook.
> > >
> > > Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> > > ---
> > >   .../pci/controller/dwc/pcie-designware-host.c | 32
> > +++++++++++++++++++
> > >   1 file changed, 32 insertions(+)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 906277f9ffaf7..9393dc99df81f 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -13,11 +13,13 @@
> > >   #include <linux/irqdomain.h>
> > >   #include <linux/msi.h>
> > >   #include <linux/of_address.h>
> > > +#include <linux/of_irq.h>
> > >   #include <linux/of_pci.h>
> > >   #include <linux/pci_regs.h>
> > >   #include <linux/platform_device.h>
> > >
> > >   #include "../../pci.h"
> > > +#include "../../pcie/portdrv.h"
> > >   #include "pcie-designware.h"
> > >
> > >   static struct pci_ops dw_pcie_ops;
> > > @@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct
> > dw_pcie_rp *pp)
> > >          return 0;
> > >   }
> > >
> > > +static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
> > > +                                   int *irqs, int mask) {
> > > +       struct device *dev = bridge->dev.parent;
> > > +       struct device_node *np = dev->of_node;
> > > +       int ret, count = 0;
> > > +
> > > +       if (!np)
> > > +               return 0;
> > > +
> > > +       if (mask & PCIE_PORT_SERVICE_AER) {
> > > +               ret = of_irq_get_byname(np, "aer");
> > > +               if (ret > 0) {
> > > +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
> > > +                       count++;
> > > +               }
> > > +       }
> > > +
> > > +       if (mask & PCIE_PORT_SERVICE_PME) {
> > > +               ret = of_irq_get_byname(np, "pme");
> > > +               if (ret > 0) {
> > > +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
> > > +                       count++;
> > > +               }
> > > +       }
> > > +
> > 
> > Hi Richard,
> > 
> > As far as I know, some SoCs directly use the misc SPI interrupt derived from
> > Synopsys PCIe IP. This includes PME, AER and other interrupts. So here, can
> > we assign the interrupt number ourselves?
> >
> [Richard Zhu] Yes, they can be assigned by vendor themselves. The
>  different PME, AER or other interrupts can be defined in the chip
>  specific dts files.
> > Also, whether to trigger the AER/PME interrupt in a similar way.
> > (generic_handle_domain_irq)
> [Richard Zhu] This patch-set is just fetch the dedicated AER/PME
> interrupt for portdrv in none MSI/MSI-x/INTx mode. The trigger of
>  AER/PME would be handled in portdrv.
> > Because there may be a misc SPI interrupt that requires a clear related state,
> > what is referred to here is not the AER/PME state.
> [Richard Zhu]How about to do the other misc SPI interrupts related state
>  clear in vendor local driver?
> 

I'd expect the controller drivers to call the relevant part of the AER/PME
handlers from their own platform IRQ handler. This will work for platforms using
the shared IRQ line, and platforms requiring clearing custom bits in their own
register space before handling the interrupts.

- Mani

-- 
மணிவண்ணன் சதாசிவம்

Re: [PATCH v1 2/2] PCI: dwc: Fetch dedicated AER/PME interrupters

[Hans Zhang]

On 2025/8/7 15:09, Richard Zhu wrote:
> EXTERNAL EMAIL
> 
> Some PCI host bridges have limitation that AER/PME can't work over MSI.
> Vendors route the AER/PME via the dedicated SPI interrupter which is
> only handled by the controller driver.
> 
> Because that aer and pme had been defined in the snps,dw-pcie.yaml
> document. Fetch the vendor specific AER/PME interrupters if they are
> defined in the fdt file by generic bridge->get_service_irqs hook.
> 
> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
> ---
>   .../pci/controller/dwc/pcie-designware-host.c | 32 +++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 906277f9ffaf7..9393dc99df81f 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -13,11 +13,13 @@
>   #include <linux/irqdomain.h>
>   #include <linux/msi.h>
>   #include <linux/of_address.h>
> +#include <linux/of_irq.h>
>   #include <linux/of_pci.h>
>   #include <linux/pci_regs.h>
>   #include <linux/platform_device.h>
> 
>   #include "../../pci.h"
> +#include "../../pcie/portdrv.h"
>   #include "pcie-designware.h"
> 
>   static struct pci_ops dw_pcie_ops;
> @@ -461,6 +463,35 @@ static int dw_pcie_host_get_resources(struct dw_pcie_rp *pp)
>          return 0;
>   }
> 
> +static int dw_pcie_get_service_irqs(struct pci_host_bridge *bridge,
> +                                   int *irqs, int mask)
> +{
> +       struct device *dev = bridge->dev.parent;
> +       struct device_node *np = dev->of_node;
> +       int ret, count = 0;
> +
> +       if (!np)
> +               return 0;
> +
> +       if (mask & PCIE_PORT_SERVICE_AER) {
> +               ret = of_irq_get_byname(np, "aer");
> +               if (ret > 0) {
> +                       irqs[PCIE_PORT_SERVICE_AER_SHIFT] = ret;
> +                       count++;
> +               }
> +       }
> +
> +       if (mask & PCIE_PORT_SERVICE_PME) {
> +               ret = of_irq_get_byname(np, "pme");
> +               if (ret > 0) {
> +                       irqs[PCIE_PORT_SERVICE_PME_SHIFT] = ret;
> +                       count++;
> +               }
> +       }
> +

Hi Richard,

As far as I know, some SoCs directly use the misc SPI interrupt derived 
from Synopsys PCIe IP. This includes PME, AER and other interrupts. So 
here, can we assign the interrupt number ourselves?

Also, whether to trigger the AER/PME interrupt in a similar way. 
(generic_handle_domain_irq)
Because there may be a misc SPI interrupt that requires a clear related 
state, what is referred to here is not the AER/PME state.

Best regards,
Hans


> +       return count;
> +}
> +
>   int dw_pcie_host_init(struct dw_pcie_rp *pp)
>   {
>          struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> @@ -476,6 +507,7 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>                  return -ENOMEM;
> 
>          pp->bridge = bridge;
> +       pp->bridge->get_service_irqs = dw_pcie_get_service_irqs;
> 
>          ret = dw_pcie_host_get_resources(pp);
>          if (ret)
> --
> 2.37.1
> 
>