From: Andre Przywara <andre.przywara@arm.com>
To: "James Hilliard" <james.hilliard1@gmail.com>,
"Andy Shevchenko" <andriy.shevchenko@linux.intel.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>
Cc: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev,
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Subject: Re: [PATCH v7 06/12] dt-bindings: serial: snps-dw-apb-uart: add Allwinner H616
Date: Wed, 4 Nov 2026 11:59:34 +0100 [thread overview]
Message-ID: <32461e0e-2512-451a-8eca-f2df63553379@arm.com> (raw)
In-Reply-To: <20261103-submit-h616-uart-fifo-v1-v7-6-c9e248d685c1@gmail.com>
Hi,
On 11/3/26 22:39, James Hilliard wrote:
> The H616 UART has 256-byte transmit and receive FIFOs, but its DesignWare
> component parameter register does not report the FIFO depth. Its optional
> register layout also differs from the generic DesignWare integration.
>
> Add a specific compatible to identify this fixed configuration, retaining
> snps,dw-apb-uart as a fallback.
I think we should not focus too much on single SoCs here, all the
Allwinner UARTs need some care. We should have had SoC specific
compatible strings (plus the fallback) from the beginning, but we
didn't, mostly for historic reasons and because it just worked (TM).
So just from looking at the Allwinner A10 (the first one really
supported mainline, since 2012): the manual reports a FIFO size of 64
bytes, and it has none of the DW config registers.
So I'd suggest:
- We add compatible strings for *all* Allwinner SoC's UARTs in here,
regardless of whether we currently need a quirk for each of them or not.
This is now regarded best practise for DT anyway, we just catch up on this.
- The FIFO depth is all over the place for the various SoCs, and most of
them do not implement the CPR register to announce the size. So we
should use the already existing generic DT fifo-size property to
describe the size. This is the simplest, yet most flexible solution, and
avoids hardcoding implementation specific values in the driver. And it's
friendly to other users of the DT nodes, be it U-Boot, the BSDs or
whatever else is out there. IIUC, that should already work out of the
box with the current Linux driver?
Since we need to touch the DTs anyway, I think this is the best way forward.
Cheers,
Andre
> Signed-off-by: James Hilliard <james.hilliard1@gmail.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> ---
> Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> index e2ca126d58ba..fc1289073241 100644
> --- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> +++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.yaml
> @@ -60,6 +60,7 @@ properties:
> - const: renesas,rzn1-uart
> - items:
> - enum:
> + - allwinner,sun50i-h616-uart
> - anlogic,dr1v90-uart
> - brcm,bcm11351-dw-apb-uart
> - brcm,bcm21664-dw-apb-uart
>
next prev parent reply other threads:[~2026-11-04 10:59 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 21:39 [PATCH v7 00/12] serial: 8250_dw: share RX trigger setup and describe Allwinner UARTs James Hilliard
2026-11-03 21:39 ` [PATCH v7 01/12] serial: 8250_dw: select port setup through platform data James Hilliard
2026-11-03 21:39 ` [PATCH v7 02/12] serial: 8250: widen RX trigger byte counts to 16 bits James Hilliard
2026-11-03 21:39 ` [PATCH v7 03/12] serial: 8250: share the RX trigger conversion helper James Hilliard
2026-11-03 21:39 ` [PATCH v7 04/12] serial: 8250: expose RX trigger controls for custom callbacks James Hilliard
2026-11-03 21:39 ` [PATCH v7 05/12] serial: 8250_dw: derive RX trigger thresholds from the FIFO depth James Hilliard
2026-11-04 10:40 ` Andy Shevchenko
2026-11-03 21:39 ` [PATCH v7 06/12] dt-bindings: serial: snps-dw-apb-uart: add Allwinner H616 James Hilliard
2026-11-04 10:59 ` Andre Przywara [this message]
2026-11-04 18:07 ` James Hilliard
2026-11-03 21:40 ` [PATCH v7 07/12] serial: 8250_dw: configure the Allwinner H616 UART James Hilliard
2026-11-04 10:42 ` Andy Shevchenko
2026-11-03 21:40 ` [PATCH v7 08/12] arm64: dts: allwinner: h616: describe the UART integration James Hilliard
2026-11-04 8:11 ` Krzysztof Kozlowski
2026-11-03 21:40 ` [PATCH v7 09/12] dt-bindings: serial: snps-dw-apb-uart: add Allwinner A523 James Hilliard
2026-11-03 21:40 ` [PATCH v7 10/12] serial: 8250_dw: discover Allwinner A523 FIFO depths through FCC James Hilliard
2026-11-04 10:44 ` Andy Shevchenko
2026-11-03 21:40 ` [PATCH v7 11/12] arm64: dts: allwinner: a523: describe the UART integration James Hilliard
2026-11-04 8:12 ` Krzysztof Kozlowski
2026-11-03 21:40 ` [PATCH v7 12/12] serial: 8250_dw: configure RX trigger thresholds for Octeon James Hilliard
2026-11-04 10:48 ` Andy Shevchenko
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