From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: James Hilliard <james.hilliard1@gmail.com>
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Chen-Yu Tsai" <wens@kernel.org>,
"Jernej Skrabec" <jernej.skrabec@gmail.com>,
"Samuel Holland" <samuel@sholland.org>,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev
Subject: Re: [PATCH v7 05/12] serial: 8250_dw: derive RX trigger thresholds from the FIFO depth
Date: Wed, 4 Nov 2026 12:40:01 +0200 [thread overview]
Message-ID: <ausLge5yYc2W00zi@ashevche-desk.local> (raw)
In-Reply-To: <20261103-submit-h616-uart-fifo-v1-v7-5-c9e248d685c1@gmail.com>
On Tue, Nov 03, 2026 at 02:39:58PM -0700, James Hilliard wrote:
> DW_apb_uart uses receive thresholds of one byte, one quarter full,
> one half full and two bytes below full. The generic 16550A table describes
> these encodings only for a 16-byte FIFO. For example, the half-full setting
> on a 64-byte DW FIFO is reported as eight bytes instead of 32, and a sysfs
> request for 32 bytes selects the 62-byte encoding.
>
> Build a per-port threshold table from the discovered FIFO depth in dwlib
> and install receive-trigger callbacks for CPR-described FIFOs, including
> LPSS ports. Keep the setup helper available to integrations which obtain
> the depth without probing the optional DW registers. Validate that each
> threshold is positive and representable before constructing the table.
>
> Serialize FCR updates with termios and the port lock, acquire a runtime PM
> reference before accessing the device, and propagate resume errors without
> changing the shadow or hardware. Update only the trigger field so changing
> the threshold preserves the FIFO contents.
>
> The FCR mapping is documented in the DW_apb_uart databook, section 6,
> FIFO Control Register. The existing default FCR encoding is unchanged.
...
> static int dw8250_setup(struct uart_port *p)
> {
> - dw8250_setup_port(p);
> + int ret;
> +
> + ret = dw8250_setup_port(p);
> + if (ret)
> + return ret;
> +
> return dw8250_setup_dma(p);
> }
Split out a change that moves from void to int for _setup_port() and do it
before the patch that creates _setup_dma(), so it will be less churn overall.
...
> struct dw8250_port_data {
> /* Hardware configuration */
> u32 cpr_value;
> u8 dlf_size;
> + u16 rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
Put it first after the above comment. Check with `pahole` before and after
results.
> /* RS485 variables */
> bool hw_rs485_support;
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2026-11-04 10:40 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-03 21:39 [PATCH v7 00/12] serial: 8250_dw: share RX trigger setup and describe Allwinner UARTs James Hilliard
2026-11-03 21:39 ` [PATCH v7 01/12] serial: 8250_dw: select port setup through platform data James Hilliard
2026-11-03 21:39 ` [PATCH v7 02/12] serial: 8250: widen RX trigger byte counts to 16 bits James Hilliard
2026-11-03 21:39 ` [PATCH v7 03/12] serial: 8250: share the RX trigger conversion helper James Hilliard
2026-11-03 21:39 ` [PATCH v7 04/12] serial: 8250: expose RX trigger controls for custom callbacks James Hilliard
2026-11-03 21:39 ` [PATCH v7 05/12] serial: 8250_dw: derive RX trigger thresholds from the FIFO depth James Hilliard
2026-11-04 10:40 ` Andy Shevchenko [this message]
2026-11-03 21:39 ` [PATCH v7 06/12] dt-bindings: serial: snps-dw-apb-uart: add Allwinner H616 James Hilliard
2026-11-04 10:59 ` Andre Przywara
2026-11-04 18:07 ` James Hilliard
2026-11-03 21:40 ` [PATCH v7 07/12] serial: 8250_dw: configure the Allwinner H616 UART James Hilliard
2026-11-04 10:42 ` Andy Shevchenko
2026-11-03 21:40 ` [PATCH v7 08/12] arm64: dts: allwinner: h616: describe the UART integration James Hilliard
2026-11-04 8:11 ` Krzysztof Kozlowski
2026-11-03 21:40 ` [PATCH v7 09/12] dt-bindings: serial: snps-dw-apb-uart: add Allwinner A523 James Hilliard
2026-11-03 21:40 ` [PATCH v7 10/12] serial: 8250_dw: discover Allwinner A523 FIFO depths through FCC James Hilliard
2026-11-04 10:44 ` Andy Shevchenko
2026-11-03 21:40 ` [PATCH v7 11/12] arm64: dts: allwinner: a523: describe the UART integration James Hilliard
2026-11-04 8:12 ` Krzysztof Kozlowski
2026-11-03 21:40 ` [PATCH v7 12/12] serial: 8250_dw: configure RX trigger thresholds for Octeon James Hilliard
2026-11-04 10:48 ` Andy Shevchenko
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