* [PATCH 3/5] mtd: onenand: samsung: Unify resource order for controller variants
[not found] ` <20220423034622.366696-1-xc-racer2@live.ca>
@ 2022-04-23 3:46 ` Jonathan Bakker
2022-04-24 11:05 ` Krzysztof Kozlowski
2022-04-23 3:46 ` [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled Jonathan Bakker
2022-04-23 3:46 ` [PATCH 5/5] mtd: onenand: samsung: Add device tree support Jonathan Bakker
2 siblings, 1 reply; 7+ messages in thread
From: Jonathan Bakker @ 2022-04-23 3:46 UTC (permalink / raw)
To: Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel, Jonathan Bakker
From: Tomasz Figa <tomasz.figa@gmail.com>
Before this patch, the order of memory resources requested by the driver
was controller base as first and OneNAND chip base as second for
S3C64xx/S5PC100 variant and the opposite for S5PC110/S5PV210 variant.
To make this more consistent, this patch swaps the order of resources
for the latter and updates platform code accordingly. As a nice side
effect there is a slight reduction in line count of probe function.
This will make the transition to DT-based probing much easier.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
---
drivers/mtd/nand/onenand/onenand_samsung.c | 48 ++++++++++------------
1 file changed, 22 insertions(+), 26 deletions(-)
diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
index 924f5ddc9505..a3ef4add865a 100644
--- a/drivers/mtd/nand/onenand/onenand_samsung.c
+++ b/drivers/mtd/nand/onenand/onenand_samsung.c
@@ -123,14 +123,13 @@ struct s3c_onenand {
struct mtd_info *mtd;
struct platform_device *pdev;
enum soc_type type;
- void __iomem *base;
- void __iomem *ahb_addr;
+ void __iomem *ctrl_base;
+ void __iomem *chip_base;
int bootram_command;
void *page_buf;
void *oob_buf;
unsigned int (*mem_addr)(int fba, int fpa, int fsa);
unsigned int (*cmd_map)(unsigned int type, unsigned int val);
- void __iomem *dma_addr;
unsigned long phys_base;
struct completion complete;
};
@@ -144,22 +143,22 @@ static struct s3c_onenand *onenand;
static inline int s3c_read_reg(int offset)
{
- return readl(onenand->base + offset);
+ return readl(onenand->ctrl_base + offset);
}
static inline void s3c_write_reg(int value, int offset)
{
- writel(value, onenand->base + offset);
+ writel(value, onenand->ctrl_base + offset);
}
static inline int s3c_read_cmd(unsigned int cmd)
{
- return readl(onenand->ahb_addr + cmd);
+ return readl(onenand->chip_base + cmd);
}
static inline void s3c_write_cmd(int value, unsigned int cmd)
{
- writel(value, onenand->ahb_addr + cmd);
+ writel(value, onenand->chip_base + cmd);
}
#ifdef SAMSUNG_DEBUG
@@ -517,7 +516,7 @@ static int (*s5pc110_dma_ops)(dma_addr_t dst, dma_addr_t src, size_t count, int
static int s5pc110_dma_poll(dma_addr_t dst, dma_addr_t src, size_t count, int direction)
{
- void __iomem *base = onenand->dma_addr;
+ void __iomem *base = onenand->ctrl_base;
int status;
unsigned long timeout;
@@ -561,7 +560,7 @@ static int s5pc110_dma_poll(dma_addr_t dst, dma_addr_t src, size_t count, int di
static irqreturn_t s5pc110_onenand_irq(int irq, void *data)
{
- void __iomem *base = onenand->dma_addr;
+ void __iomem *base = onenand->ctrl_base;
int status, cmd = 0;
status = readl(base + S5PC110_INTC_DMA_STATUS);
@@ -583,7 +582,7 @@ static irqreturn_t s5pc110_onenand_irq(int irq, void *data)
static int s5pc110_dma_irq(dma_addr_t dst, dma_addr_t src, size_t count, int direction)
{
- void __iomem *base = onenand->dma_addr;
+ void __iomem *base = onenand->ctrl_base;
int status;
status = readl(base + S5PC110_INTC_DMA_MASK);
@@ -632,7 +631,7 @@ static int s5pc110_read_bufferram(struct mtd_info *mtd, int area,
}
if (offset & 3 || (size_t) buf & 3 ||
- !onenand->dma_addr || count != mtd->writesize)
+ !onenand->ctrl_base || count != mtd->writesize)
goto normal;
/* Handle vmalloc address */
@@ -862,23 +861,22 @@ static int s3c_onenand_probe(struct platform_device *pdev)
s3c_onenand_setup(mtd);
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- onenand->base = devm_ioremap_resource(&pdev->dev, r);
- if (IS_ERR(onenand->base))
- return PTR_ERR(onenand->base);
-
+ onenand->ctrl_base = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(onenand->ctrl_base))
+ return PTR_ERR(onenand->ctrl_base);
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ onenand->chip_base = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(onenand->chip_base))
+ return PTR_ERR(onenand->chip_base);
onenand->phys_base = r->start;
- /* Set onenand_chip also */
- this->base = onenand->base;
-
/* Use runtime badblock check */
this->options |= ONENAND_SKIP_UNLOCK_CHECK;
if (onenand->type != TYPE_S5PC110) {
- r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- onenand->ahb_addr = devm_ioremap_resource(&pdev->dev, r);
- if (IS_ERR(onenand->ahb_addr))
- return PTR_ERR(onenand->ahb_addr);
+ /* Set onenand_chip also */
+ this->base = onenand->ctrl_base;
/* Allocate 4KiB BufferRAM */
onenand->page_buf = devm_kzalloc(&pdev->dev, SZ_4K,
@@ -896,10 +894,8 @@ static int s3c_onenand_probe(struct platform_device *pdev)
this->subpagesize = mtd->writesize;
} else { /* S5PC110 */
- r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- onenand->dma_addr = devm_ioremap_resource(&pdev->dev, r);
- if (IS_ERR(onenand->dma_addr))
- return PTR_ERR(onenand->dma_addr);
+ /* Set onenand_chip also */
+ this->base = onenand->chip_base;
s5pc110_dma_ops = s5pc110_dma_poll;
/* Interrupt support */
--
2.30.2
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 3/5] mtd: onenand: samsung: Unify resource order for controller variants
2022-04-23 3:46 ` [PATCH 3/5] mtd: onenand: samsung: Unify resource order for controller variants Jonathan Bakker
@ 2022-04-24 11:05 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-24 11:05 UTC (permalink / raw)
To: Jonathan Bakker, Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel
On 23/04/2022 05:46, Jonathan Bakker wrote:
> From: Tomasz Figa <tomasz.figa@gmail.com>
>
> Before this patch, the order of memory resources requested by the driver
> was controller base as first and OneNAND chip base as second for
> S3C64xx/S5PC100 variant and the opposite for S5PC110/S5PV210 variant.
>
> To make this more consistent, this patch swaps the order of resources
> for the latter and updates platform code accordingly. As a nice side
> effect there is a slight reduction in line count of probe function.
>
> This will make the transition to DT-based probing much easier.
>
> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
> ---
> drivers/mtd/nand/onenand/onenand_samsung.c | 48 ++++++++++------------
> 1 file changed, 22 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
> index 924f5ddc9505..a3ef4add865a 100644
> --- a/drivers/mtd/nand/onenand/onenand_samsung.c
> +++ b/drivers/mtd/nand/onenand/onenand_samsung.c
> @@ -123,14 +123,13 @@ struct s3c_onenand {
> struct mtd_info *mtd;
> struct platform_device *pdev;
> enum soc_type type;
> - void __iomem *base;
> - void __iomem *ahb_addr;
> + void __iomem *ctrl_base;
> + void __iomem *chip_base;
> int bootram_command;
> void *page_buf;
> void *oob_buf;
> unsigned int (*mem_addr)(int fba, int fpa, int fsa);
> unsigned int (*cmd_map)(unsigned int type, unsigned int val);
> - void __iomem *dma_addr;
> unsigned long phys_base;
> struct completion complete;
> };
> @@ -144,22 +143,22 @@ static struct s3c_onenand *onenand;
>
> static inline int s3c_read_reg(int offset)
> {
> - return readl(onenand->base + offset);
> + return readl(onenand->ctrl_base + offset);
> }
>
> static inline void s3c_write_reg(int value, int offset)
> {
> - writel(value, onenand->base + offset);
> + writel(value, onenand->ctrl_base + offset);
> }
>
> static inline int s3c_read_cmd(unsigned int cmd)
> {
> - return readl(onenand->ahb_addr + cmd);
> + return readl(onenand->chip_base + cmd);
> }
>
> static inline void s3c_write_cmd(int value, unsigned int cmd)
> {
> - writel(value, onenand->ahb_addr + cmd);
> + writel(value, onenand->chip_base + cmd);
> }
>
> #ifdef SAMSUNG_DEBUG
> @@ -517,7 +516,7 @@ static int (*s5pc110_dma_ops)(dma_addr_t dst, dma_addr_t src, size_t count, int
>
> static int s5pc110_dma_poll(dma_addr_t dst, dma_addr_t src, size_t count, int direction)
> {
> - void __iomem *base = onenand->dma_addr;
> + void __iomem *base = onenand->ctrl_base;
> int status;
> unsigned long timeout;
>
> @@ -561,7 +560,7 @@ static int s5pc110_dma_poll(dma_addr_t dst, dma_addr_t src, size_t count, int di
>
> static irqreturn_t s5pc110_onenand_irq(int irq, void *data)
> {
> - void __iomem *base = onenand->dma_addr;
> + void __iomem *base = onenand->ctrl_base;
This is confusing a bit. Before dma_addr was IORESOURCE_MEM no. 1, now
it is no. 0, so it's reversed for S5P. However DTS is not updated, so
what's there? What does the DTS follow here?
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled
[not found] ` <20220423034622.366696-1-xc-racer2@live.ca>
2022-04-23 3:46 ` [PATCH 3/5] mtd: onenand: samsung: Unify resource order for controller variants Jonathan Bakker
@ 2022-04-23 3:46 ` Jonathan Bakker
2022-04-24 11:06 ` Krzysztof Kozlowski
2022-04-23 3:46 ` [PATCH 5/5] mtd: onenand: samsung: Add device tree support Jonathan Bakker
2 siblings, 1 reply; 7+ messages in thread
From: Jonathan Bakker @ 2022-04-23 3:46 UTC (permalink / raw)
To: Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel, Jonathan Bakker
From: Tomasz Figa <tomasz.figa@gmail.com>
This patch adds basic handling of controller bus clock to make sure that
in device probe it is enabled and device can operate correctly. The
clock is optional and driver behavior is identical as before this patch
if not provided.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
---
drivers/mtd/nand/onenand/onenand_samsung.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
index a3ef4add865a..62014f8d27b6 100644
--- a/drivers/mtd/nand/onenand/onenand_samsung.c
+++ b/drivers/mtd/nand/onenand/onenand_samsung.c
@@ -11,6 +11,7 @@
* S5PC110: use DMA
*/
+#include <linux/clk.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/sched.h>
@@ -122,6 +123,7 @@ enum soc_type {
struct s3c_onenand {
struct mtd_info *mtd;
struct platform_device *pdev;
+ struct clk *clk_bus;
enum soc_type type;
void __iomem *ctrl_base;
void __iomem *chip_base;
@@ -914,6 +916,10 @@ static int s3c_onenand_probe(struct platform_device *pdev)
}
}
+ onenand->clk_bus = devm_clk_get(&pdev->dev, "bus");
+ if (!IS_ERR(onenand->clk_bus))
+ clk_prepare_enable(onenand->clk_bus);
+
err = onenand_scan(mtd, 1);
if (err)
return err;
@@ -945,6 +951,8 @@ static int s3c_onenand_remove(struct platform_device *pdev)
struct mtd_info *mtd = platform_get_drvdata(pdev);
onenand_release(mtd);
+ if (!IS_ERR(onenand->clk_bus))
+ clk_disable_unprepare(onenand->clk_bus);
return 0;
}
--
2.30.2
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled
2022-04-23 3:46 ` [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled Jonathan Bakker
@ 2022-04-24 11:06 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-24 11:06 UTC (permalink / raw)
To: Jonathan Bakker, Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel
On 23/04/2022 05:46, Jonathan Bakker wrote:
> From: Tomasz Figa <tomasz.figa@gmail.com>
>
> This patch adds basic handling of controller bus clock to make sure that
> in device probe it is enabled and device can operate correctly. The
> clock is optional and driver behavior is identical as before this patch
> if not provided.
>
> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
> ---
> drivers/mtd/nand/onenand/onenand_samsung.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
> index a3ef4add865a..62014f8d27b6 100644
> --- a/drivers/mtd/nand/onenand/onenand_samsung.c
> +++ b/drivers/mtd/nand/onenand/onenand_samsung.c
> @@ -11,6 +11,7 @@
> * S5PC110: use DMA
> */
>
> +#include <linux/clk.h>
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/sched.h>
> @@ -122,6 +123,7 @@ enum soc_type {
> struct s3c_onenand {
> struct mtd_info *mtd;
> struct platform_device *pdev;
> + struct clk *clk_bus;
> enum soc_type type;
> void __iomem *ctrl_base;
> void __iomem *chip_base;
> @@ -914,6 +916,10 @@ static int s3c_onenand_probe(struct platform_device *pdev)
> }
> }
>
> + onenand->clk_bus = devm_clk_get(&pdev->dev, "bus");
If it is optional, use optional clk API.
> + if (!IS_ERR(onenand->clk_bus))
> + clk_prepare_enable(onenand->clk_bus);
> +
> err = onenand_scan(mtd, 1);
> if (err)
> return err;
Error paths not updated.
Also what about other clocks?
I propose you should take over the authorship of the patch because it
will be more changes.
> @@ -945,6 +951,8 @@ static int s3c_onenand_remove(struct platform_device *pdev)
> struct mtd_info *mtd = platform_get_drvdata(pdev);
>
> onenand_release(mtd);
> + if (!IS_ERR(onenand->clk_bus))
> + clk_disable_unprepare(onenand->clk_bus);
>
> return 0;
> }
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 5/5] mtd: onenand: samsung: Add device tree support
[not found] ` <20220423034622.366696-1-xc-racer2@live.ca>
2022-04-23 3:46 ` [PATCH 3/5] mtd: onenand: samsung: Unify resource order for controller variants Jonathan Bakker
2022-04-23 3:46 ` [PATCH 4/5] mtd: onenand: samsung: Make sure that bus clock is enabled Jonathan Bakker
@ 2022-04-23 3:46 ` Jonathan Bakker
2022-04-24 11:12 ` Krzysztof Kozlowski
2 siblings, 1 reply; 7+ messages in thread
From: Jonathan Bakker @ 2022-04-23 3:46 UTC (permalink / raw)
To: Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel, Jonathan Bakker
From: Tomasz Figa <tomasz.figa@gmail.com>
This patch adds support for instantation using Device Tree.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
---
Changes from previous patchset
- Adjust to having a nand child node as per binding feedback
---
drivers/mtd/nand/onenand/onenand_samsung.c | 67 +++++++++++++++++++++-
1 file changed, 65 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
index 62014f8d27b6..0108c8c75d5b 100644
--- a/drivers/mtd/nand/onenand/onenand_samsung.c
+++ b/drivers/mtd/nand/onenand/onenand_samsung.c
@@ -22,6 +22,7 @@
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/io.h>
+#include <linux/of.h>
#include "samsung.h"
@@ -832,8 +833,36 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
this->write_bufferram = onenand_write_bufferram;
}
+#ifdef CONFIG_OF
+static const struct of_device_id s3c_onenand_of_match[] = {
+ { .compatible = "samsung,s3c6400-onenand",
+ .data = (void *)TYPE_S3C6400 },
+ { .compatible = "samsung,s3c6410-onenand",
+ .data = (void *)TYPE_S3C6410 },
+ { .compatible = "samsung,s5pv210-onenand",
+ .data = (void *)TYPE_S5PC110 },
+ {},
+};
+MODULE_DEVICE_TABLE(of, onenand_s3c_dt_match);
+#endif
+
+static enum soc_type s3c_onenand_get_device_id(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+
+ if (IS_ENABLED(CONFIG_OF) && np) {
+ const struct of_device_id *match;
+
+ match = of_match_node(s3c_onenand_of_match, np);
+ return (enum soc_type)match->data;
+ }
+
+ return platform_get_device_id(pdev)->driver_data;
+}
+
static int s3c_onenand_probe(struct platform_device *pdev)
{
+ struct device_node *np = pdev->dev.of_node;
struct onenand_platform_data *pdata;
struct onenand_chip *this;
struct mtd_info *mtd;
@@ -856,9 +885,10 @@ static int s3c_onenand_probe(struct platform_device *pdev)
this = (struct onenand_chip *) &mtd[1];
mtd->name = dev_name(&pdev->dev);
mtd->priv = this;
+ mtd->dev.of_node = np;
mtd->dev.parent = &pdev->dev;
onenand->pdev = pdev;
- onenand->type = platform_get_device_id(pdev)->driver_data;
+ onenand->type = s3c_onenand_get_device_id(pdev);
s3c_onenand_setup(mtd);
@@ -867,7 +897,35 @@ static int s3c_onenand_probe(struct platform_device *pdev)
if (IS_ERR(onenand->ctrl_base))
return PTR_ERR(onenand->ctrl_base);
- r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ if (np) {
+ /* Determine which CS to use - this driver only supports one */
+ u32 cs = 0;
+ struct device_node *child_np;
+ struct device_node *extra_chip_np;
+
+ child_np = of_get_next_available_child(np, NULL);
+ if (child_np == NULL) {
+ dev_err(&pdev->dev, "failed to get chip node\n");
+ return -EINVAL;
+ }
+
+ /* Warn if more than one chip as this unsupported */
+ extra_chip_np = of_get_next_available_child(np, child_np);
+ if (extra_chip_np != NULL) {
+ dev_warn(&pdev->dev, "multiple chip nodes, using only first\n");
+ of_node_put(extra_chip_np);
+ }
+
+ err = of_property_read_u32(child_np, "reg", &cs);
+ of_node_put(child_np);
+ if (err < 0)
+ return err;
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, cs + 1);
+ } else {
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ }
+
onenand->chip_base = devm_ioremap_resource(&pdev->dev, r);
if (IS_ERR(onenand->chip_base))
return PTR_ERR(onenand->chip_base);
@@ -917,6 +975,10 @@ static int s3c_onenand_probe(struct platform_device *pdev)
}
onenand->clk_bus = devm_clk_get(&pdev->dev, "bus");
+ if (np && IS_ERR(onenand->clk_bus)) {
+ dev_err(&pdev->dev, "failed to get bus clock\n");
+ return PTR_ERR(onenand->clk_bus);
+ }
if (!IS_ERR(onenand->clk_bus))
clk_prepare_enable(onenand->clk_bus);
@@ -998,6 +1060,7 @@ static struct platform_driver s3c_onenand_driver = {
.driver = {
.name = "samsung-onenand",
.pm = &s3c_pm_ops,
+ .of_match_table = of_match_ptr(s3c_onenand_of_match),
},
.id_table = s3c_onenand_driver_ids,
.probe = s3c_onenand_probe,
--
2.30.2
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 5/5] mtd: onenand: samsung: Add device tree support
2022-04-23 3:46 ` [PATCH 5/5] mtd: onenand: samsung: Add device tree support Jonathan Bakker
@ 2022-04-24 11:12 ` Krzysztof Kozlowski
0 siblings, 0 replies; 7+ messages in thread
From: Krzysztof Kozlowski @ 2022-04-24 11:12 UTC (permalink / raw)
To: Jonathan Bakker, Miquel Raynal
Cc: Kyungmin Park, Richard Weinberger, Vignesh Raghavendra,
linux-mtd, linux-kernel, linux-samsung-soc, Tomasz Figa,
Paweł Chmiel
On 23/04/2022 05:46, Jonathan Bakker wrote:
> From: Tomasz Figa <tomasz.figa@gmail.com>
>
> This patch adds support for instantation using Device Tree.
>
> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
>
> ---
> Changes from previous patchset
> - Adjust to having a nand child node as per binding feedback
> ---
> drivers/mtd/nand/onenand/onenand_samsung.c | 67 +++++++++++++++++++++-
> 1 file changed, 65 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/onenand/onenand_samsung.c b/drivers/mtd/nand/onenand/onenand_samsung.c
> index 62014f8d27b6..0108c8c75d5b 100644
> --- a/drivers/mtd/nand/onenand/onenand_samsung.c
> +++ b/drivers/mtd/nand/onenand/onenand_samsung.c
> @@ -22,6 +22,7 @@
> #include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
> #include <linux/io.h>
> +#include <linux/of.h>
>
> #include "samsung.h"
>
> @@ -832,8 +833,36 @@ static void s3c_onenand_setup(struct mtd_info *mtd)
> this->write_bufferram = onenand_write_bufferram;
> }
>
> +#ifdef CONFIG_OF
> +static const struct of_device_id s3c_onenand_of_match[] = {
> + { .compatible = "samsung,s3c6400-onenand",
> + .data = (void *)TYPE_S3C6400 },
> + { .compatible = "samsung,s3c6410-onenand",
> + .data = (void *)TYPE_S3C6410 },
> + { .compatible = "samsung,s5pv210-onenand",
> + .data = (void *)TYPE_S5PC110 },
> + {},
> +};
> +MODULE_DEVICE_TABLE(of, onenand_s3c_dt_match);
> +#endif
> +
> +static enum soc_type s3c_onenand_get_device_id(struct platform_device *pdev)
> +{
> + struct device_node *np = pdev->dev.of_node;
> +
> + if (IS_ENABLED(CONFIG_OF) && np) {
> + const struct of_device_id *match;
> +
> + match = of_match_node(s3c_onenand_of_match, np);
> + return (enum soc_type)match->data;
> + }
This can be simpler:
if (dev_of_node(&pdev->dev))
return of_device_get_match_data(&pdev->dev);
This allows you to put the of_device_id table in usual place, so just
before the platform_driver structure.
> +
> + return platform_get_device_id(pdev)->driver_data;
> +}
> +
> static int s3c_onenand_probe(struct platform_device *pdev)
> {
> + struct device_node *np = pdev->dev.of_node;
dev_of_node()
Best regards,
Krzysztof
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