[PATCH RFC] arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs

[PATCH RFC] arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs

[Shawn Guo]

From: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>

PMAU0102 (Kai_MV) and PMM8650AU's Kobra_MM ADC5 Gen3 controllers only
expose REF_GND/1P25VREF/DIE_TEMP calibration channels; none of their
AMUX thermistor pins are wired up, so none of the board thermistor
rails feed the thermal framework.

Only 3 AMUX pins are actually wired to thermistors on Nord, all on
Kai and none on Kobra: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai
instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). Kai's other AMUX
pins are either DO_NOT_USE or wired to voltage-rail monitors, not
thermistors, so add only these 3 channels.

Add #thermal-sensor-cells = <1> to the two Kai adc@ nodes that gain
a channel, the new AMUX1[/AMUX2]_THM channel(s) with qcom,adc-tm,
and a per-channel thermal-zone for each, following the existing
Gen3/Gen4 board pattern of a direct thermal-sensors phandle into the
ADC channel.

Signed-off-by: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
---
Dependencies:
- [PATCH v5 0/7] arm64: dts: qcom: nord: Add remoteproc and PMIC support
  https://lore.kernel.org/all/20261014063953.549379-1-shengchao.guo@oss.qualcomm.com/

 arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 80 +++++++++++++++++++++
 1 file changed, 80 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi
index 47ea145f4abb..6230fed2374c 100644
--- a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi
+++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi
@@ -31,6 +31,7 @@ pmau0102_e_adc: adc@7200 {
 			#size-cells = <0>;
 			interrupts-extended = <&spmi_bus 0x4 0x72 0x1 IRQ_TYPE_EDGE_RISING>;
 			#io-channel-cells = <1>;
+			#thermal-sensor-cells = <1>;
 
 			channel@400 {
 				reg = <ADC5_GEN3_REF_GND(4)>;
@@ -49,6 +50,14 @@ channel@403 {
 				label = "pmau0102_e_die_temp";
 				qcom,pre-scaling = <1 1>;
 			};
+
+			channel@444 {
+				reg = <ADC5_GEN3_AMUX1_THM_100K_PU(4)>;
+				label = "pmau0102_e_sdram3_therm";
+				qcom,ratiometric;
+				qcom,hw-settle-time = <200>;
+				qcom,adc-tm;
+			};
 		};
 
 		pmau0102_e_gpios: gpio@8800 {
@@ -243,6 +252,7 @@ pmau0102_i_adc: adc@7200 {
 			#size-cells = <0>;
 			interrupts-extended = <&spmi_bus 0x8 0x72 0x1 IRQ_TYPE_EDGE_RISING>;
 			#io-channel-cells = <1>;
+			#thermal-sensor-cells = <1>;
 
 			channel@800 {
 				reg = <ADC5_GEN3_REF_GND(8)>;
@@ -261,6 +271,22 @@ channel@803 {
 				label = "pmau0102_i_die_temp";
 				qcom,pre-scaling = <1 1>;
 			};
+
+			channel@844 {
+				reg = <ADC5_GEN3_AMUX1_THM_100K_PU(8)>;
+				label = "pmau0102_i_sdram1_therm";
+				qcom,ratiometric;
+				qcom,hw-settle-time = <200>;
+				qcom,adc-tm;
+			};
+
+			channel@845 {
+				reg = <ADC5_GEN3_AMUX2_THM_100K_PU(8)>;
+				label = "pmau0102_i_ufs_therm";
+				qcom,ratiometric;
+				qcom,hw-settle-time = <200>;
+				qcom,adc-tm;
+			};
 		};
 
 		pmau0102_i_gpios: gpio@8800 {
@@ -449,6 +475,24 @@ trip0 {
 			};
 		};
 
+		pmau0102_e_sdram3_thermal: pm-e-sdram3-thermal {
+			thermal-sensors = <&pmau0102_e_adc ADC5_GEN3_AMUX1_THM_100K_PU(4)>;
+
+			trips {
+				trip0 {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+
+				trip1 {
+					temperature = <90000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+			};
+		};
+
 		pmau0102_f_thermal: pmau0102-f-thermal {
 			polling-delay-passive = <100>;
 			thermal-sensors = <&pmau0102_f_mbg_temp>;
@@ -501,6 +545,42 @@ trip0 {
 			};
 		};
 
+		pmau0102_i_sdram1_thermal: pm-i-sdram1-thermal {
+			thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX1_THM_100K_PU(8)>;
+
+			trips {
+				trip0 {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+
+				trip1 {
+					temperature = <90000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+			};
+		};
+
+		pmau0102_i_ufs_thermal: pm-i-ufs-thermal {
+			thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX2_THM_100K_PU(8)>;
+
+			trips {
+				trip0 {
+					temperature = <70000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+
+				trip1 {
+					temperature = <90000>;
+					hysteresis = <2000>;
+					type = "hot";
+				};
+			};
+		};
+
 		pmau0102_j_thermal: pmau0102-j-thermal {
 			polling-delay-passive = <100>;
 			thermal-sensors = <&pmau0102_j_mbg_temp>;
-- 
2.43.0

Re: [PATCH RFC] arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs

[Bartosz Golaszewski]

On Wed, Oct 28, 2026 at 11:01:03PM +0800, Shawn Guo wrote:
> From: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
> 
> PMAU0102 (Kai_MV) and PMM8650AU's Kobra_MM ADC5 Gen3 controllers only
> expose REF_GND/1P25VREF/DIE_TEMP calibration channels; none of their
> AMUX thermistor pins are wired up, so none of the board thermistor
> rails feed the thermal framework.
> 
> Only 3 AMUX pins are actually wired to thermistors on Nord, all on
> Kai and none on Kobra: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai
> instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). Kai's other AMUX
> pins are either DO_NOT_USE or wired to voltage-rail monitors, not
> thermistors, so add only these 3 channels.
> 
> Add #thermal-sensor-cells = <1> to the two Kai adc@ nodes that gain
> a channel, the new AMUX1[/AMUX2]_THM channel(s) with qcom,adc-tm,
> and a per-channel thermal-zone for each, following the existing
> Gen3/Gen4 board pattern of a direct thermal-sensors phandle into the
> ADC channel.
> 
> Signed-off-by: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> ---

...

> +
>  		pmau0102_f_thermal: pmau0102-f-thermal {
>  			polling-delay-passive = <100>;
>  			thermal-sensors = <&pmau0102_f_mbg_temp>;
> @@ -501,6 +545,42 @@ trip0 {
>  			};
>  		};
>  
> +		pmau0102_i_sdram1_thermal: pm-i-sdram1-thermal {

Existing thermal zone nodes use the "pmau0102" prefix.

With that:

Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

Re: [PATCH RFC] arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs

[Shawn Guo]

On Fri, Oct 30, 2026 at 10:28:21AM +0100, Bartosz Golaszewski wrote:
> On Wed, Oct 28, 2026 at 11:01:03PM +0800, Shawn Guo wrote:
> > From: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
> > 
> > PMAU0102 (Kai_MV) and PMM8650AU's Kobra_MM ADC5 Gen3 controllers only
> > expose REF_GND/1P25VREF/DIE_TEMP calibration channels; none of their
> > AMUX thermistor pins are wired up, so none of the board thermistor
> > rails feed the thermal framework.
> > 
> > Only 3 AMUX pins are actually wired to thermistors on Nord, all on
> > Kai and none on Kobra: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai
> > instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). Kai's other AMUX
> > pins are either DO_NOT_USE or wired to voltage-rail monitors, not
> > thermistors, so add only these 3 channels.
> > 
> > Add #thermal-sensor-cells = <1> to the two Kai adc@ nodes that gain
> > a channel, the new AMUX1[/AMUX2]_THM channel(s) with qcom,adc-tm,
> > and a per-channel thermal-zone for each, following the existing
> > Gen3/Gen4 board pattern of a direct thermal-sensors phandle into the
> > ADC channel.
> > 
> > Signed-off-by: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
> > Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com>
> > ---
> 
> ...
> 
> > +
> >  		pmau0102_f_thermal: pmau0102-f-thermal {
> >  			polling-delay-passive = <100>;
> >  			thermal-sensors = <&pmau0102_f_mbg_temp>;
> > @@ -501,6 +545,42 @@ trip0 {
> >  			};
> >  		};
> >  
> > +		pmau0102_i_sdram1_thermal: pm-i-sdram1-thermal {
> 
> Existing thermal zone nodes use the "pmau0102" prefix.

Indeed! I will update to to be consistent.

> With that:
> 
> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>

Thanks Bartosz!

Shawn

Re: [PATCH RFC] arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs

[Konrad Dybcio]

On 10/28/26 4:01 PM, Shawn Guo wrote:
> From: Dhruvin Rajpura <dhruvin.rajpura@oss.qualcomm.com>
> 
> PMAU0102 (Kai_MV) and PMM8650AU's Kobra_MM ADC5 Gen3 controllers only
> expose REF_GND/1P25VREF/DIE_TEMP calibration channels; none of their
> AMUX thermistor pins are wired up, so none of the board thermistor
> rails feed the thermal framework.
> 
> Only 3 AMUX pins are actually wired to thermistors on Nord, all on
> Kai and none on Kobra: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai
> instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). Kai's other AMUX
> pins are either DO_NOT_USE or wired to voltage-rail monitors, not
> thermistors, so add only these 3 channels.

These thermistors seem to concern board-side thermistors, not
channels coming straight from the PMIC, so these additional
thermistors belong in the board DT

Konrad