From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: Maxim Levitsky <mlevitsk@redhat.com>,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org
Cc: pbonzini@redhat.com, seanjc@google.com, joro@8bytes.org,
jon.grimm@amd.com, wei.huang2@amd.com, terry.bowman@amd.com
Subject: Re: [PATCH v3 03/14] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support
Date: Thu, 5 May 2022 11:07:02 +0700 [thread overview]
Message-ID: <3af75c05-40e9-2371-b5a9-c702853a974e@amd.com> (raw)
In-Reply-To: <a883ff438d6202f2dc0458dc4d7c1ab3688f5db8.camel@redhat.com>
Maxim,
On 5/4/22 7:12 PM, Maxim Levitsky wrote:
>> diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
>> index a8f514212b87..fc3ba6071482 100644
>> --- a/arch/x86/kvm/svm/avic.c
>> +++ b/arch/x86/kvm/svm/avic.c
>> @@ -40,6 +40,15 @@
>> #define AVIC_GATAG_TO_VMID(x) ((x >> AVIC_VCPU_ID_BITS) & AVIC_VM_ID_MASK)
>> #define AVIC_GATAG_TO_VCPUID(x) (x & AVIC_VCPU_ID_MASK)
>>
>> +enum avic_modes {
>> + AVIC_MODE_NONE = 0,
>> + AVIC_MODE_X1,
>> + AVIC_MODE_X2,
>> +};
>> +
>> +static bool force_avic;
>> +module_param_unsafe(force_avic, bool, 0444);
>> +
>> /* Note:
>> * This hash table is used to map VM_ID to a struct kvm_svm,
>> * when handling AMD IOMMU GALOG notification to schedule in
>> @@ -50,6 +59,7 @@ static DEFINE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
>> static u32 next_vm_id = 0;
>> static bool next_vm_id_wrapped = 0;
>> static DEFINE_SPINLOCK(svm_vm_data_hash_lock);
>> +static enum avic_modes avic_mode;
>>
>> /*
>> * This is a wrapper of struct amd_iommu_ir_data.
>> @@ -1077,3 +1087,33 @@ void avic_vcpu_unblocking(struct kvm_vcpu *vcpu)
>>
>> avic_vcpu_load(vcpu);
>> }
>> +
>> +/*
>> + * Note:
>> + * - The module param avic enable both xAPIC and x2APIC mode.
>> + * - Hypervisor can support both xAVIC and x2AVIC in the same guest.
>> + * - The mode can be switched at run-time.
>> + */
>> +bool avic_hardware_setup(struct kvm_x86_ops *x86_ops)
>> +{
>> + if (!npt_enabled)
>> + return false;
>> +
>> + if (boot_cpu_has(X86_FEATURE_AVIC)) {
>> + avic_mode = AVIC_MODE_X1;
>> + pr_info("AVIC enabled\n");
>> + } else if (force_avic) {
>> + pr_warn("AVIC is not supported in CPUID but force enabled");
>> + pr_warn("Your system might crash and burn");
> I think in this case avic_mode should also be set to AVIC_MODE_X1
> (Hopefully this won't be needed for systems that have x2avic enabled)
You are right. My appology :(
Actually, x2AVIC depends on both CPUID bits (i.e. X86_FEATURE_AVIC and X86_FEATURE_X2AVIC).
If the force_avic option is only applicable to only the X86_FEATURE_AVIC bit, we would
need to check for the following condition before enabling x2AVIC support in the driver:
if ((X86_FEATURE_AVIC | avic_force) & X86_FEATURE_X2AVIC)
avic_mode = AVIC_MODE_X2
Regards,
Suravee
next prev parent reply other threads:[~2022-05-05 4:07 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-04 7:31 [PATCH v3 00/14] Introducing AMD x2AVIC and hybrid-AVIC modes Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 01/14] x86/cpufeatures: Introduce x2AVIC CPUID bit Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 02/14] KVM: x86: lapic: Rename [GET/SET]_APIC_DEST_FIELD to [GET/SET]_XAPIC_DEST_FIELD Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 03/14] KVM: SVM: Detect X2APIC virtualization (x2AVIC) support Suravee Suthikulpanit
2022-05-04 12:12 ` Maxim Levitsky
2022-05-05 4:07 ` Suravee Suthikulpanit [this message]
2022-05-05 7:38 ` Maxim Levitsky
2022-05-04 7:31 ` [PATCH v3 04/14] KVM: SVM: Update max number of vCPUs supported for x2AVIC mode Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 05/14] KVM: SVM: Update avic_kick_target_vcpus to support 32-bit APIC ID Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 06/14] KVM: SVM: Do not support updating APIC ID when in x2APIC mode Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 07/14] KVM: SVM: Adding support for configuring x2APIC MSRs interception Suravee Suthikulpanit
2022-05-04 12:14 ` Maxim Levitsky
2022-05-04 7:31 ` [PATCH v3 08/14] KVM: SVM: Update AVIC settings when changing APIC mode Suravee Suthikulpanit
2022-05-04 12:19 ` Maxim Levitsky
2022-05-05 1:38 ` Suravee Suthikulpanit
2022-05-05 7:34 ` Maxim Levitsky
2022-05-04 7:31 ` [PATCH v3 09/14] KVM: SVM: Introduce helper functions to (de)activate AVIC and x2AVIC Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 10/14] KVM: SVM: Do not throw warning when calling avic_vcpu_load on a running vcpu Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 11/14] KVM: SVM: Introduce hybrid-AVIC mode Suravee Suthikulpanit
2022-05-04 12:32 ` Maxim Levitsky
2022-05-05 3:57 ` Suravee Suthikulpanit
2022-05-04 7:31 ` [PATCH v3 12/14] kvm/x86: Warning APICv inconsistency only when vcpu APIC mode is valid Suravee Suthikulpanit
2022-05-04 12:33 ` Maxim Levitsky
2022-05-04 7:31 ` [PATCH v3 13/14] KVM: SVM: Use target APIC ID to complete x2AVIC IRQs when possible Suravee Suthikulpanit
2022-05-04 12:34 ` Maxim Levitsky
2022-05-04 7:31 ` [PATCH v3 14/14] KVM: SVM: Add AVIC doorbell tracepoint Suravee Suthikulpanit
2022-05-04 12:36 ` Maxim Levitsky
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3af75c05-40e9-2371-b5a9-c702853a974e@amd.com \
--to=suravee.suthikulpanit@amd.com \
--cc=jon.grimm@amd.com \
--cc=joro@8bytes.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mlevitsk@redhat.com \
--cc=pbonzini@redhat.com \
--cc=seanjc@google.com \
--cc=terry.bowman@amd.com \
--cc=wei.huang2@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®