From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
dri-devel@lists.freedesktop.org
Cc: linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org,
Alexander Koskovich <akoskovich@pm.me>,
Jie Zhang <jie.zhang@oss.qualcomm.com>,
Akhil P Oommen <akhilpo@oss.qualcomm.com>,
Bhaskar Reddy Valluru <bvalluru@qti.qualcomm.com>,
Sean Paul <sean@poorly.run>,
Konrad Dybcio <konradybcio@kernel.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 12/14] drm/msm/a8xx: Switch to generated nonctx regs
Date: Thu, 22 Oct 2026 10:03:55 +0200 [thread overview]
Message-ID: <4069a590-607b-474e-9e3e-f7e744d3dabc@oss.qualcomm.com> (raw)
In-Reply-To: <20261021204244.67160-13-robin.clark@oss.qualcomm.com>
On 10/21/26 10:41 PM, Rob Clark wrote:
> The generated headers contain the current (at time of generation) hw
> recommended values. Using these directly makes it easier to stay up
> to date.
>
> Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
> ---
For context, here's an LLM-generated change summary:
What changed
- RB_GC_GMEM_PROTECT is gone from every generated table. That matches the code change, which now computes the value.
- Every generated table adds GMU (GMUCX_*) entries, and most also add RBBM_INTERFACE_HANG_INT_CNTL.
- Several hand-written entries are missing from the generated tables, for example RB_CCU_DBG_ECO_CNTL and UCHE_MODE_CNTL on a810, and RB_RBP_CNTL and SP_HLSQ_DBG_ECO_CNTL_1/2/3 on a840.
- Some entries keep the same register but change value or pipe scope:
- TPL1_DBG_ECO_CNTL changes from 0x10100000 to 0x10000000 on a810, a840, a845 and a850.
- TPL1_DBG_ECO_CNTL1 on a830 changes from 0x04000724 to 0x720 and from PIPE_NONE to PIPE_BR.
- PC_CHICKEN_BITS_3 on x285, a810 and a840 changes from 0x500000 to 0x400000.
- GRAS_DBG_ECO_CNTL on a845 and a850 changes from 0x01000800 to 0x00000800.
- UCHE_HW_DBG_CNTL on a850 changes from 0x01410000 to 0x01010000.
Konrad
next prev parent reply other threads:[~2026-10-22 8:04 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 20:41 [PATCH v2 00/14] drm/msm/a8xx: GPU state capture support Rob Clark
2026-10-21 20:41 ` [PATCH v2 01/14] drm/msm: Import adreno_snapshot.h Rob Clark
2026-10-21 20:41 ` [PATCH v2 02/14] drm/msm/a8xx: Export aperture helpers Rob Clark
2026-10-21 20:41 ` [PATCH v2 03/14] drm/msm/a8xx: Add a8xx_aperture_acquire_raw() Rob Clark
2026-10-21 20:41 ` [PATCH v2 04/14] drm/msm/a8xx: Export slice helper Rob Clark
2026-10-21 20:41 ` [PATCH v2 05/14] drm/msm/a8xx: Add missing a850 ifpc reglist entries Rob Clark
2026-10-22 7:19 ` Konrad Dybcio
2026-10-21 20:41 ` [PATCH v2 06/14] drm/msm/a8xx: Allow nonctx reglist to include GMU regs Rob Clark
2026-10-21 20:41 ` [PATCH v2 07/14] drm/msm/a8xx: Stop getting GMEM_PROTECT from nonctx list Rob Clark
2026-10-21 20:41 ` [PATCH v2 08/14] drm/msm/adreno: Fix PROTECT span length Rob Clark
2026-10-21 20:41 ` [PATCH v2 09/14] drm/msm/adreno: add temporary __maybe_unused Rob Clark
2026-10-21 20:41 ` [PATCH v2 10/14] drm/msm/a8xx: Import generated headers Rob Clark
2026-10-21 20:41 ` [PATCH v2 11/14] drm/msm/a8xx: devcoredump state capture support Rob Clark
2026-10-21 20:41 ` [PATCH v2 12/14] drm/msm/a8xx: Switch to generated nonctx regs Rob Clark
2026-10-22 8:03 ` Konrad Dybcio [this message]
2026-10-21 20:41 ` [PATCH v2 13/14] drm/msm/a8xx: Switch to generated protect regs Rob Clark
2026-10-22 8:27 ` Konrad Dybcio
2026-10-21 20:41 ` [PATCH v2 14/14] drm/msm/adreno: Remove temporary __maybe_unused Rob Clark
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