Re: [PATCH 2/3] drm/msm/dpu: Add missing DPU_DSC_OUTPUT_CTRL to SC7280

[Abhinav Kumar <quic_abhinavk@quicinc.com>]

On 9/20/2023 3:46 PM, Konrad Dybcio wrote:
> DPU_DSC_OUTPUT_CTRL should be enabled for all platforms with a CTL
> CFG 1.0.0. SC7280 is one of them. Add it.
> 

sc7280 and all other chipsets using DSC 1.2 use dpu_hw_dsc_init_1_2 and 
not dpu_hw_dsc_init.

dpu_hw_dsc_init_1_2 assigns the dsc_bind_pingpong_blk op by default.

So this change is not needed.

> Fixes: 0d1b10c63346 ("drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
> index dc3198335164..b6a59d7b94c4 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
> @@ -164,7 +164,7 @@ static const struct dpu_dsc_cfg sc7280_dsc[] = {
>   	{
>   		.name = "dce_0_0", .id = DSC_0,
>   		.base = 0x80000, .len = 0x4,
> -		.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN),
> +		.features = BIT(DPU_DSC_HW_REV_1_2) | BIT(DPU_DSC_NATIVE_42x_EN) | BIT(DPU_DSC_OUTPUT_CTRL),
>   		.sblk = &dsc_sblk_0,
>   	},
>   };
>