* [PATCH 1/3] arm64: dts: rockchip: Enable the NPU on NanoPC T6/T6-LTS
2025-12-30 20:19 [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Ricardo Pardini via B4 Relay
@ 2025-12-30 20:19 ` Ricardo Pardini via B4 Relay
2025-12-30 20:19 ` [PATCH 2/3] arm64: dts: rockchip: Enable the NPU on FriendlyElec CM3588 Ricardo Pardini via B4 Relay
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Ricardo Pardini via B4 Relay @ 2025-12-30 20:19 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Ricardo Pardini
From: Ricardo Pardini <ricardo@pardini.net>
Enable the NPU on FriendlyElec NanoPC T6/T6-LTS boards.
The regulator vdd_npu_s0 was already described.
Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
---
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 35 ++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
index fafeabe9adf9e..93bd479118e92 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
@@ -629,6 +629,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
+&pd_npu {
+ domain-supply = <&vdd_npu_s0>;
+};
+
&pinctrl {
gpio-leds {
sys_led_pin: sys-led-pin {
@@ -706,6 +710,37 @@ &pwm1 {
status = "okay";
};
+&rknn_core_0 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_1 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_2 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_mmu_0 {
+ status = "okay";
+};
+
+&rknn_mmu_1 {
+ status = "okay";
+};
+
+&rknn_mmu_2 {
+ status = "okay";
+};
+
+
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
--
2.52.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 2/3] arm64: dts: rockchip: Enable the NPU on FriendlyElec CM3588
2025-12-30 20:19 [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Ricardo Pardini via B4 Relay
2025-12-30 20:19 ` [PATCH 1/3] arm64: dts: rockchip: Enable the NPU on NanoPC T6/T6-LTS Ricardo Pardini via B4 Relay
@ 2025-12-30 20:19 ` Ricardo Pardini via B4 Relay
2025-12-30 20:19 ` [PATCH 3/3] arm64: dts: rockchip: Enable the NPU on Turing RK1 Ricardo Pardini via B4 Relay
2025-12-31 2:58 ` [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Jimmy Hon
3 siblings, 0 replies; 6+ messages in thread
From: Ricardo Pardini via B4 Relay @ 2025-12-30 20:19 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Ricardo Pardini
From: Ricardo Pardini <ricardo@pardini.net>
Enable the NPU on FriendlyElec CM3588.
The regulator vdd_npu_s0 was already described.
Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
---
.../dts/rockchip/rk3588-friendlyelec-cm3588.dtsi | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
index af431fdcbea7a..46e33e666bb3d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi
@@ -264,6 +264,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
+&pd_npu {
+ domain-supply = <&vdd_npu_s0>;
+};
+
&pinctrl {
gpio-leds {
led_sys_pin: led-sys-pin {
@@ -294,6 +298,36 @@ sd_s0_pwr: sd-s0-pwr {
};
};
+&rknn_core_0 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_1 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_2 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_mmu_0 {
+ status = "okay";
+};
+
+&rknn_mmu_1 {
+ status = "okay";
+};
+
+&rknn_mmu_2 {
+ status = "okay";
+};
+
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";
--
2.52.0
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 3/3] arm64: dts: rockchip: Enable the NPU on Turing RK1
2025-12-30 20:19 [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Ricardo Pardini via B4 Relay
2025-12-30 20:19 ` [PATCH 1/3] arm64: dts: rockchip: Enable the NPU on NanoPC T6/T6-LTS Ricardo Pardini via B4 Relay
2025-12-30 20:19 ` [PATCH 2/3] arm64: dts: rockchip: Enable the NPU on FriendlyElec CM3588 Ricardo Pardini via B4 Relay
@ 2025-12-30 20:19 ` Ricardo Pardini via B4 Relay
2025-12-31 2:58 ` [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Jimmy Hon
3 siblings, 0 replies; 6+ messages in thread
From: Ricardo Pardini via B4 Relay @ 2025-12-30 20:19 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner
Cc: devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
Ricardo Pardini
From: Ricardo Pardini <ricardo@pardini.net>
Enable the NPU on Turing RK1.
The regulator vdd_npu_s0 was already described.
Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
---
.../arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 34 ++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
index 6daea8961fdd6..7b28ec9ce1945 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi
@@ -293,6 +293,10 @@ &pd_gpu {
domain-supply = <&vdd_gpu_s0>;
};
+&pd_npu {
+ domain-supply = <&vdd_npu_s0>;
+};
+
&pinctrl {
fan {
fan_int: fan-int {
@@ -333,6 +337,36 @@ &pwm0 {
status = "okay";
};
+&rknn_core_0 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_1 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_core_2 {
+ npu-supply = <&vdd_npu_s0>;
+ sram-supply = <&vdd_npu_s0>;
+ status = "okay";
+};
+
+&rknn_mmu_0 {
+ status = "okay";
+};
+
+&rknn_mmu_1 {
+ status = "okay";
+};
+
+&rknn_mmu_2 {
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
no-sdio;
--
2.52.0
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards
2025-12-30 20:19 [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Ricardo Pardini via B4 Relay
` (2 preceding siblings ...)
2025-12-30 20:19 ` [PATCH 3/3] arm64: dts: rockchip: Enable the NPU on Turing RK1 Ricardo Pardini via B4 Relay
@ 2025-12-31 2:58 ` Jimmy Hon
2025-12-31 10:47 ` Ricardo Pardini
3 siblings, 1 reply; 6+ messages in thread
From: Jimmy Hon @ 2025-12-31 2:58 UTC (permalink / raw)
To: ricardo
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
nicolas.frattaroli
On Tue, Dec 30, 2025 at 2:20 PM Ricardo Pardini via B4 Relay
<devnull+ricardo.pardini.net@kernel.org> wrote:
>
> This series enables the NPU on a few Rockchip rk3588 boards.
> In every case here, the required regulator was already described.
Now that the pd_npu has defined the dependency to the vdd_npu_s0,
shouldn't the regulator-always-on be removed from the regulator? When
the Rock5B enabled the NPU, it didn't define the regulator with always
on. [1]
More specifically, the commit message for the introduction of the
pd_npu label mentions how the regulator no longer needs to be always
on. [2]
[1] https://lore.kernel.org/linux-rockchip/20250721-6-10-rocket-v9-10-77ebd484941e@tomeuvizoso.net/
[2] https://lore.kernel.org/linux-rockchip/20250721-6-10-rocket-v9-7-77ebd484941e@tomeuvizoso.net/
Jimmy
>
> Signed-off-by: Ricardo Pardini <ricardo@pardini.net>
> ---
> Ricardo Pardini (3):
> arm64: dts: rockchip: Enable the NPU on NanoPC T6/T6-LTS
> arm64: dts: rockchip: Enable the NPU on FriendlyElec CM3588
> arm64: dts: rockchip: Enable the NPU on Turing RK1
>
> .../dts/rockchip/rk3588-friendlyelec-cm3588.dtsi | 34 +++++++++++++++++++++
> arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi | 35 ++++++++++++++++++++++
> .../arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi | 34 +++++++++++++++++++++
> 3 files changed, 103 insertions(+)
> ---
> base-commit: 9448598b22c50c8a5bb77a9103e2d49f134c9578
> change-id: 20251230-arm64-dts-rockchip-rk3588-npu-enablements-1e2830d2e7b0
>
> Best regards,
> --
> Ricardo Pardini <ricardo@pardini.net>
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards
2025-12-31 2:58 ` [PATCH 0/3] arm64: dts: rockchip: Enable the NPU on some rk3588 boards Jimmy Hon
@ 2025-12-31 10:47 ` Ricardo Pardini
0 siblings, 0 replies; 6+ messages in thread
From: Ricardo Pardini @ 2025-12-31 10:47 UTC (permalink / raw)
To: Jimmy Hon
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Heiko Stuebner,
devicetree, linux-arm-kernel, linux-rockchip, linux-kernel,
nicolas.frattaroli
Hi Jimmy,
>> This series enables the NPU on a few Rockchip rk3588 boards.
>> In every case here, the required regulator was already described.
> Now that the pd_npu has defined the dependency to the vdd_npu_s0,
> shouldn't the regulator-always-on be removed from the regulator? When
> the Rock5B enabled the NPU, it didn't define the regulator with always
> on. [1]
>
> More specifically, the commit message for the introduction of the
> pd_npu label mentions how the regulator no longer needs to be always
> on. [2]
>
> [1] https://lore.kernel.org/linux-rockchip/20250721-6-10-rocket-v9-10-77ebd484941e@tomeuvizoso.net/
> [2] https://lore.kernel.org/linux-rockchip/20250721-6-10-rocket-v9-7-77ebd484941e@tomeuvizoso.net/
Nice, I overlooked that. I'll send a v2 removing `regulator-always-on;`
from the regulator.
And maybe a separate series removing it from the the other NPU-enabled
boards that still have it?
Thanks,
Ricardo
^ permalink raw reply [flat|nested] 6+ messages in thread