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* [PATCH 0/2] RISC-V: validate ACPI MADT entries before use
@ 2026-10-16 14:12 Jiale Yao
  2026-10-16 14:12 ` [PATCH 1/2] riscv: validate RINTC " Jiale Yao
  2026-10-16 14:12 ` [PATCH 2/2] ACPI: riscv: validate interrupt controller MADT entries Jiale Yao
  0 siblings, 2 replies; 5+ messages in thread
From: Jiale Yao @ 2026-10-16 14:12 UTC (permalink / raw)
  To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
	Sunil V L, Rafael J. Wysocki, Len Brown, linux-riscv,
	linux-kernel, linux-acpi
  Cc: Jiale Yao

RISC-V ACPI initialization passes generic MADT subtable headers to
RINTC, PLIC, and APLIC parsers.  These parsers currently access fields
from the fixed-size records before establishing that firmware supplied
the complete structure.  A truncated MADT entry can therefore cause an
out-of-bounds read during early interrupt and CPU setup.

Validate each typed record before its first field access.  The first
patch fixes the CPU RINTC parser and the second covers the PLIC and APLIC
interrupt-controller parsers.

Jiale Yao (2):
  riscv: validate RINTC entries before use
  ACPI: riscv: validate interrupt controller MADT entries

 arch/riscv/kernel/smpboot.c | 6 +++---
 drivers/acpi/riscv/irq.c    | 6 ++++++
 2 files changed, 9 insertions(+), 3 deletions(-)

-- 
2.34.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2026-10-17  7:27 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2026-10-16 14:12 [PATCH 0/2] RISC-V: validate ACPI MADT entries before use Jiale Yao
2026-10-16 14:12 ` [PATCH 1/2] riscv: validate RINTC " Jiale Yao
2026-10-17  7:25   ` jiale yao
2026-10-16 14:12 ` [PATCH 2/2] ACPI: riscv: validate interrupt controller MADT entries Jiale Yao
2026-10-17  7:27   ` jiale yao

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