From: John Hubbard <jhubbard@nvidia.com>
To: Joel Fernandes <joelagnelf@nvidia.com>,
linux-kernel@vger.kernel.org, rust-for-linux@vger.kernel.org,
dri-devel@lists.freedesktop.org, dakr@kernel.org,
acourbot@nvidia.com
Cc: Alistair Popple <apopple@nvidia.com>,
Miguel Ojeda <ojeda@kernel.org>,
Alex Gaynor <alex.gaynor@gmail.com>,
Boqun Feng <boqun.feng@gmail.com>, Gary Guo <gary@garyguo.net>,
bjorn3_gh@protonmail.com, Benno Lossin <lossin@kernel.org>,
Andreas Hindborg <a.hindborg@kernel.org>,
Alice Ryhl <aliceryhl@google.com>,
Trevor Gross <tmgross@umich.edu>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Timur Tabi <ttabi@nvidia.com>,
joel@joelfernandes.org, Elle Rhumsaa <elle@weathered-steel.dev>,
Daniel Almeida <daniel.almeida@collabora.com>,
nouveau@lists.freedesktop.org
Subject: Re: [PATCH 4/7] docs: gpu: nova-core: Document the PRAMIN aperture mechanism
Date: Mon, 20 Oct 2025 12:36:33 -0700 [thread overview]
Message-ID: <506e84b8-1a99-4548-b2c6-b502d790f4e1@nvidia.com> (raw)
In-Reply-To: <20251020185539.49986-5-joelagnelf@nvidia.com>
On 10/20/25 11:55 AM, Joel Fernandes wrote:
...> +Logically, the PRAMIN aperture mechanism is implemented by the GPU's PBUS (PCIe Bus Controller Unit)
> +and provides a CPU-accessible window into VRAM through the PCIe interface::
> +
> + +-----------------+ PCIe +------------------------------+
> + | CPU |<----------->| GPU |
> + +-----------------+ | |
> + | +----------------------+ |
> + | | PBUS | |
> + | | (Bus Controller) | |
> + | | | |
> + | | +--------------.<------------ (window always starts at
> + | | | PRAMIN | | | BAR0 + 0x700000)
Quick question: does "window always starts at" actually mean "windows
is always initialized to" ? Or something else?
thanks,
--
John Hubbard
> + | | | Window | | |
> + | | | (1MB) | | |
> + | | +--------------+ | |
> + | | | | |
> + | +---------|------------+ |
> + | | |
> + | v |
> + | .----------------------.<------------ (Program PRAMIN to any
> + | | VRAM | | 64KB VRAM physical boundary)
> + | | (Several GBs) | |
> + | | | |
> + | | FB[0x000000000000] | |
> + | | ... | |
> + | | FB[0x7FFFFFFFFFF] | |
> + | +----------------------+ |
> + +------------------------------+
> +
> +PBUS (PCIe Bus Controller) among other things is responsible in the GPU for handling MMIO
> +accesses to the BAR registers.
> +
> +PRAMIN Window Operation
> +=======================
> +
> +The PRAMIN window provides a 1MB sliding aperture that can be repositioned over
> +the entire VRAM address space using the NV_PBUS_BAR0_WINDOW register.
> +
> +Window Control Mechanism
> +-------------------------
> +
> +The window position is controlled via the PBUS BAR0_WINDOW register::
> +
> + NV_PBUS_BAR0_WINDOW Register
> + +-----+-----+--------------------------------------+
> + |31-26|25-24| 23-0 |
> + | |TARG | BASE_ADDR |
> + | | ET | (bits 39:16 of VRAM address) |
> + +-----+-----+--------------------------------------+
> +
> + TARGET field values:
> + - 0x0: VID_MEM (Video Memory / VRAM)
> + - 0x1: SYS_MEM_COHERENT (Coherent system memory)
> + - 0x2: SYS_MEM_NONCOHERENT (Non-coherent system memory)
> +
> +64KB Alignment Requirement
> +---------------------------
> +
> +The PRAMIN window must be aligned to 64KB boundaries in VRAM. This is enforced
> +by the BASE_ADDR field representing bits [39:16] of the target address::
> +
> + VRAM Address Calculation:
> + actual_vram_addr = (BASE_ADDR << 16) + pramin_offset
> + Where:
> + - BASE_ADDR: 24-bit value from NV_PBUS_BAR0_WINDOW[23:0]
> + - pramin_offset: 20-bit offset within PRAMIN window [0x00000-0xFFFFF]
> + Example Window Positioning:
> + +---------------------------------------------------------+
> + | VRAM Space |
> + | |
> + | 0x000000000 +-----------------+ <-- 64KB aligned |
> + | | PRAMIN Window | |
> + | | (1MB) | |
> + | 0x0000FFFFF +-----------------+ |
> + | |
> + | | ^ |
> + | | | Window can slide |
> + | v | to any 64KB boundary |
> + | |
> + | 0x123400000 +-----------------+ <-- 64KB aligned |
> + | | PRAMIN Window | |
> + | | (1MB) | |
> + | 0x1234FFFFF +-----------------+ |
> + | |
> + | ... |
> + | |
> + | 0x7FFFF0000 +-----------------+ <-- 64KB aligned |
> + | | PRAMIN Window | |
> + | | (1MB) | |
> + | 0x7FFFFFFFF +-----------------+ |
> + +---------------------------------------------------------+
> diff --git a/Documentation/gpu/nova/index.rst b/Documentation/gpu/nova/index.rst
> index 46302daace34..e77d3ee336a4 100644
> --- a/Documentation/gpu/nova/index.rst
> +++ b/Documentation/gpu/nova/index.rst
> @@ -33,3 +33,4 @@ vGPU manager VFIO driver and the nova-drm driver.
> core/fwsec
> core/falcon
> core/msgq
> + core/pramin
next prev parent reply other threads:[~2025-10-20 19:36 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-20 18:55 [PATCH 0/7] Pre-requisite patches for mm and irq in nova-core Joel Fernandes
2025-10-20 18:55 ` [PATCH 1/7] docs: rust: Fix a few grammatical errors Joel Fernandes
2025-10-20 21:21 ` John Hubbard
2025-10-20 21:33 ` Miguel Ojeda
2025-10-20 23:23 ` Joel Fernandes
2025-10-20 18:55 ` [PATCH 2/7] gpu: nova-core: Add support to convert bitfield to underlying type Joel Fernandes
2025-10-20 21:25 ` John Hubbard
2025-10-22 6:25 ` Alexandre Courbot
2025-10-22 17:51 ` Joel Fernandes
2025-10-20 18:55 ` [PATCH 3/7] docs: gpu: nova-core: Document GSP RPC message queue architecture Joel Fernandes
2025-10-20 21:49 ` John Hubbard
2025-10-22 1:43 ` Bagas Sanjaya
2025-10-22 11:16 ` Alexandre Courbot
2025-10-20 18:55 ` [PATCH 4/7] docs: gpu: nova-core: Document the PRAMIN aperture mechanism Joel Fernandes
2025-10-20 19:36 ` John Hubbard [this message]
2025-10-20 19:48 ` Joel Fernandes
2025-10-20 20:42 ` John Hubbard
2025-10-20 20:45 ` Joel Fernandes
2025-10-20 22:08 ` John Hubbard
2025-10-22 2:09 ` Bagas Sanjaya
2025-10-20 18:55 ` [PATCH 5/7] gpu: nova-core: Add support for managing GSP falcon interrupts Joel Fernandes
2025-10-20 22:35 ` John Hubbard
2025-10-21 18:42 ` Joel Fernandes
2025-10-22 6:48 ` Alexandre Courbot
2025-10-22 21:09 ` Joel Fernandes
2025-10-22 23:16 ` John Hubbard
2025-10-22 6:47 ` Alexandre Courbot
2025-10-22 21:05 ` Joel Fernandes
2025-10-20 18:55 ` [PATCH 6/7] nova-core: mm: Add support to use PRAMIN windows to write to VRAM Joel Fernandes
2025-10-22 2:18 ` John Hubbard
2025-10-22 17:48 ` Joel Fernandes
2025-10-22 20:43 ` Joel Fernandes
2025-10-24 11:31 ` Alexandre Courbot
2025-10-22 10:41 ` Alexandre Courbot
2025-10-22 22:04 ` Joel Fernandes
2025-10-24 11:39 ` Alexandre Courbot
2025-10-20 18:55 ` [PATCH 7/7] nova-core: mm: Add data structures for page table management Joel Fernandes
2025-10-20 20:59 ` John Hubbard
2025-10-21 18:26 ` Joel Fernandes
2025-10-21 20:30 ` John Hubbard
2025-10-21 21:58 ` Joel Fernandes
2025-10-20 21:30 ` Miguel Ojeda
2025-11-03 19:21 ` Joel Fernandes
2025-11-04 17:54 ` Miguel Ojeda
2025-11-04 18:18 ` Danilo Krummrich
2025-11-03 19:29 ` John Hubbard
2025-11-04 17:56 ` Miguel Ojeda
2025-11-05 2:25 ` John Hubbard
2025-10-22 11:21 ` Alexandre Courbot
2025-10-22 19:13 ` Joel Fernandes
2025-10-20 21:20 ` [PATCH 0/7] Pre-requisite patches for mm and irq in nova-core John Hubbard
2025-10-21 18:29 ` Joel Fernandes
2025-10-22 6:57 ` Alexandre Courbot
2025-10-22 21:30 ` Joel Fernandes
2025-10-24 11:51 ` Alexandre Courbot
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