From: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
To: Ben Maurer <bmaurer@fb.com>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Boqun Feng <boqun.feng@gmail.com>,
Peter Zijlstra <peterz@infradead.org>,
Paul Turner <pjt@google.com>, Andrew Hunter <ahh@google.com>,
Andy Lutomirski <luto@amacapital.net>,
Dave Watson <davejwatson@fb.com>,
Josh Triplett <josh@joshtriplett.org>,
Will Deacon <will.deacon@arm.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Andi Kleen <andi@firstfloor.org>, Chris Lameter <cl@linux.com>,
Ingo Molnar <mingo@redhat.com>, "H. Peter Anvin" <hpa@zytor.com>,
rostedt <rostedt@goodmis.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Russell King <linux@arm.linux.org.uk>,
Catalin Marinas <catalin.marinas@arm.com>,
Michael Kerrisk <mtk.manpages@gmail.com>,
Alexander Viro <viro@zeniv.linux.org.uk>,
linux-api <linux-api@vger.kernel.org>
Subject: Re: [RFC PATCH v9 for 4.15 01/14] Restartable sequences system call
Date: Wed, 18 Oct 2017 18:11:39 +0000 (UTC) [thread overview]
Message-ID: <515879378.43966.1508350299712.JavaMail.zimbra@efficios.com> (raw)
In-Reply-To: <CY4PR15MB1688286D6B1283A1C234BAE6CF4E0@CY4PR15MB1688.namprd15.prod.outlook.com>
----- On Oct 18, 2017, at 12:41 PM, Ben Maurer bmaurer@fb.com wrote:
>> The layout of struct rseq_cs is as follows:
>
>> start_ip
>> Instruction pointer address of the first instruction of the
>> sequence of consecutive assembly instructions.
>
>> post_commit_ip
>> Instruction pointer address after the last instruction of
>> the sequence of consecutive assembly instructions.
>
>> abort_ip
>> Instruction pointer address where to move the execution
>> flow in case of abort of the sequence of consecutive assem‐
>> bly instructions.
>
> Really minor performance performance thought here.
>
> 1) In the kernel at context switch time you'd need code like:
>
> if (ip >= start_ip && ip <= post_commit_ip)
>
> This branch would be hard to predict because most instruction pointers would be
> either before or after. If post_commit_ip were relative to start_ip you could
> do this:
>
> if (ip - start_ip <= post_commit_offset)
>
> which is a single branch that would be more predictable.
The actual context switch code only sets the "t->rseq_preempt"
flags and TIF_NOTIFY_RESUME. The user-accesses happen when
returning to user-space with TIF_NOTIFY_RESUME set.
Indeed, we can expect most context switch out of a registered
rseq thread to trigger one __rseq_handle_notify_resume on
return to user-space for that thread.
As you point out, the "common" case is *not* nested over a
critical section. This means t->rseq->rseq_cs is NULL.
This effectively means post_commit_ip and start_ip are NULL in
rseq_ip_fixup when compared to the current ip.
The check is currently implemented like this:
/* Handle potentially not being within a critical section. */
if ((void __user *)instruction_pointer(regs) >= post_commit_ip ||
(void __user *)instruction_pointer(regs) < start_ip)
return 1;
So if non-nested over c.s., the first branch is ip >= NULL, which turns
out to be true, and we therefore return 1 from rseq_ip_fixup.
I suspect that we'd need to cast those pointers to (unsigned long) to
be strictly C standard compliant.
If we instead use "post_commit_offset" relative to start_ip, a non-nested
common case would have start_ip = NULL, post_commit_offset = 0. The check
you propose for not being nested over a c.s. would look like:
if (!((long)ip - (long)start_ip <= (long)post_commit_offset))
return 1;
This introduces an issue here: if "ip" is lower than "start_ip", we
can incorrectly think we are in a critical section, when we are in
fact not.
With the previous approach proposed by Paul Turner, this was not an
issue, because he was setting the equivalent of the rseq_cs pointer
back to NULL at the end of the assembly fast-path. However, I have
a fast-path optimization that only sets the rseq_cs pointer at the
beginning of the fast-path, without clearing it afterward. It's up
to the following critical section to overwrite the rseq_cs pointer,
or to the kernel to set it back to NULL if it finds out that it is
preempting/delivering a signal over an instruction pointer outside
of the current rseq_cs start_ip/post_commit_ip range (lazy clear).
Moreover, this modification would add a subtraction on the common case
(ip - start_ip), and makes the ABI slightly uglier.
>
> 2) In a shared library a rseq_cs structure would have to be relocated at runtime
> because at compilation time the final address of the library wouldn't be known.
> I'm not sure if this is important enough to address, but it could be solved by
> making the pointers relative to the address of rseq_cs. But this would make for
> an uglier API.
If I understand well, you are proposing to speed up .so load time by
means of removing relocations of pointers within rseq_cs, done by
making those relative to the rseq_cs address.
So the downside here is extra arithmetic operations on resume to
userspace (__rseq_handle_notify_resume): the kernel would have
to calculate the offset of start_ip and post_commit_ip from the
address of rseq_cs. Sure, we're only talking about two additions
there, but I don't think marginally speeding up library load
justifies extra work in that kernel path, nor the uglier ABI.
Thoughts ?
Thanks,
Mathieu
--
Mathieu Desnoyers
EfficiOS Inc.
http://www.efficios.com
next prev parent reply other threads:[~2017-10-18 18:09 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 23:03 [RFC PATCH v9 for 4.15 00/14] Restartable sequences and CPU op vector system calls Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH v9 for 4.15 01/14] Restartable sequences system call Mathieu Desnoyers
2017-10-13 0:36 ` Linus Torvalds
2017-10-13 9:35 ` Ben Maurer
2017-10-13 18:30 ` Linus Torvalds
2017-10-13 20:54 ` Paul E. McKenney
2017-10-13 21:05 ` Linus Torvalds
2017-10-13 21:21 ` Paul E. McKenney
2017-10-13 21:36 ` Mathieu Desnoyers
2017-10-16 16:04 ` Carlos O'Donell
2017-10-16 16:46 ` Andi Kleen
2017-10-16 22:17 ` Mathieu Desnoyers
2017-10-17 16:19 ` Ben Maurer
2017-10-17 16:33 ` Mathieu Desnoyers
2017-10-17 16:41 ` Ben Maurer
2017-10-17 17:48 ` Mathieu Desnoyers
2017-10-18 6:22 ` Greg KH
2017-10-18 16:28 ` Mathieu Desnoyers
2017-10-14 3:01 ` Andi Kleen
2017-10-14 4:05 ` Linus Torvalds
2017-10-14 11:37 ` Mathieu Desnoyers
2017-10-13 12:50 ` Florian Weimer
2017-10-13 13:40 ` Mathieu Desnoyers
2017-10-13 13:56 ` Florian Weimer
2017-10-13 14:27 ` Mathieu Desnoyers
2017-10-13 17:24 ` Andy Lutomirski
2017-10-13 17:53 ` Florian Weimer
2017-10-13 18:17 ` Andy Lutomirski
2017-10-14 11:53 ` Mathieu Desnoyers
2017-10-18 16:41 ` Ben Maurer
2017-10-18 18:11 ` Mathieu Desnoyers [this message]
2017-10-19 11:35 ` Mathieu Desnoyers
2017-10-19 17:01 ` Florian Weimer
2017-10-23 17:30 ` Ben Maurer
2017-10-23 20:44 ` Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 02/14] tracing: instrument restartable sequences Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 03/14] Restartable sequences: ARM 32 architecture support Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 04/14] Restartable sequences: wire up ARM 32 system call Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 05/14] Restartable sequences: x86 32/64 architecture support Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 06/14] Restartable sequences: wire up x86 32/64 system call Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 07/14] Restartable sequences: powerpc architecture support Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 08/14] Restartable sequences: Wire up powerpc system call Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 09/14] Provide cpu_opv " Mathieu Desnoyers
2017-10-13 13:57 ` Alan Cox
2017-10-13 14:50 ` Mathieu Desnoyers
2017-10-14 14:22 ` Mathieu Desnoyers
2017-10-13 17:20 ` Andy Lutomirski
2017-10-14 2:50 ` Andi Kleen
2017-10-14 13:35 ` Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 10/14] cpu_opv: Wire up x86 32/64 " Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 11/14] cpu_opv: Wire up powerpc " Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 12/14] cpu_opv: Wire up ARM32 " Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 13/14] cpu_opv: Implement selftests Mathieu Desnoyers
2017-10-12 23:03 ` [RFC PATCH for 4.15 14/14] Restartable sequences: Provide self-tests Mathieu Desnoyers
2017-10-16 2:51 ` Michael Ellerman
2017-10-16 14:23 ` Mathieu Desnoyers
2017-10-17 10:38 ` Michael Ellerman
2017-10-17 13:50 ` Mathieu Desnoyers
2017-10-16 18:50 ` Mathieu Desnoyers
2017-10-17 10:36 ` Michael Ellerman
2017-10-17 13:50 ` Mathieu Desnoyers
2017-10-18 5:45 ` Michael Ellerman
2017-10-16 3:00 ` Michael Ellerman
2017-10-16 3:48 ` Boqun Feng
2017-10-16 11:48 ` Michael Ellerman
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