Re: [PATCH] MIPS: Cobalt: Include legacy IDE ports in the PCI I/O window

[Florian Fainelli <f.fainelli@gmail.com>]

On 10/20/26 10:13, Maciej W. Rozycki wrote:
> On Thu, 15 Oct 2026, Florian Fainelli wrote:
> 
>> The Cobalt PCI I/O window starts at 0x1000, excluding the VIA IDE
>> controller's fixed compatibility-mode ports at 0x170, 0x1f0, 0x376 and
>> 0x3f6. These resources cannot be claimed under the host bridge window.
>>
>> Since pcibios_enable_device() was converted to pci_enable_resources(),
>> the unclaimed IDE resources cause device enable to fail with -EINVAL:
>>
>>    pata_via 0000:00:09.1: BAR 0 [io  0x01f0-0x01f7]: not claimed; can't enable device
>>    pata_via 0000:00:09.1: probe with driver pata_via failed with error -22
>>
>> Lower the PCI I/O window start to 0x100 so the fixed IDE resources can
>> be claimed. Keep the reserved ISA resources below 0x100 outside the PCI
>> window.
> 
>   Why not go with 0 (unless that's not what the system controller supports
> as the bottom of the PCI I/O space), and just set PCIBIOS_MIN_IO correctly
> as several platforms do instead?  Is there a southbridge in your system?

0 does not work and gives me:

[    0.205993] Skipping PCI bus scan due to resource conflict

There is no south bridge AFAICT, the CPU connection to the GT-64111.
-- 
Florian