[PATCH 1/2] ARM: DT: APQ8064: Add pinctrl support This patch adds device tree nodes to support pinctrl for apq8064 SOC

[PATCH 1/2] ARM: DT: APQ8064: Add pinctrl support This patch adds device tree nodes to support pinctrl for apq8064 SOC

[Pramod Gurav]

CC: Rob Herring <robh+dt@kernel.org>
CC: Pawel Moll <pawel.moll@arm.com>
CC: Mark Rutland <mark.rutland@arm.com>
CC: Ian Campbell <ijc+devicetree@hellion.org.uk>
CC: Kumar Gala <galak@codeaurora.org>
CC: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org

Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d66fb25..681e194 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -73,6 +73,17 @@
 		ranges;
 		compatible = "simple-bus";
 
+		msm_gpio: pinctrl@800000 {
+			compatible = "qcom,apq8064-pinctrl";
+			reg = <0x800000 0x4000>;
+
+			gpio-controller;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <0 32 0x4>;
+		};
+
 		intc: interrupt-controller@2000000 {
 			compatible = "qcom,msm-qgic2";
 			interrupt-controller;
-- 
1.7.0.4

[PATCH 2/2] pinctrl: qcom: Add support for reset for apq8064

[Pramod Gurav]

This patch adds support for reset functions to reboot the boards
with soc apq8064.

CC: Linus Walleij <linus.walleij@linaro.org>
CC: Bjorn Andersson <bjorn.andersson@sonymobile.com>
CC: "Ivan T. Ivanov" <iivanov@mm-sol.com>
CC: Stephen Boyd <sboyd@codeaurora.org>
CC: Andy Gross <agross@codeaurora.org>
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
---
 drivers/pinctrl/qcom/pinctrl-apq8064.c |    7 +++++-
 drivers/pinctrl/qcom/pinctrl-msm.c     |   36 ++++++++++++++++++++++++++++++++
 2 files changed, 42 insertions(+), 1 deletions(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c
index feb6f15..ef1263c 100644
--- a/drivers/pinctrl/qcom/pinctrl-apq8064.c
+++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c
@@ -324,6 +324,7 @@ enum apq8064_functions {
 	APQ_MUX_tsif1,
 	APQ_MUX_tsif2,
 	APQ_MUX_usb2_hsic,
+	APQ_MUX_ps_hold,
 	APQ_MUX_NA,
 };
 
@@ -351,6 +352,9 @@ static const char * const gpio_groups[] = {
 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
 };
+static const char * const ps_hold_groups[] = {
+	"gpio78"
+};
 static const char * const gsbi1_groups[] = {
 	"gpio18", "gpio19", "gpio20", "gpio21"
 };
@@ -477,6 +481,7 @@ static const struct msm_function apq8064_functions[] = {
 	FUNCTION(tsif1),
 	FUNCTION(tsif2),
 	FUNCTION(usb2_hsic),
+	FUNCTION(ps_hold),
 };
 
 static const struct msm_pingroup apq8064_groups[] = {
@@ -558,7 +563,7 @@ static const struct msm_pingroup apq8064_groups[] = {
 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
-	PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
+	PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index 2738108..f4e4f8f 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -12,6 +12,7 @@
  * GNU General Public License for more details.
  */
 
+#include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/module.h>
@@ -27,12 +28,17 @@
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
 
+#include <asm/system_misc.h>
+
 #include "../core.h"
 #include "../pinconf.h"
 #include "pinctrl-msm.h"
 #include "../pinctrl-utils.h"
 
 #define MAX_NR_GPIO 300
+#define PS_HOLD_OFFSET 0x820
+
+static void __iomem *msm_ps_hold;
 
 /**
  * struct msm_pinctrl - state for a pinctrl-msm device
@@ -848,10 +854,31 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
 	return 0;
 }
 
+static void qcom_reset(enum reboot_mode reboot_mode, const char *cmd)
+{
+	writel(0, msm_ps_hold);
+	mdelay(10000);
+}
+
+const struct msm_function
+*find_pshold_function(const struct msm_function *functions,
+					unsigned nfunctions, const char *name)
+{
+	int i = 0;
+	const struct msm_function *func;
+
+	for (func = functions; i <= nfunctions; func++, i++)
+		if (!strcmp(func->name, name))
+			return func;
+
+	return NULL;
+}
+
 int msm_pinctrl_probe(struct platform_device *pdev,
 		      const struct msm_pinctrl_soc_data *soc_data)
 {
 	struct msm_pinctrl *pctrl;
+	const struct msm_function *func;
 	struct resource *res;
 	int ret;
 
@@ -871,6 +898,15 @@ int msm_pinctrl_probe(struct platform_device *pdev,
 	if (IS_ERR(pctrl->regs))
 		return PTR_ERR(pctrl->regs);
 
+#ifdef CONFIG_ARM
+	func = find_pshold_function(soc_data->functions,
+					soc_data->nfunctions, "ps_hold");
+	if (func) {
+		dev_dbg(&pdev->dev, "Found Function %s\n", func->name);
+		msm_ps_hold = pctrl->regs + PS_HOLD_OFFSET;
+		arm_pm_restart = qcom_reset;
+	}
+#endif
 	pctrl->irq = platform_get_irq(pdev, 0);
 	if (pctrl->irq < 0) {
 		dev_err(&pdev->dev, "No interrupt defined for msmgpio\n");
-- 
1.7.0.4

Re: [PATCH 2/2] pinctrl: qcom: Add support for reset for apq8064

[Kumar Gala]

On Aug 26, 2014, at 1:31 PM, Pramod Gurav <pramod.gurav@smartplayin.com> wrote:

> This patch adds support for reset functions to reboot the boards
> with soc apq8064.
> 
> CC: Linus Walleij <linus.walleij@linaro.org>
> CC: Bjorn Andersson <bjorn.andersson@sonymobile.com>
> CC: "Ivan T. Ivanov" <iivanov@mm-sol.com>
> CC: Stephen Boyd <sboyd@codeaurora.org>
> CC: Andy Gross <agross@codeaurora.org>
> Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
> ---
> drivers/pinctrl/qcom/pinctrl-apq8064.c |    7 +++++-
> drivers/pinctrl/qcom/pinctrl-msm.c     |   36 ++++++++++++++++++++++++++++++++
> 2 files changed, 42 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c b/drivers/pinctrl/qcom/pinctrl-apq8064.c
> index feb6f15..ef1263c 100644
> --- a/drivers/pinctrl/qcom/pinctrl-apq8064.c
> +++ b/drivers/pinctrl/qcom/pinctrl-apq8064.c
> @@ -324,6 +324,7 @@ enum apq8064_functions {
> 	APQ_MUX_tsif1,
> 	APQ_MUX_tsif2,
> 	APQ_MUX_usb2_hsic,
> +	APQ_MUX_ps_hold,
> 	APQ_MUX_NA,
> };
> 
> @@ -351,6 +352,9 @@ static const char * const gpio_groups[] = {
> 	"gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio83", "gpio84",
> 	"gpio85", "gpio86", "gpio87", "gpio88", "gpio89"
> };
> +static const char * const ps_hold_groups[] = {
> +	"gpio78"
> +};
> static const char * const gsbi1_groups[] = {
> 	"gpio18", "gpio19", "gpio20", "gpio21"
> };
> @@ -477,6 +481,7 @@ static const struct msm_function apq8064_functions[] = {
> 	FUNCTION(tsif1),
> 	FUNCTION(tsif2),
> 	FUNCTION(usb2_hsic),
> +	FUNCTION(ps_hold),
> };
> 
> static const struct msm_pingroup apq8064_groups[] = {
> @@ -558,7 +563,7 @@ static const struct msm_pingroup apq8064_groups[] = {
> 	PINGROUP(75, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> 	PINGROUP(76, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> 	PINGROUP(77, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> -	PINGROUP(78, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> +	PINGROUP(78, ps_hold, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> 	PINGROUP(79, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> 	PINGROUP(80, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> 	PINGROUP(81, NA, NA, NA, NA, NA, NA, NA, NA, NA, NA),
> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
> index 2738108..f4e4f8f 100644
> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
> @@ -12,6 +12,7 @@
>  * GNU General Public License for more details.
>  */
> 
> +#include <linux/delay.h>
> #include <linux/err.h>
> #include <linux/io.h>
> #include <linux/module.h>
> @@ -27,12 +28,17 @@
> #include <linux/interrupt.h>
> #include <linux/spinlock.h>
> 
> +#include <asm/system_misc.h>
> +
> #include "../core.h"
> #include "../pinconf.h"
> #include "pinctrl-msm.h"
> #include "../pinctrl-utils.h"
> 
> #define MAX_NR_GPIO 300
> +#define PS_HOLD_OFFSET 0x820
> +
> +static void __iomem *msm_ps_hold;
> 
> /**
>  * struct msm_pinctrl - state for a pinctrl-msm device
> @@ -848,10 +854,31 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
> 	return 0;
> }
> 
> +static void qcom_reset(enum reboot_mode reboot_mode, const char *cmd)
> +{
> +	writel(0, msm_ps_hold);
> +	mdelay(10000);
> +}
> +
> +const struct msm_function
> +*find_pshold_function(const struct msm_function *functions,
> +					unsigned nfunctions, const char *name)
> +{
> +	int i = 0;
> +	const struct msm_function *func;
> +
> +	for (func = functions; i <= nfunctions; func++, i++)
> +		if (!strcmp(func->name, name))
> +			return func;
> +
> +	return NULL;
> +}
> +
> int msm_pinctrl_probe(struct platform_device *pdev,
> 		      const struct msm_pinctrl_soc_data *soc_data)
> {
> 	struct msm_pinctrl *pctrl;
> +	const struct msm_function *func;
> 	struct resource *res;
> 	int ret;
> 
> @@ -871,6 +898,15 @@ int msm_pinctrl_probe(struct platform_device *pdev,
> 	if (IS_ERR(pctrl->regs))
> 		return PTR_ERR(pctrl->regs);
> 
> +#ifdef CONFIG_ARM
> +	func = find_pshold_function(soc_data->functions,
> +					soc_data->nfunctions, "ps_hold");
> +	if (func) {
> +		dev_dbg(&pdev->dev, "Found Function %s\n", func->name);
> +		msm_ps_hold = pctrl->regs + PS_HOLD_OFFSET;
> +		arm_pm_restart = qcom_reset;
> +	}

If we keep this we probably should add something like:

#else
#error “not supported on this arch"

> +#endif
> 	pctrl->irq = platform_get_irq(pdev, 0);
> 	if (pctrl->irq < 0) {
> 		dev_err(&pdev->dev, "No interrupt defined for msmgpio\n");
> -- 
> 1.7.0.4
> 
> --
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