* HiKey boot hangs with Linus' HEAD due to coresight dts changes?
@ 2017-11-17 1:54 John Stultz
2017-11-17 1:58 ` John Stultz
0 siblings, 1 reply; 6+ messages in thread
From: John Stultz @ 2017-11-17 1:54 UTC (permalink / raw)
To: Li Pengcheng, Wei Xu, Li Zhong; +Cc: Arnd Bergmann, Guodong Xu, Leo Yan, lkml
Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs:
...
[ 0.677971] Serial: AMBA PL011 UART driver
[ 0.694299] pstore: using zlib compression
[ 0.698830] console [pstore-1] enabled
[ 0.702623] pstore: Registered ramoops as persistent store backend
[ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0
[ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7,
base_baud = 0) is a PL011 rev2
[ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for
node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe
[ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for
node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe
<hangs here>
Bisecting this down, points to:
0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes")
Reverting this patch makes things work again.
Any ideas as to what might be wrong?
Please let me know if I can test any fixes or provide any additional info.
thanks
-john
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: HiKey boot hangs with Linus' HEAD due to coresight dts changes? 2017-11-17 1:54 HiKey boot hangs with Linus' HEAD due to coresight dts changes? John Stultz @ 2017-11-17 1:58 ` John Stultz 2017-11-17 2:06 ` Leo Yan 0 siblings, 1 reply; 6+ messages in thread From: John Stultz @ 2017-11-17 1:58 UTC (permalink / raw) To: Li Pengcheng, Wei Xu, Li Zhong; +Cc: Arnd Bergmann, Guodong Xu, Leo Yan, lkml On Thu, Nov 16, 2017 at 5:54 PM, John Stultz <john.stultz@linaro.org> wrote: > Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs: > ... > > [ 0.677971] Serial: AMBA PL011 UART driver > [ 0.694299] pstore: using zlib compression > [ 0.698830] console [pstore-1] enabled > [ 0.702623] pstore: Registered ramoops as persistent store backend > [ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0 > [ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, > base_baud = 0) is a PL011 rev2 > [ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for > node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe > [ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for > node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe > <hangs here> > > Bisecting this down, points to: > 0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes") > > Reverting this patch makes things work again. > > Any ideas as to what might be wrong? > > Please let me know if I can test any fixes or provide any additional info. If its helpful, the full tree I'm using (with the problematic patch reverted - as well as a few other needed fixups for recent regressions) is here: https://git.linaro.org/people/john.stultz/android-dev.git dev/hikey-mainline-WIP I'm using the "hikey_defconfig" added in the patchset to build with. thanks -john ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: HiKey boot hangs with Linus' HEAD due to coresight dts changes? 2017-11-17 1:58 ` John Stultz @ 2017-11-17 2:06 ` Leo Yan 2017-11-17 4:15 ` John Stultz 0 siblings, 1 reply; 6+ messages in thread From: Leo Yan @ 2017-11-17 2:06 UTC (permalink / raw) To: John Stultz Cc: Li Pengcheng, Wei Xu, Li Zhong, Arnd Bergmann, Guodong Xu, lkml Hi John, On Thu, Nov 16, 2017 at 05:58:54PM -0800, John Stultz wrote: > On Thu, Nov 16, 2017 at 5:54 PM, John Stultz <john.stultz@linaro.org> wrote: > > Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs: > > ... > > > > [ 0.677971] Serial: AMBA PL011 UART driver > > [ 0.694299] pstore: using zlib compression > > [ 0.698830] console [pstore-1] enabled > > [ 0.702623] pstore: Registered ramoops as persistent store backend > > [ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0 > > [ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, > > base_baud = 0) is a PL011 rev2 > > [ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for > > node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe > > [ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for > > node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe > > <hangs here> > > > > Bisecting this down, points to: > > 0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes") > > > > Reverting this patch makes things work again. > > > > Any ideas as to what might be wrong? > > > > Please let me know if I can test any fixes or provide any additional info. > > If its helpful, the full tree I'm using (with the problematic patch > reverted - as well as a few other needed fixups for recent > regressions) is here: > https://git.linaro.org/people/john.stultz/android-dev.git > dev/hikey-mainline-WIP > > I'm using the "hikey_defconfig" added in the patchset to build with. Could you check if below patch has been merged into your code base? >From f71a1da256962fbaac48ce0ec01600a1a43f42a1 Mon Sep 17 00:00:00 2001 From: Leo Yan <leo.yan@linaro.org> Date: Thu, 31 Aug 2017 20:36:47 +0800 Subject: [PATCH] clk: hi6220: mark clock cs_atb_syspll as critical Clock cs_atb_syspll is pll used for coresight trace bus; when clock cs_atb_syspll is disabled and operates its child clock node cs_atb results in system hang. So mark clock cs_atb_syspll as critical to keep it enabled. Cc: Guodong Xu <guodong.xu@linaro.org> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> --- drivers/clk/hisilicon/clk-hi6220.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/hisilicon/clk-hi6220.c b/drivers/clk/hisilicon/clk-hi6220.c index e786d71..a87809d 100644 --- a/drivers/clk/hisilicon/clk-hi6220.c +++ b/drivers/clk/hisilicon/clk-hi6220.c @@ -145,7 +145,7 @@ static struct hisi_gate_clock hi6220_separated_gate_clks_sys[] __initdata = { { HI6220_BBPPLL_SEL, "bbppll_sel", "pll0_bbp_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 9, 0, }, { HI6220_MEDIA_PLL_SRC, "media_pll_src", "pll_media_gate", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 10, 0, }, { HI6220_MMC2_SEL, "mmc2_sel", "mmc2_mux1", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 11, 0, }, - { HI6220_CS_ATB_SYSPLL, "cs_atb_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x270, 12, 0, }, + { HI6220_CS_ATB_SYSPLL, "cs_atb_syspll", "syspll", CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x270, 12, 0, }, }; static struct hisi_mux_clock hi6220_mux_clks_sys[] __initdata = { -- 2.7.4 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: HiKey boot hangs with Linus' HEAD due to coresight dts changes? 2017-11-17 2:06 ` Leo Yan @ 2017-11-17 4:15 ` John Stultz 2017-11-17 4:33 ` Leo Yan 0 siblings, 1 reply; 6+ messages in thread From: John Stultz @ 2017-11-17 4:15 UTC (permalink / raw) To: Leo Yan; +Cc: Li Pengcheng, Wei Xu, Li Zhong, Arnd Bergmann, Guodong Xu, lkml On Thu, Nov 16, 2017 at 6:06 PM, Leo Yan <leo.yan@linaro.org> wrote: > Hi John, > > On Thu, Nov 16, 2017 at 05:58:54PM -0800, John Stultz wrote: >> On Thu, Nov 16, 2017 at 5:54 PM, John Stultz <john.stultz@linaro.org> wrote: >> > Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs: >> > ... >> > >> > [ 0.677971] Serial: AMBA PL011 UART driver >> > [ 0.694299] pstore: using zlib compression >> > [ 0.698830] console [pstore-1] enabled >> > [ 0.702623] pstore: Registered ramoops as persistent store backend >> > [ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0 >> > [ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, >> > base_baud = 0) is a PL011 rev2 >> > [ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for >> > node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe >> > [ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for >> > node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe >> > <hangs here> >> > >> > Bisecting this down, points to: >> > 0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes") >> > >> > Reverting this patch makes things work again. >> > >> > Any ideas as to what might be wrong? >> > >> > Please let me know if I can test any fixes or provide any additional info. >> >> If its helpful, the full tree I'm using (with the problematic patch >> reverted - as well as a few other needed fixups for recent >> regressions) is here: >> https://git.linaro.org/people/john.stultz/android-dev.git >> dev/hikey-mainline-WIP >> >> I'm using the "hikey_defconfig" added in the patchset to build with. > > Could you check if below patch has been merged into your code base? > > From f71a1da256962fbaac48ce0ec01600a1a43f42a1 Mon Sep 17 00:00:00 2001 > From: Leo Yan <leo.yan@linaro.org> > Date: Thu, 31 Aug 2017 20:36:47 +0800 > Subject: [PATCH] clk: hi6220: mark clock cs_atb_syspll as critical > > Clock cs_atb_syspll is pll used for coresight trace bus; when clock > cs_atb_syspll is disabled and operates its child clock node cs_atb > results in system hang. So mark clock cs_atb_syspll as critical to > keep it enabled. No I don't have this in yet. Hopefully its queued up already, and it just landed out of order? Adding this patch does seem to resolve the issue. thanks -john ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: HiKey boot hangs with Linus' HEAD due to coresight dts changes? 2017-11-17 4:15 ` John Stultz @ 2017-11-17 4:33 ` Leo Yan 2017-11-17 12:10 ` Wei Xu 0 siblings, 1 reply; 6+ messages in thread From: Leo Yan @ 2017-11-17 4:33 UTC (permalink / raw) To: John Stultz Cc: Li Pengcheng, Wei Xu, Li Zhong, Arnd Bergmann, Guodong Xu, lkml On Thu, Nov 16, 2017 at 08:15:15PM -0800, John Stultz wrote: > On Thu, Nov 16, 2017 at 6:06 PM, Leo Yan <leo.yan@linaro.org> wrote: > > Hi John, > > > > On Thu, Nov 16, 2017 at 05:58:54PM -0800, John Stultz wrote: > >> On Thu, Nov 16, 2017 at 5:54 PM, John Stultz <john.stultz@linaro.org> wrote: > >> > Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs: > >> > ... > >> > > >> > [ 0.677971] Serial: AMBA PL011 UART driver > >> > [ 0.694299] pstore: using zlib compression > >> > [ 0.698830] console [pstore-1] enabled > >> > [ 0.702623] pstore: Registered ramoops as persistent store backend > >> > [ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0 > >> > [ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, > >> > base_baud = 0) is a PL011 rev2 > >> > [ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for > >> > node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe > >> > [ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for > >> > node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe > >> > <hangs here> > >> > > >> > Bisecting this down, points to: > >> > 0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes") > >> > > >> > Reverting this patch makes things work again. > >> > > >> > Any ideas as to what might be wrong? > >> > > >> > Please let me know if I can test any fixes or provide any additional info. > >> > >> If its helpful, the full tree I'm using (with the problematic patch > >> reverted - as well as a few other needed fixups for recent > >> regressions) is here: > >> https://git.linaro.org/people/john.stultz/android-dev.git > >> dev/hikey-mainline-WIP > >> > >> I'm using the "hikey_defconfig" added in the patchset to build with. > > > > Could you check if below patch has been merged into your code base? > > > > From f71a1da256962fbaac48ce0ec01600a1a43f42a1 Mon Sep 17 00:00:00 2001 > > From: Leo Yan <leo.yan@linaro.org> > > Date: Thu, 31 Aug 2017 20:36:47 +0800 > > Subject: [PATCH] clk: hi6220: mark clock cs_atb_syspll as critical > > > > Clock cs_atb_syspll is pll used for coresight trace bus; when clock > > cs_atb_syspll is disabled and operates its child clock node cs_atb > > results in system hang. So mark clock cs_atb_syspll as critical to > > keep it enabled. > > No I don't have this in yet. Hopefully its queued up already, and it > just landed out of order? Yeah, I checked this patch is in linux-next already; I expect this patch should go with coresight DT binding patch together for 4.15-rcX, but seems coresight DT binding patch has been merged ahead. > Adding this patch does seem to resolve the issue. Thanks for testing. Thanks, Leo Yan ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: HiKey boot hangs with Linus' HEAD due to coresight dts changes? 2017-11-17 4:33 ` Leo Yan @ 2017-11-17 12:10 ` Wei Xu 0 siblings, 0 replies; 6+ messages in thread From: Wei Xu @ 2017-11-17 12:10 UTC (permalink / raw) To: Leo Yan, John Stultz Cc: Li Pengcheng, Li Zhong, Arnd Bergmann, Guodong Xu, lkml Hi Leo, On 2017/11/17 4:33, Leo Yan wrote: > On Thu, Nov 16, 2017 at 08:15:15PM -0800, John Stultz wrote: >> On Thu, Nov 16, 2017 at 6:06 PM, Leo Yan <leo.yan@linaro.org> wrote: >>> Hi John, >>> >>> On Thu, Nov 16, 2017 at 05:58:54PM -0800, John Stultz wrote: >>>> On Thu, Nov 16, 2017 at 5:54 PM, John Stultz <john.stultz@linaro.org> wrote: >>>>> Testing with Linus' HEAD today on the HiKey board, I started seeing boot hangs: >>>>> ... >>>>> >>>>> [ 0.677971] Serial: AMBA PL011 UART driver >>>>> [ 0.694299] pstore: using zlib compression >>>>> [ 0.698830] console [pstore-1] enabled >>>>> [ 0.702623] pstore: Registered ramoops as persistent store backend >>>>> [ 0.708880] ramoops: attached 0x100000@0x21f00000, ecc: 0/0 >>>>> [ 0.715847] f8015000.uart: ttyAMA0 at MMIO 0xf8015000 (irq = 7, >>>>> base_baud = 0) is a PL011 rev2 >>>>> [ 0.725011] uart-pl011 f7111000.uart: could not find pctldev for >>>>> node /soc/pinmux@f7010000/uart1_pmx_func, deferring probe >>>>> [ 0.736375] uart-pl011 f7112000.uart: could not find pctldev for >>>>> node /soc/pinmux@f7010000/uart2_pmx_func, deferring probe >>>>> <hangs here> >>>>> >>>>> Bisecting this down, points to: >>>>> 0b79842775fa ("arm64: dts: hi6220: add coresight dt nodes") >>>>> >>>>> Reverting this patch makes things work again. >>>>> >>>>> Any ideas as to what might be wrong? >>>>> >>>>> Please let me know if I can test any fixes or provide any additional info. >>>> >>>> If its helpful, the full tree I'm using (with the problematic patch >>>> reverted - as well as a few other needed fixups for recent >>>> regressions) is here: >>>> https://git.linaro.org/people/john.stultz/android-dev.git >>>> dev/hikey-mainline-WIP >>>> >>>> I'm using the "hikey_defconfig" added in the patchset to build with. >>> >>> Could you check if below patch has been merged into your code base? >>> >>> From f71a1da256962fbaac48ce0ec01600a1a43f42a1 Mon Sep 17 00:00:00 2001 >>> From: Leo Yan <leo.yan@linaro.org> >>> Date: Thu, 31 Aug 2017 20:36:47 +0800 >>> Subject: [PATCH] clk: hi6220: mark clock cs_atb_syspll as critical >>> >>> Clock cs_atb_syspll is pll used for coresight trace bus; when clock >>> cs_atb_syspll is disabled and operates its child clock node cs_atb >>> results in system hang. So mark clock cs_atb_syspll as critical to >>> keep it enabled. >> >> No I don't have this in yet. Hopefully its queued up already, and it >> just landed out of order? > > Yeah, I checked this patch is in linux-next already; I expect this > patch should go with coresight DT binding patch together for 4.15-rcX, > but seems coresight DT binding patch has been merged ahead. > >> Adding this patch does seem to resolve the issue. > > Thanks for testing. Thanks! BR, Wei > > Thanks, > Leo Yan > > . > ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-11-17 12:15 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2017-11-17 1:54 HiKey boot hangs with Linus' HEAD due to coresight dts changes? John Stultz 2017-11-17 1:58 ` John Stultz 2017-11-17 2:06 ` Leo Yan 2017-11-17 4:15 ` John Stultz 2017-11-17 4:33 ` Leo Yan 2017-11-17 12:10 ` Wei Xu
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox
Powered by JetHome