Re: [PATCH 1/2] EDAC/amd64: Set zn_regs_v2 for all Family 1Ah models

["Badole, Vishal" <vishal.badole@amd.com>]

On 9/28/2026 7:51 PM, Yazen Ghannam wrote:
> On Fri, Sep 25, 2026 at 10:56:38PM +0530, Vishal Badole wrote:
>> The v2 register layout applies to every Family 1Ah model, but
>> zn_regs_v2 is set individually in each model case of the switch. All
>> currently supported models set it, so this is not a live bug; however a
>> model added later without its own case, or in a case that omits the
>> assignment, would read the UMC registers at the wrong offsets.
> 
> This parapragh should be simpler. Also, please avoid using long, run-on,
> compound sentences.
> 
Sure, I will update it in next patch revision.>>
>> Set zn_regs_v2 once at the Family 1Ah level so it applies to all models
>> uniformly, and drop the per-model assignments.
>>
>> No functional change intended.
>>
>> Suggested-by: Yazen Ghannam <yazen.ghannam@amd.com>
>> Signed-off-by: Vishal Badole <Vishal.Badole@amd.com>
>> ---
>>   drivers/edac/amd64_edac.c | 8 ++------
>>   1 file changed, 2 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
>> index 475235c402e8..cab696be4f07 100644
>> --- a/drivers/edac/amd64_edac.c
>> +++ b/drivers/edac/amd64_edac.c
>> @@ -3887,23 +3887,19 @@ static int per_family_init(struct amd64_pvt *pvt)
>>   		break;
>>   
>>   	case 0x1A:
>> +		pvt->flags.zn_regs_v2   = 1;
>> +
>>   		switch (pvt->model) {
>>   		case 0x00 ... 0x1f:
>>   			pvt->max_mcs            = 12;
>> -			pvt->flags.zn_regs_v2   = 1;
>> -			break;
>> -		case 0x40 ... 0x4f:
>> -			pvt->flags.zn_regs_v2   = 1;
>>   			break;
>>   		case 0x50 ... 0x57:
>>   		case 0xc0 ... 0xc7:
>>   			pvt->max_mcs            = 16;
>> -			pvt->flags.zn_regs_v2   = 1;
>>   			break;
>>   		case 0x90 ... 0x9f:
>>   		case 0xa0 ... 0xaf:
>>   			pvt->max_mcs            = 8;
>> -			pvt->flags.zn_regs_v2   = 1;
>>   			break;
>>   		}
>>   		break;
>> -- 
> 
> Otherwise, looks good to me.
> 
> Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
> 
> Thanks,
> Yazen