From: "Huang, Kai" <kai.huang@intel.com>
To: "peterz@infradead.org" <peterz@infradead.org>
Cc: "Hansen, Dave" <dave.hansen@intel.com>, "Christopherson,,
Sean" <seanjc@google.com>, "bp@alien8.de" <bp@alien8.de>,
"x86@kernel.org" <x86@kernel.org>,
"hpa@zytor.com" <hpa@zytor.com>,
"mingo@redhat.com" <mingo@redhat.com>,
"kirill.shutemov@linux.intel.com"
<kirill.shutemov@linux.intel.com>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"pbonzini@redhat.com" <pbonzini@redhat.com>,
"Yamahata, Isaku" <isaku.yamahata@intel.com>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"sathyanarayanan.kuppuswamy@linux.intel.com"
<sathyanarayanan.kuppuswamy@linux.intel.com>
Subject: Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more TDCALL/SEAMCALL leafs
Date: Thu, 13 Jul 2023 10:19:49 +0000 [thread overview]
Message-ID: <5cc5ba09636647a076206fae932bbf88f233b8b2.camel@intel.com> (raw)
In-Reply-To: <20230713084324.GA3138667@hirez.programming.kicks-ass.net>
On Thu, 2023-07-13 at 10:43 +0200, Peter Zijlstra wrote:
> On Thu, Jul 13, 2023 at 08:02:54AM +0000, Huang, Kai wrote:
>
> > Sorry I am ignorant here. Won't "clearing ECX only" leave high bits of
> > registers still containing guest's value?
>
> architecture zero-extends 32bit stores
Sorry, where can I find this information? Looking at SDM I couldn't find :-(
>
> > I see KVM code uses:
> >
> > xor %eax, %eax
> > xor %ecx, %ecx
> > xor %edx, %edx
> > xor %ebp, %ebp
> > xor %esi, %esi
> > xor %edi, %edi
> > #ifdef CONFIG_X86_64
> > xor %r8d, %r8d
> > xor %r9d, %r9d
> > xor %r10d, %r10d
> > xor %r11d, %r11d
> > xor %r12d, %r12d
> > xor %r13d, %r13d
> > xor %r14d, %r14d
> > xor %r15d, %r15d
> > #endif
> >
> > Which makes sense because KVM wants to support 32-bit too.
>
> Encoding for the first lot is shorter, the 64bit regs obviously need the
> RAX byte anyway.
>
> > However for TDX is 64-bit only.
> >
> > And I also see the current TDVMCALL code has:
> >
> > xor %r8d, %r8d
> > xor %r9d, %r9d
> > xor %r10d, %r10d
> > xor %r11d, %r11d
> > xor %rdi, %rdi
> > xor %rdx, %rdx
> >
> > Why does it need to use "d" postfix for all r* registers?
>
> That's the name of the 32bit subword, r#[bwd] for byte, word,
> double-word. SDM v1 3.7.2.1 has the whole list, I couldn't quicky find
> one for the zero-extention thing
>
> > Sorry for those questions but I struggled when I wrote those assembly and am
> > hoping to get my mind cleared on this. :-)
>
> No problem.
>
I _think_ I understand now? In 64-bit mode
xor %eax, %eax
equals to
xor %rax, %rax
(due to "architecture zero-extends 32bit stores")
Thus using the former (plus using "d" for %r*) can save some memory?
next prev parent reply other threads:[~2023-07-13 10:20 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-12 8:55 [PATCH 00/10] Unify TDCALL/SEAMCALL and TDVMCALL assembly Kai Huang
2023-07-12 8:55 ` [PATCH 01/10] x86/tdx: Zero out the missing RSI in TDX_HYPERCALL macro Kai Huang
2023-07-12 19:19 ` Sathyanarayanan Kuppuswamy
2023-07-12 8:55 ` [PATCH 02/10] x86/tdx: Use cmovc to save a label in TDX_MODULE_CALL asm Kai Huang
2023-07-12 19:27 ` Sathyanarayanan Kuppuswamy
2023-07-13 10:32 ` Huang, Kai
2023-07-12 8:55 ` [PATCH 03/10] x86/tdx: Move FRAME_BEGIN/END to TDX_MODULE_CALL asm macro Kai Huang
2023-07-12 19:57 ` Sathyanarayanan Kuppuswamy
2023-07-12 22:05 ` Isaku Yamahata
2023-07-12 8:55 ` [PATCH 04/10] x86/tdx: Make macros of TDCALLs consistent with the spec Kai Huang
2023-07-14 12:28 ` Nikolay Borisov
2023-07-14 12:28 ` Nikolay Borisov
2023-07-17 0:57 ` Huang, Kai
2023-07-12 8:55 ` [PATCH 05/10] x86/tdx: Rename __tdx_module_call() to __tdcall() Kai Huang
2023-07-12 8:55 ` [PATCH 06/10] x86/tdx: Pass TDCALL/SEAMCALL input/output registers via a structure Kai Huang
2023-07-12 8:55 ` [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more TDCALL/SEAMCALL leafs Kai Huang
2023-07-12 16:53 ` Peter Zijlstra
2023-07-12 16:59 ` Peter Zijlstra
2023-07-13 8:02 ` Huang, Kai
2023-07-13 8:43 ` Peter Zijlstra
2023-07-13 10:19 ` Huang, Kai [this message]
2023-07-13 10:24 ` Huang, Kai
2023-07-13 10:39 ` Peter Zijlstra
2023-07-13 10:37 ` Peter Zijlstra
2023-07-13 10:47 ` Huang, Kai
2023-07-13 11:22 ` Andrew Cooper
2023-07-13 11:40 ` Huang, Kai
2023-07-13 7:48 ` Huang, Kai
2023-07-13 8:46 ` Peter Zijlstra
2023-07-13 9:34 ` Huang, Kai
2023-07-13 9:40 ` Peter Zijlstra
2023-07-12 17:11 ` Peter Zijlstra
2023-07-13 8:09 ` Huang, Kai
2023-07-13 9:01 ` Peter Zijlstra
2023-07-13 9:15 ` Huang, Kai
2023-07-13 9:25 ` Peter Zijlstra
2023-07-13 10:01 ` Huang, Kai
2023-07-12 8:55 ` [PATCH 08/10] x86/tdx: Unify TDX_HYPERCALL and TDX_MODULE_CALL assembly Kai Huang
2023-07-15 10:05 ` Nikolay Borisov
2023-07-17 6:35 ` Huang, Kai
2023-07-17 7:02 ` Nikolay Borisov
2023-07-17 7:58 ` Huang, Kai
2023-07-18 10:32 ` Huang, Kai
2023-07-12 8:55 ` [PATCH 09/10] x86/virt/tdx: Wire up basic SEAMCALL functions Kai Huang
2023-07-12 22:15 ` Isaku Yamahata
2023-07-13 3:46 ` Huang, Kai
2023-07-13 7:42 ` Peter Zijlstra
2023-07-13 8:18 ` Huang, Kai
2023-07-13 9:03 ` Peter Zijlstra
2023-07-13 9:20 ` Huang, Kai
2023-07-13 14:51 ` Sean Christopherson
2023-07-17 3:52 ` Huang, Kai
2023-07-13 18:44 ` Isaku Yamahata
2023-08-08 9:16 ` Yuan Yao
2023-08-14 20:37 ` Isaku Yamahata
2023-07-12 8:55 ` [PATCH 10/10] x86/virt/tdx: Allow SEAMCALL to handle #UD and #GP Kai Huang
2023-07-13 8:07 ` Peter Zijlstra
2023-07-13 9:58 ` Huang, Kai
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