* [PATCH v2 01/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8350
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 02/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8450 Prashanth K
` (17 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 877905dfd861..e8f9d8bab309 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2409,6 +2409,8 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
@@ -2485,6 +2487,8 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x20 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 02/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8450
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
2024-12-13 9:52 ` [PATCH v2 01/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8350 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 03/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8150 Prashanth K
` (16 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 53147aa6f7e4..331f223f47c3 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4672,6 +4672,8 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 03/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8150
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
2024-12-13 9:52 ` [PATCH v2 01/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8350 Prashanth K
2024-12-13 9:52 ` [PATCH v2 02/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8450 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 04/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6125 Prashanth K
` (15 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8150.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi
index cedae8d03a51..4dbda54b47a5 100644
--- a/arch/arm64/boot/dts/qcom/sm8150.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi
@@ -3658,6 +3658,8 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x140 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
@@ -3735,6 +3737,8 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x160 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 04/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6125
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (2 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 03/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8150 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 05/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8250 Prashanth K
` (14 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index 17d528d63934..2da6466b2029 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -1209,6 +1209,8 @@ usb3_dwc3: usb@4e00000 {
phy-names = "usb2-phy";
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
maximum-speed = "high-speed";
dr_mode = "peripheral";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 05/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8250
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (3 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 04/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6125 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 06/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6350 Prashanth K
` (13 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm8250.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi
index 48318ed1ce98..e40f3b21e37a 100644
--- a/arch/arm64/boot/dts/qcom/sm8250.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi
@@ -4207,6 +4207,8 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
@@ -4294,6 +4296,8 @@ usb_2_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x20 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 06/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6350
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (4 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 05/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM8250 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 07/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7280 Prashanth K
` (12 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8d697280249f..e64447b765a2 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1924,6 +1924,8 @@ usb_1_dwc3: usb@a600000 {
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
usb-role-switch;
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 07/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7280
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (5 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 06/19] arm64: dts: qcom: Disable USB U1/U2 entry for SM6350 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P Prashanth K
` (11 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 55db1c83ef55..e0fda894724b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -3715,6 +3715,8 @@ usb_2_dwc3: usb@8c00000 {
iommus = <&apps_smmu 0xa0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
@@ -4244,6 +4246,8 @@ usb_1_dwc3: usb@a600000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (6 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 07/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7280 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-14 0:06 ` Konrad Dybcio
2024-12-13 9:52 ` [PATCH v2 09/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM630 Prashanth K
` (10 subsequent siblings)
18 siblings, 1 reply; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 9f315a51a7c1..7a50991daaa6 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -3411,6 +3411,8 @@ usb_0_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x080 0x0>;
phys = <&usb_0_hsphy>, <&usb_0_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
};
};
@@ -3500,6 +3502,8 @@ usb_1_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x0a0 0x0>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
};
};
@@ -3563,6 +3567,8 @@ usb_2_dwc3: usb@a400000 {
iommus = <&apps_smmu 0x020 0x0>;
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
};
};
@@ -3570,6 +3576,8 @@ tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
#hwlock-cells = <1>;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
};
tcsr: syscon@1fc0000 {
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P
2024-12-13 9:52 ` [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P Prashanth K
@ 2024-12-14 0:06 ` Konrad Dybcio
2024-12-14 5:31 ` Prashanth K
0 siblings, 1 reply; 22+ messages in thread
From: Konrad Dybcio @ 2024-12-14 0:06 UTC (permalink / raw)
To: Prashanth K, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers
On 13.12.2024 10:52 AM, Prashanth K wrote:
> From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>
> Disable U1 and U2 power-saving states to improve stability of USB.
> These low-power link states, designed to reduce power consumption
> during idle periods, can cause issues in latency-sensitive or high
> throughput use cases. Over the years, some of the issues seen are
> as follows:
>
> 1. In device mode of operation, when UVC is active, enabling U1/U2
> is sometimes causing packets drops due to delay in entry/exit of
> intermittent these low power states. These packet drops are often
> reflected as missed isochronous transfers, as the controller wasn't
> able to send packet in that microframe interval and hence glitches
> are seen on the final transmitted video output.
>
> 2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
> when U1/U2 is enabled. Often when link enters U2, there is a re-
> enumeration seen and device is unusable for many use cases.
>
> 3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
> the cable is disconnected and reconnected to host PC in HS, there
> is no link status change interrupt seen and the plug-in in HS doesn't
> show up a bus reset and enumeration failure happens.
>
> Disabling these intermittent power states enhances device stability
> without affecting power usage.
>
> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
> Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
> ---
[...]
>
> @@ -3570,6 +3576,8 @@ tcsr_mutex: hwlock@1f40000 {
> compatible = "qcom,tcsr-mutex";
> reg = <0x0 0x01f40000 0x0 0x20000>;
> #hwlock-cells = <1>;
> + snps,dis-u1-entry-quirk;
> + snps,dis-u2-entry-quirk;
Oh?
Konrad
^ permalink raw reply [flat|nested] 22+ messages in thread* Re: [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P
2024-12-14 0:06 ` Konrad Dybcio
@ 2024-12-14 5:31 ` Prashanth K
0 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-14 5:31 UTC (permalink / raw)
To: Konrad Dybcio, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers
On 14-12-24 05:36 am, Konrad Dybcio wrote:
> On 13.12.2024 10:52 AM, Prashanth K wrote:
>> From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>>
>> Disable U1 and U2 power-saving states to improve stability of USB.
>> These low-power link states, designed to reduce power consumption
>> during idle periods, can cause issues in latency-sensitive or high
>> throughput use cases. Over the years, some of the issues seen are
>> as follows:
>>
>> 1. In device mode of operation, when UVC is active, enabling U1/U2
>> is sometimes causing packets drops due to delay in entry/exit of
>> intermittent these low power states. These packet drops are often
>> reflected as missed isochronous transfers, as the controller wasn't
>> able to send packet in that microframe interval and hence glitches
>> are seen on the final transmitted video output.
>>
>> 2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
>> when U1/U2 is enabled. Often when link enters U2, there is a re-
>> enumeration seen and device is unusable for many use cases.
>>
>> 3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
>> the cable is disconnected and reconnected to host PC in HS, there
>> is no link status change interrupt seen and the plug-in in HS doesn't
>> show up a bus reset and enumeration failure happens.
>>
>> Disabling these intermittent power states enhances device stability
>> without affecting power usage.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
>> ---
>
> [...]
>
>>
>> @@ -3570,6 +3576,8 @@ tcsr_mutex: hwlock@1f40000 {
>> compatible = "qcom,tcsr-mutex";
>> reg = <0x0 0x01f40000 0x0 0x20000>;
>> #hwlock-cells = <1>;
>> + snps,dis-u1-entry-quirk;
>> + snps,dis-u2-entry-quirk;
>
> Oh?
>
Thanks for pointing. I messed up, will update and send next version.
Regards,
Prashanth K
^ permalink raw reply [flat|nested] 22+ messages in thread
* [PATCH v2 09/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM630
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (7 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 08/19] arm64: dts: qcom: Disable USB U1/U2 entry for SA8775P Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 10/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM845 Prashanth K
` (9 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sdm630.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index 19420cfdadf1..a2c079bac1a7 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1300,6 +1300,8 @@ usb3_dwc3: usb@a800000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&qusb2phy0>, <&usb3_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
@@ -1505,6 +1507,8 @@ usb2_dwc3: usb@c200000 {
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
/* This is the HS-only host */
maximum-speed = "high-speed";
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 10/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM845
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (8 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 09/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM630 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 11/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDX75 Prashanth K
` (8 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 1ed794638a7c..373a591bfb4d 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -4139,6 +4139,8 @@ usb_1_dwc3: usb@a600000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
@@ -4215,6 +4217,8 @@ usb_2_dwc3: usb@a800000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_2_hsphy>, <&usb_2_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 11/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDX75
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (9 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 10/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDM845 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 12/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX65 Prashanth K
` (7 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sdx75.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdx75.dtsi b/arch/arm64/boot/dts/qcom/sdx75.dtsi
index 5f7e59ecf1ca..8e444a9d00ed 100644
--- a/arch/arm64/boot/dts/qcom/sdx75.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdx75.dtsi
@@ -1037,6 +1037,8 @@ usb_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x80 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_hsphy>,
<&usb_qmpphy>;
phy-names = "usb2-phy",
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 12/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX65
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (10 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 11/19] arm64: dts: qcom: Disable USB U1/U2 entry for SDX75 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 13/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX55 Prashanth K
` (6 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index 3bc67bb8c1eb..3941d1f1af72 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -526,6 +526,8 @@ usb_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x1a0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_hsphy>, <&usb_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 13/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX55
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (11 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 12/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX65 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 14/19] arm64: dts: qcom: Disable USB U1/U2 entry for QCS404 Prashanth K
` (5 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.
3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm/boot/dts/qcom/qcom-sdx55.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
index d0f6120b665d..f431cdfbbc3d 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx55.dtsi
@@ -613,6 +613,8 @@ usb_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x1a0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_hsphy>, <&usb_qmpphy>;
phy-names = "usb2-phy", "usb3-phy";
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 14/19] arm64: dts: qcom: Disable USB U1/U2 entry for QCS404
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (12 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 13/19] ARM: dts: qcom: Disable USB U1/U2 entry for SDX55 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 15/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7180 Prashanth K
` (4 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 215ba146207a..a77a22e3f234 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -694,6 +694,8 @@ usb3_dwc3: usb@7580000 {
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dr_mode = "otg";
};
};
@@ -731,6 +733,8 @@ usb@78c0000 {
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dr_mode = "peripheral";
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 15/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7180
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (13 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 14/19] arm64: dts: qcom: Disable USB U1/U2 entry for QCS404 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 16/19] arm64: dts: qcom: Disable USB U1/U2 entry for X1E80100 Prashanth K
` (3 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
index 76fe314d2ad5..3daff0ca152f 100644
--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
@@ -3064,6 +3064,8 @@ usb_1_dwc3: usb@a600000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,parkmode-disable-ss-quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
maximum-speed = "super-speed";
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 16/19] arm64: dts: qcom: Disable USB U1/U2 entry for X1E80100
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (14 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 15/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC7180 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 17/19] arm64: dts: qcom: Disable USB U1/U2 entry for QDU1000 Prashanth K
` (2 subsequent siblings)
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 88805629ed2b..d522255bb249 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -4063,6 +4063,8 @@ usb_1_ss2_dwc3: usb@a000000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dma-coherent;
@@ -4151,6 +4153,8 @@ usb_2_dwc3: usb@a200000 {
phys = <&usb_2_hsphy>;
phy-names = "usb2-phy";
maximum-speed = "high-speed";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
ports {
#address-cells = <1>;
@@ -4247,6 +4251,8 @@ usb_mp_dwc3: usb@a400000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dma-coherent;
};
@@ -4318,6 +4324,8 @@ usb_1_ss0_dwc3: usb@a600000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dma-coherent;
@@ -4418,6 +4426,8 @@ usb_1_ss1_dwc3: usb@a800000 {
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
snps,usb3_lpm_capable;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
dma-coherent;
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 17/19] arm64: dts: qcom: Disable USB U1/U2 entry for QDU1000
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (15 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 16/19] arm64: dts: qcom: Disable USB U1/U2 entry for X1E80100 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 18/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8280XP Prashanth K
2024-12-13 9:52 ` [PATCH v2 19/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8180X Prashanth K
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 47c0dd31aaf2..85e9ccfc9655 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1009,6 +1009,8 @@ usb_1_dwc3: usb@a600000 {
iommus = <&apps_smmu 0xc0 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_1_hsphy>,
<&usb_1_qmpphy>;
phy-names = "usb2-phy",
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 18/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8280XP
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (16 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 17/19] arm64: dts: qcom: Disable USB U1/U2 entry for QDU1000 Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
2024-12-13 9:52 ` [PATCH v2 19/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8180X Prashanth K
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index ef06d1ac084d..db1d7f158866 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3536,6 +3536,8 @@ usb_2_dwc3: usb@a400000 {
"usb2-2",
"usb2-3";
dr_mode = "host";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
};
};
@@ -3593,6 +3595,8 @@ usb_0_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x820 0x0>;
phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
ports {
#address-cells = <1>;
@@ -3670,6 +3674,8 @@ usb_1_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x860 0x0>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
ports {
#address-cells = <1>;
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread* [PATCH v2 19/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8180X
2024-12-13 9:52 [PATCH v2 00/19] Disable USB U1/U2 entry for QC targets Prashanth K
` (17 preceding siblings ...)
2024-12-13 9:52 ` [PATCH v2 18/19] arm64: dts: qcom: Disable USB U1/U2 entry for SC8280XP Prashanth K
@ 2024-12-13 9:52 ` Prashanth K
18 siblings, 0 replies; 22+ messages in thread
From: Prashanth K @ 2024-12-13 9:52 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, Krishna Kurapati
Cc: linux-kernel, linux-arm-msm, devicetree, cros-qcom-dts-watchers,
Prashanth K
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:
1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.
2. On QCS6490-Rb3Gen2 Vision kit, ADB connection is heavily unstable
when U1/U2 is enabled. Often when link enters U2, there is a re-
enumeration seen and device is unusable for many use cases.
3. On QCS8300/QCS9100, it is observed that when Link enters U2, when
the cable is disconnected and reconnected to host PC in HS, there
is no link status change interrupt seen and the plug-in in HS doesn't
show up a bus reset and enumeration failure happens.
Disabling these intermittent power states enhances device stability
without affecting power usage.
Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
---
arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
index 745a7d0b8381..28693a3bfc7f 100644
--- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi
@@ -2762,6 +2762,8 @@ usb_mp_dwc3: usb@a400000 {
iommus = <&apps_smmu 0x60 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_mp_hsphy0>,
<&usb_mp_qmpphy0>,
<&usb_mp_hsphy1>,
@@ -2825,6 +2827,8 @@ usb_prim_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x140 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_prim_hsphy>, <&usb_prim_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
@@ -2902,6 +2906,8 @@ usb_sec_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x160 0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
phys = <&usb_sec_hsphy>, <&usb_sec_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
--
2.25.1
^ permalink raw reply [flat|nested] 22+ messages in thread