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From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
	"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
	"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
	"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"fshao@chromium.org" <fshao@chromium.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"treapking@chromium.org" <treapking@chromium.org>
Subject: Re: [PATCH v4 16/19] drm/mediatek: add OUTPROC support for MT8196
Date: Mon, 15 Sep 2025 01:33:25 +0000	[thread overview]
Message-ID: <6fb51817ba0e0772bc6921d24d2cece75df94fe8.camel@mediatek.com> (raw)
In-Reply-To: <20250828080855.3502514-17-paul-pl.chen@mediatek.com>

On Thu, 2025-08-28 at 16:07 +0800, Paul Chen wrote:
> From: Nancy Lin <nancy.lin@mediatek.com>
> 
> OUTPROC handles the post-stage of pixel processing in
> the overlapping procedure.OUTPROC manages pixels for
> gamma correction and ensures that pixel values are
> within the correct range.
> 
> Signed-off-by: Nancy Lin <nancy.lin@mediatek.com>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> ---
>  drivers/gpu/drm/mediatek/Makefile           |   1 +
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.c     |   1 +
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.h     |   1 +
>  drivers/gpu/drm/mediatek/mtk_disp_drv.h     |  14 ++
>  drivers/gpu/drm/mediatek/mtk_disp_outproc.c | 235 ++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_disp_outproc.h |  22 ++
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.h      |   1 +
>  8 files changed, 276 insertions(+)
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.c
>  create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_outproc.h
> 
> diff --git a/drivers/gpu/drm/mediatek/Makefile b/drivers/gpu/drm/mediatek/Makefile
> index 8d18d5583903..7bc02a7f178c 100644
> --- a/drivers/gpu/drm/mediatek/Makefile
> +++ b/drivers/gpu/drm/mediatek/Makefile
> @@ -10,6 +10,7 @@ mediatek-drm-y := mtk_crtc.o \
>  		  mtk_disp_gamma.o \
>  		  mtk_disp_merge.o \
>  		  mtk_disp_ovl.o \
> +		  mtk_disp_outproc.o \

Alphabetic order.

>  		  mtk_disp_ovl_adaptor.o \
>  		  mtk_disp_rdma.o \
>  		  mtk_drm_drv.o \
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index 2e45580f25ea..f3e8645c35b6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -448,6 +448,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
>  	[MTK_DSI] = "dsi",
>  	[MTK_OVL_BLENDER] = "blender",
>  	[MTK_OVL_EXDMA] = "exdma",
> +	[MTK_OVL_OUTPROC] = "outproc",
>  };
>  

[snip]

> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_outproc.c b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c
> new file mode 100644
> index 000000000000..99f0d60c3574
> --- /dev/null
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_outproc.c
> @@ -0,0 +1,235 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2025 MediaTek Inc.
> + */
> +
> +#include <drm/drm_fourcc.h>
> +#include <drm/drm_framebuffer.h>
> +#include <linux/clk.h>
> +#include <linux/component.h>
> +#include <linux/of.h>
> +#include <linux/of_device.h>
> +#include <linux/of_address.h>

Alphabetic order.

> +#include <linux/platform_device.h>
> +#include <linux/reset.h>
> +#include <linux/soc/mediatek/mtk-cmdq.h>
> +#include <linux/soc/mediatek/mtk-mmsys.h>
> +

[snip]

> +void mtk_disp_outproc_config(struct device *dev, unsigned int w,
> +			     unsigned int h, unsigned int vrefresh,
> +			     unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +	struct mtk_disp_outproc *priv = dev_get_drvdata(dev);
> +	u32 tmp = 0;
> +
> +	dev_dbg(dev, "%s-w:%d, h:%d\n", __func__, w, h);
> +
> +	writel((h << 16) | w, priv->regs + DISP_REG_OVL_OUTPROC_ROI_SIZE);
> +
> +	tmp |= OVL_OUTPROC_DATAPATH_CON_OUTPUT_CLAMP;
> +	writel(tmp, priv->regs + DISP_REG_OVL_OUTPROC_DATAPATH_CON);

mtk_ovl_config() would use cmdq to set register, so do this function.

Regards,
CK

> +}
> +



  reply	other threads:[~2025-09-15  1:33 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-28  8:06 [PATCH v4 00/19] Add MediaTek SoC DRM " Paul Chen
2025-08-28  8:06 ` [PATCH v4 01/19] dt-bindings: arm: mediatek: mmsys: add compatible " Paul Chen
2025-08-28  8:06 ` [PATCH v4 02/19] dt-bindings: soc: mediatek: add mutex yaml " Paul Chen
2025-08-28  8:06 ` [PATCH v4 03/19] dt-bindings: display: mediatek: add EXDMA " Paul Chen
2025-08-28 13:30   ` Rob Herring (Arm)
2025-08-29  6:35   ` Krzysztof Kozlowski
2025-08-29  6:48     ` Krzysztof Kozlowski
2025-08-29 11:10       ` Paul-pl Chen (陳柏霖)
2025-09-18  7:01   ` CK Hu (胡俊光)
2025-09-18 11:25     ` AngeloGioacchino Del Regno
2025-08-28  8:06 ` [PATCH v4 04/19] dt-bindings: display: mediatek: add BLENDER " Paul Chen
2025-08-28  8:07 ` [PATCH v4 05/19] dt-bindings: display: mediatek: add OUTPROC " Paul Chen
2025-08-29  6:49   ` Krzysztof Kozlowski
2025-08-28  8:07 ` [PATCH v4 06/19] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS Paul Chen
2025-09-16  2:01   ` CK Hu (胡俊光)
2025-09-16  3:03   ` CK Hu (胡俊光)
2025-12-17  7:57     ` Paul-pl Chen (陳柏霖)
2025-08-28  8:07 ` [PATCH v4 07/19] soc: mediatek: add mmsys support for MT8196 Paul Chen
2025-08-28  8:07 ` [PATCH v4 08/19] soc: mediatek: mutex: Reused the switch case for SOF ID Paul Chen
2025-09-16  6:00   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 09/19] soc: mediatek: mutex: refactor SOF settings for output components Paul Chen
2025-09-17  1:16   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 10/19] soc: mediatek: mutex: add mutex support for MT8196 Paul Chen
2025-08-28  8:07 ` [PATCH v4 11/19] drm/mediatek: Rename OVL format naming Paul Chen
2025-09-01  2:45   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 12/19] drm/mediatek: Export OVL formats definitions and format conversion API Paul Chen
2025-09-10  7:19   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 13/19] drm/mediatek: Export OVL Blend function Paul Chen
2025-09-10  9:18   ` CK Hu (胡俊光)
2025-12-19 17:00     ` Paul-pl Chen (陳柏霖)
2025-08-28  8:07 ` [PATCH v4 14/19] drm/mediatek: add EXDMA support for MT8196 Paul Chen
2025-09-11 11:24   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 15/19] drm/mediatek: add BLENDER " Paul Chen
2025-09-12  2:27   ` CK Hu (胡俊光)
2025-12-19 17:03     ` Paul-pl Chen (陳柏霖)
2025-08-28  8:07 ` [PATCH v4 16/19] drm/mediatek: add OUTPROC " Paul Chen
2025-09-15  1:33   ` CK Hu (胡俊光) [this message]
2025-08-28  8:07 ` [PATCH v4 17/19] drm/mediatek: add ovlsys_adaptor " Paul Chen
2025-09-10 12:25   ` AngeloGioacchino Del Regno
2025-09-15  9:28   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 18/19] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver Paul Chen
2025-09-10 12:24   ` AngeloGioacchino Del Regno
2025-09-16  6:12     ` Paul-pl Chen (陳柏霖)
2025-09-16  3:11   ` CK Hu (胡俊光)
2025-08-28  8:07 ` [PATCH v4 19/19] drm/mediatek: Add support for MT8196 multiple mmsys Paul Chen
2025-09-16  1:47   ` CK Hu (胡俊光)
2025-08-29  6:32 ` [PATCH v4 00/19] Add MediaTek SoC DRM support for MT8196 Krzysztof Kozlowski

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