From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"Paul-pl Chen (陳柏霖)" <Paul-pl.Chen@mediatek.com>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"AngeloGioacchino Del Regno"
<angelogioacchino.delregno@collabora.com>,
"chunkuang.hu@kernel.org" <chunkuang.hu@kernel.org>
Cc: "Sunny Shen (沈姍姍)" <Sunny.Shen@mediatek.com>,
"Sirius Wang (王皓昱)" <Sirius.Wang@mediatek.com>,
"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
"Xiandong Wang (王先冬)" <Xiandong.Wang@mediatek.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
Project_Global_Chrome_Upstream_Group
<Project_Global_Chrome_Upstream_Group@mediatek.com>,
"linux-mediatek@lists.infradead.org"
<linux-mediatek@lists.infradead.org>,
"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"fshao@chromium.org" <fshao@chromium.org>,
"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
"treapking@chromium.org" <treapking@chromium.org>
Subject: Re: [PATCH v4 13/19] drm/mediatek: Export OVL Blend function
Date: Wed, 10 Sep 2025 09:18:08 +0000 [thread overview]
Message-ID: <a13a968227214194b7033795a07ad554bfacfc8a.camel@mediatek.com> (raw)
In-Reply-To: <20250828080855.3502514-14-paul-pl.chen@mediatek.com>
On Thu, 2025-08-28 at 16:07 +0800, Paul Chen wrote:
> From: Paul-pl Chen <paul-pl.chen@mediatek.com>
>
> For the new BLENDER component, the OVL ignore pixel alpha logic
> should be exported as a function and reused it.
>
> Signed-off-by: Nancy Lin <nancy.lin@mediatek.com>
> Signed-off-by: Paul-pl Chen <paul-pl.chen@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 68 +++++++++++++++++--------
> drivers/gpu/drm/mediatek/mtk_disp_ovl.h | 8 +++
> 2 files changed, 56 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> index e3ee3f60f4ba..7cd3978beb98 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c
> @@ -228,6 +228,23 @@ void mtk_ovl_disable_vblank(struct device *dev)
> writel_relaxed(0x0, ovl->regs + DISP_REG_OVL_INTEN);
> }
>
> +bool mtk_ovl_is_ignore_pixel_alpha(struct mtk_plane_state *state, unsigned int blend_mode)
> +{
> + if (!state->base.fb)
> + return false;
> +
> + /*
> + * Although the alpha channel can be ignored, CONST_BLD must be enabled
> + * for XRGB format, otherwise OVL will still read the value from memory.
> + * For RGB888 related formats, whether CONST_BLD is enabled or not won't
> + * affect the result. Therefore we use !has_alpha as the condition.
> + */
> + if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || !state->base.fb->format->has_alpha)
> + return true;
> +
> + return false;
> +}
> +
> u32 mtk_ovl_get_blend_modes(struct device *dev)
> {
> struct mtk_disp_ovl *ovl = dev_get_drvdata(dev);
> @@ -414,6 +431,29 @@ void mtk_ovl_layer_off(struct device *dev, unsigned int idx,
> DISP_REG_OVL_RDMA_CTRL(idx));
> }
>
> +unsigned int mtk_ovl_get_blend_mode(struct mtk_plane_state *state, unsigned int blend_modes)
> +{
> + unsigned int blend_mode = DRM_MODE_BLEND_COVERAGE;
> +
> + /*
> + * For the platforms where OVL_CON_CLRFMT_MAN is defined in the hardware data sheet
> + * and supports premultiplied color formats, such as OVL_CON_CLRFMT_PARGB888
> + * and supports premultiplied color formats, such as OVL_CON_CLRFMT_PARGB8888.
> + *
> + * Check blend_modes in the driver data to see if premultiplied mode is supported.
> + * If not, use coverage mode instead to set it to the supported color formats.
> + *
> + * Current DRM assumption is that alpha is default premultiplied, so the bitmask of
> + * blend_modes must include BIT(DRM_MODE_BLEND_PREMULTI). Otherwise, mtk_plane_init()
> + * will get an error return from drm_plane_create_blend_mode_property() and
> + * state->base.pixel_blend_mode should not be used.
> + */
> + if (blend_modes & BIT(DRM_MODE_BLEND_PREMULTI))
> + blend_mode = state->base.pixel_blend_mode;
> +
> + return blend_mode;
> +}
> +
> unsigned int mtk_ovl_fmt_convert(unsigned int fmt, unsigned int blend_mode,
> bool fmt_rgb565_is_0, bool color_convert,
> u8 clrfmt_shift, u32 clrfmt_man, u32 byte_swap, u32 rgb_swap)
> @@ -541,7 +581,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> unsigned int rotation = pending->rotation;
> unsigned int offset = (pending->y << 16) | pending->x;
> unsigned int src_size = (pending->height << 16) | pending->width;
> - unsigned int blend_mode = state->base.pixel_blend_mode;
> + unsigned int blend_mode = mtk_ovl_get_blend_mode(state, ovl->data->blend_modes);
Why you change behavior here?
Originally, 'blend_mode = state->base.pixel_blend_mode' directly.
But this patch add a check and blend_mode may be DRM_MODE_BLEND_COVERAGE.
The behavior changes. Why change this behavior?
> unsigned int ignore_pixel_alpha = 0;
> unsigned int con;
>
> @@ -566,17 +606,8 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
> * For blend_modes supported SoCs, always enable alpha blending.
> * For blend_modes unsupported SoCs, enable alpha blending when has_alpha is set.
> */
> - if (blend_mode || state->base.fb->format->has_alpha)
> + if (state->base.pixel_blend_mode || state->base.fb->format->has_alpha)
> con |= OVL_CON_AEN;
> -
> - /*
> - * Although the alpha channel can be ignored, CONST_BLD must be enabled
> - * for XRGB format, otherwise OVL will still read the value from memory.
> - * For RGB888 related formats, whether CONST_BLD is enabled or not won't
> - * affect the result. Therefore we use !has_alpha as the condition.
> - */
> - if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || !state->base.fb->format->has_alpha)
> - ignore_pixel_alpha = OVL_CONST_BLEND;
> }
>
> /*
> @@ -602,6 +633,9 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx,
>
> mtk_ddp_write_relaxed(cmdq_pkt, con, &ovl->cmdq_reg, ovl->regs,
> DISP_REG_OVL_CON(idx));
> +
> + if (mtk_ovl_is_ignore_pixel_alpha(state, blend_mode))
> + ignore_pixel_alpha = OVL_CONST_BLEND;
> mtk_ddp_write_relaxed(cmdq_pkt, pitch_lsb | ignore_pixel_alpha,
> &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH(idx));
> mtk_ddp_write_relaxed(cmdq_pkt, src_size, &ovl->cmdq_reg, ovl->regs,
next prev parent reply other threads:[~2025-09-10 9:33 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-28 8:06 [PATCH v4 00/19] Add MediaTek SoC DRM support for MT8196 Paul Chen
2025-08-28 8:06 ` [PATCH v4 01/19] dt-bindings: arm: mediatek: mmsys: add compatible " Paul Chen
2025-08-28 8:06 ` [PATCH v4 02/19] dt-bindings: soc: mediatek: add mutex yaml " Paul Chen
2025-08-28 8:06 ` [PATCH v4 03/19] dt-bindings: display: mediatek: add EXDMA " Paul Chen
2025-08-28 13:30 ` Rob Herring (Arm)
2025-08-29 6:35 ` Krzysztof Kozlowski
2025-08-29 6:48 ` Krzysztof Kozlowski
2025-08-29 11:10 ` Paul-pl Chen (陳柏霖)
2025-09-18 7:01 ` CK Hu (胡俊光)
2025-09-18 11:25 ` AngeloGioacchino Del Regno
2025-08-28 8:06 ` [PATCH v4 04/19] dt-bindings: display: mediatek: add BLENDER " Paul Chen
2025-08-28 8:07 ` [PATCH v4 05/19] dt-bindings: display: mediatek: add OUTPROC " Paul Chen
2025-08-29 6:49 ` Krzysztof Kozlowski
2025-08-28 8:07 ` [PATCH v4 06/19] soc: mediatek: Add runtime PM and top clocks and async controls for MMSYS Paul Chen
2025-09-16 2:01 ` CK Hu (胡俊光)
2025-09-16 3:03 ` CK Hu (胡俊光)
2025-12-17 7:57 ` Paul-pl Chen (陳柏霖)
2025-08-28 8:07 ` [PATCH v4 07/19] soc: mediatek: add mmsys support for MT8196 Paul Chen
2025-08-28 8:07 ` [PATCH v4 08/19] soc: mediatek: mutex: Reused the switch case for SOF ID Paul Chen
2025-09-16 6:00 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 09/19] soc: mediatek: mutex: refactor SOF settings for output components Paul Chen
2025-09-17 1:16 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 10/19] soc: mediatek: mutex: add mutex support for MT8196 Paul Chen
2025-08-28 8:07 ` [PATCH v4 11/19] drm/mediatek: Rename OVL format naming Paul Chen
2025-09-01 2:45 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 12/19] drm/mediatek: Export OVL formats definitions and format conversion API Paul Chen
2025-09-10 7:19 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 13/19] drm/mediatek: Export OVL Blend function Paul Chen
2025-09-10 9:18 ` CK Hu (胡俊光) [this message]
2025-12-19 17:00 ` Paul-pl Chen (陳柏霖)
2025-08-28 8:07 ` [PATCH v4 14/19] drm/mediatek: add EXDMA support for MT8196 Paul Chen
2025-09-11 11:24 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 15/19] drm/mediatek: add BLENDER " Paul Chen
2025-09-12 2:27 ` CK Hu (胡俊光)
2025-12-19 17:03 ` Paul-pl Chen (陳柏霖)
2025-08-28 8:07 ` [PATCH v4 16/19] drm/mediatek: add OUTPROC " Paul Chen
2025-09-15 1:33 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 17/19] drm/mediatek: add ovlsys_adaptor " Paul Chen
2025-09-10 12:25 ` AngeloGioacchino Del Regno
2025-09-15 9:28 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 18/19] drm/mediatek: Add support for multiple mmsys in the one mediatek-drm driver Paul Chen
2025-09-10 12:24 ` AngeloGioacchino Del Regno
2025-09-16 6:12 ` Paul-pl Chen (陳柏霖)
2025-09-16 3:11 ` CK Hu (胡俊光)
2025-08-28 8:07 ` [PATCH v4 19/19] drm/mediatek: Add support for MT8196 multiple mmsys Paul Chen
2025-09-16 1:47 ` CK Hu (胡俊光)
2025-08-29 6:32 ` [PATCH v4 00/19] Add MediaTek SoC DRM support for MT8196 Krzysztof Kozlowski
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