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From: "Li, Aubrey" <aubrey.li@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>,
	Paul Mackerras <paulus@samba.org>,
	Michael Ellerman <mpe@ellerman.id.au>,
	Martin Schwidefsky <schwidefsky@de.ibm.com>,
	Heiko Carstens <heiko.carstens@de.ibm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>
Cc: Aubrey Li <aubrey.li@intel.com>,
	tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com,
	ak@linux.intel.com, tim.c.chen@linux.intel.com,
	dave.hansen@intel.com, arjan@linux.intel.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 2/2] proc: add /proc/<pid>/arch_state
Date: Thu, 22 Nov 2018 09:40:24 +0800	[thread overview]
Message-ID: <7098dd35-3d7b-57c9-c450-10eee577c199@linux.intel.com> (raw)
In-Reply-To: <20181121095350.GC2149@hirez.programming.kicks-ass.net>

On 2018/11/21 17:53, Peter Zijlstra wrote:
> On Wed, Nov 21, 2018 at 09:19:36AM +0100, Peter Zijlstra wrote:
>> On Wed, Nov 21, 2018 at 09:39:00AM +0800, Li, Aubrey wrote:
>>>> Also; you were going to shop around with the other architectures to see
>>>> what they want/need for this interface. I see nothing on that.
>>>>
>>> I'm open for your suggestion, :)
>>
>> Well, we have linux-arch and the various maintainers are also listed in
>> MAINTAINERS. Go forth and ask..
> 
> Ok, so I googled a wee bit (you could have too).
> 
> There's not that many architectures that build big hot chips
> (powerpc,x86,arm64,s390) (mips, sparc64 and ia64 are pretty dead I
> think, although the Fujitsu Sparc M10 X+/X SIMD looked like it could be
> 'fun').
> 
> Of those, powerpc altivec doesn't seem to be very wide, but you'd have
> to ask the power folks. Same for s390 z13.
> 
> The Fujitsu/ARM64-SVE stuff looks like it can be big and hot.
> 
> And RISC-V has was vector extention, but I don't think anybody is
> actually building big hot versions of that just yet.
> 
Thanks Peter. Add more maintainers here.

On some x86 architectures, the tasks using simd instruction(AVX512 particularly)
need to be dealt with specially against the tasks not using simd instruction.
I proposed an interface to expose such CPU specific information for the user
space tools to apply different scheduling policies.

The interface can be refined to be the format as /proc/<pid>/status. Not sure
if it's useful to any other architectures.

Welcome any comments.

Thanks,
-Aubrey



  parent reply	other threads:[~2018-11-22  1:40 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-14 23:00 [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks Aubrey Li
2018-11-14 23:00 ` [PATCH v3 2/2] proc: add /proc/<pid>/arch_state Aubrey Li
2018-11-15 15:18   ` Dave Hansen
2018-11-16  0:32     ` Li, Aubrey
2018-11-19 17:39   ` Peter Zijlstra
2018-11-21  1:39     ` Li, Aubrey
2018-11-21  8:19       ` Peter Zijlstra
2018-11-21  9:53         ` Peter Zijlstra
2018-11-21 17:12           ` Palmer Dabbelt
2018-11-22  1:40           ` Li, Aubrey [this message]
2018-11-23 17:11             ` Dave Martin
2018-11-15 15:40 ` [PATCH v3 1/2] x86/fpu: track AVX-512 usage of tasks Dave Hansen
2018-11-16  0:21   ` Li, Aubrey
2018-11-16  1:04     ` Dave Hansen
2018-11-16 23:10     ` Dave Hansen
2018-11-17  0:36       ` Li, Aubrey

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