From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Loic Poulain <loic.poulain@oss.qualcomm.com>,
Robert Foss <rfoss@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>
Cc: linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/5] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime
Date: Mon, 12 Oct 2026 15:58:08 +0200 [thread overview]
Message-ID: <717d9cb2-d7e5-423b-9d0e-fad307385474@oss.qualcomm.com> (raw)
In-Reply-To: <20261004-cci-imp-v1-3-227d12cb4829@oss.qualcomm.com>
On 10/4/26 9:09 PM, Loic Poulain wrote:
> In theory, every SoC integrating a CCI revision that differs from
> an existing one should introduce a dedicated compatible string.
[...]
> diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qcom-cci.c
> index 099da0069251681cc52e351fb656bd73e78a96c9..c0b39d419e296454a083d38ce302940875b8ad2b 100644
> --- a/drivers/i2c/busses/i2c-qcom-cci.c
> +++ b/drivers/i2c/busses/i2c-qcom-cci.c
> @@ -14,6 +14,10 @@
> #include <linux/pm_opp.h>
>
> #define CCI_HW_VERSION 0x0
> +#define CCI_HW_VERSION_MAJOR(val) (((val) >> 28) & 0xf)
> +#define CCI_HW_VERSION_MINOR(val) (((val) >> 16) & 0xfff)
> +#define CCI_HW_VERSION_STEP(val) ((val) & 0xffff)
GENMASK/FIELD_GET(), please
[...]
> static const struct of_device_id cci_dt_match[] = {
> - { .compatible = "qcom,msm8226-cci", .data = &cci_v1_data},
> - { .compatible = "qcom,msm8953-cci", .data = &cci_v2_data},
> - { .compatible = "qcom,msm8974-cci", .data = &cci_v1_5_data},
> - { .compatible = "qcom,msm8996-cci", .data = &cci_v2_data},
> + { .compatible = "qcom,msm8226-cci", .data = (void *)1 },
> + { .compatible = "qcom,msm8953-cci", .data = (void *)NUM_MASTERS },
> + { .compatible = "qcom,msm8974-cci", .data = (void *)NUM_MASTERS },
> + { .compatible = "qcom,msm8996-cci", .data = (void *)NUM_MASTERS },
>
>
> /*
> * Legacy compatibles kept for backwards compatibility.
> * Do not add any new ones unless they introduce a new config
> */
> - { .compatible = "qcom,msm8916-cci", .data = &cci_v1_data},
> - { .compatible = "qcom,sdm845-cci", .data = &cci_v2_data},
> - { .compatible = "qcom,sm8250-cci", .data = &cci_v2_data},
> - { .compatible = "qcom,sm8450-cci", .data = &cci_v2_data},
> + { .compatible = "qcom,msm8916-cci", .data = (void *)1 },
> + { .compatible = "qcom,sdm845-cci", .data = (void *)NUM_MASTERS },
> + { .compatible = "qcom,sm8250-cci", .data = (void *)NUM_MASTERS },
> + { .compatible = "qcom,sm8450-cci", .data = (void *)NUM_MASTERS },
This looks a little sloppy - can we infer the number of masters at
runtime somehow?
Konrad
next prev parent reply other threads:[~2026-10-12 13:58 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-04 19:09 [PATCH 0/5] i2c: qcom-cci: Runtime capability detection and improved read/write Loic Poulain
2026-10-04 19:09 ` [PATCH 1/5] i2c: qcom-cci: Factor out write command queue programming Loic Poulain
2026-10-06 9:24 ` Andi Shyti
2026-10-04 19:09 ` [PATCH 2/5] i2c: qcom-cci: Handle and report queue overflow/underflow interrupts Loic Poulain
2026-10-06 9:28 ` Andi Shyti
2026-10-08 15:41 ` Loic Poulain
2026-10-04 19:09 ` [PATCH 3/5] i2c: qcom-cci: Detect capabilities from CCI_HW_VERSION at runtime Loic Poulain
2026-10-06 9:34 ` Andi Shyti
2026-10-12 13:58 ` Konrad Dybcio [this message]
2026-10-04 19:09 ` [PATCH 4/5] i2c: qcom-cci: Add burst write support Loic Poulain
2026-10-04 19:09 ` [PATCH 5/5] i2c: qcom-cci: Extend i2c read limits based on CCI revision Loic Poulain
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