Re: [PATCH 0/8] Add GCE support for MT8196

[AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>]

Il 21/11/24 05:25, Jason-JH.Lin ha scritto:
> This patch series adds support for the MediaTek MT8196 SoC in the CMDQ
> driver and related subsystems. The changes include adding compatible
> names and properties, updating driver data to accommodate hardware
> changes, and modifying the CMDQ API to support non-subsys ID hardware.
> 
> Jason-JH.Lin (8):
>    dt-bindings: mailbox: mediatek: Add GCE header file for MT8196
>    dt-bindings: mailbox: mediatek: Add MT8196 support for gce-mailbox
>    mailbox: mtk-cmdq: Add driver data to support for MT8196
>    soc: mediatek: mtk-cmdq: Add unsupported subsys ID programing flow
>    soc: mediatek: mtk-cmdq: Add mminfra_offset compatibility for DRAM
>      address
>    soc: mediatek: Add pa_base due to CMDQ API change
>    drm/mediatek: Add pa_base due to CMDQ API change
>    media: mediatek: mdp3: Add pa_base due to CMDQ API change
> 
>   .../mailbox/mediatek,gce-mailbox.yaml         |    4 +
>   drivers/gpu/drm/mediatek/mtk_ddp_comp.c       |    6 +-
>   drivers/mailbox/mtk-cmdq-mailbox.c            |  107 +-
>   .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c    |    4 +-
>   .../platform/mediatek/mdp3/mtk-mdp3-comp.h    |    4 +-
>   drivers/soc/mediatek/mtk-cmdq-helper.c        |  133 +-
>   drivers/soc/mediatek/mtk-mmsys.c              |    1 +
>   drivers/soc/mediatek/mtk-mutex.c              |    2 +-
>   .../dt-bindings/mailbox/mediatek,mt8196-gce.h | 1449 +++++++++++++++++
>   include/linux/mailbox/mtk-cmdq-mailbox.h      |    3 +
>   include/linux/soc/mediatek/mtk-cmdq.h         |   22 +-
>   11 files changed, 1698 insertions(+), 37 deletions(-)
>   create mode 100755 include/dt-bindings/mailbox/mediatek,mt8196-gce.h
> 


Hello Jason,
I had a fast look at the changes that you're proposing with this series.

The reasons behind this are more or less understood on my side, but the
actual changes look a bit odd in the sense that passing a physical address
like this, on a first glance, not only looks like it may be dangerous, but
also looks like there's a lot of room for improvement.

Can you please point me at some driver/code (or a reference downsream kernel
for this SoC, which would be even better) so that I can take a look at how
is that being used?

Thanks,
Angelo