From: "Lynch, Nathan" <nathan.lynch@amd.com>
To: Frank Li <Frank.li@oss.nxp.com>
Cc: Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
David Rientjes <rientjes@google.com>,
John.Kariuki@amd.com, Jonathan Cameron <jic23@kernel.org>,
Kinsey Ho <kinseyho@google.com>,
Mario Limonciello <mario.limonciello@amd.com>,
PradeepVineshReddy.Kodamati@amd.com,
Shivank Garg <shivankg@amd.com>,
Stephen Bates <Stephen.Bates@amd.com>,
Tycho Andersen <tycho@kernel.org>, Wei Huang <wei.huang2@amd.com>,
Wei Xu <weixugc@google.com>,
dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v4 03/25] dmaengine: sdxi: Add PCI initialization
Date: Thu, 5 Nov 2026 12:07:13 -0600 [thread overview]
Message-ID: <78cfd4b1-4b0d-4472-9ab0-fd8c134577f7@amd.com> (raw)
In-Reply-To: <auzEG0jcbuzxTG_Q@SMW015318>
On 11/5/2026 11:59 AM, Frank Li wrote:
>> diff --git a/drivers/dma/sdxi/Kconfig b/drivers/dma/sdxi/Kconfig
>> new file mode 100644
>> index 000000000000..b91b44231a04
>> --- /dev/null
>> +++ b/drivers/dma/sdxi/Kconfig
>> @@ -0,0 +1,28 @@
>> +config SDXI_CORE
>> + tristate "SDXI (Smart Data Accelerator Interface) support"
>> + # Doorbell updates require naturally-aligned 64-bit writes, per
>> + # SDXI 1.0 9 MMIO Control Registers.
>
> why comments here? is it related config ?
Yes, it's intended as an explanation for the 64BIT dependency.
>
>> + depends on 64BIT
>> + select DMA_ENGINE
>> + help
>> + Enable support for Smart Data Accelerator Interface (SDXI)
>> + Platform Data Mover devices. SDXI is a vendor-neutral
>> + standard for a memory-to-memory data mover and acceleration
>> + interface.
...
>> +static int sdxi_pci_init(struct sdxi_dev *sdxi)
>> +{
>> + struct pci_dev *pdev = sdxi_to_pci_dev(sdxi);
>> + struct device *dev = &pdev->dev;
>> + u64 cap1;
>> + int ret;
>> +
>> + ret = pcim_enable_device(pdev);
>> + if (ret)
>> + return dev_err_probe(dev, ret, "failed to enable device\n");
>> +
>> + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
>> + if (ret)
>> + return dev_err_probe(dev, ret, "failed to set DMA mask\n");
>> +
>> + sdxi->ctrl_regs = pcim_iomap_region(pdev, SDXI_PCI_BAR_CTL_REGS,
>> + KBUILD_MODNAME);
>> + if (IS_ERR(sdxi->ctrl_regs))
>> + return dev_err_probe(dev, PTR_ERR(sdxi->ctrl_regs),
>> + "failed to map control registers\n");
>> +
>> + cap1 = readq(sdxi->ctrl_regs + SDXI_MMIO_CAP1);
>> + if (!FIELD_GET(SDXI_MMIO_CAP1_MMIO64, cap1))
>> + return dev_err_probe(dev, -EOPNOTSUPP,
>> + "64-bit atomic MMIO access required\n");
>> +
>> + sdxi->dbs = pcim_iomap_region(pdev, SDXI_PCI_BAR_DOORBELL,
>> + KBUILD_MODNAME);
>> + if (IS_ERR(sdxi->dbs))
>> + return dev_err_probe(dev, PTR_ERR(sdxi->dbs),
>> + "failed to map doorbell region\n");
>> +
>> + pci_set_master(pdev);
>
> Add empty line here.
OK.
next prev parent reply other threads:[~2026-11-05 18:07 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 2:49 [PATCH v4 00/25] dmaengine: Smart Data Accelerator Interface (SDXI) basic support Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 01/25] PCI: Add SNIA SDXI accelerator sub-class Nathan Lynch via B4 Relay
2026-11-05 18:10 ` Frank Li
2026-11-05 18:25 ` Lynch, Nathan
2026-11-04 2:49 ` [PATCH v4 02/25] MAINTAINERS: Add entry for SDXI driver Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 03/25] dmaengine: sdxi: Add PCI initialization Nathan Lynch via B4 Relay
2026-11-05 17:59 ` Frank Li
2026-11-05 18:07 ` Lynch, Nathan [this message]
2026-11-04 2:49 ` [PATCH v4 04/25] dmaengine: sdxi: Prepare function and sanitize MMIO state Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 05/25] dmaengine: sdxi: Feature discovery and initial configuration Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 06/25] dmaengine: sdxi: Configure context tables Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 07/25] dmaengine: sdxi: Allocate context control DMA pool Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 08/25] dmaengine: sdxi: Introduce submission queue Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 09/25] dmaengine: sdxi: Allocate administrative context Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 10/25] dmaengine: sdxi: Install " Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 11/25] dmaengine: sdxi: Start functions on probe, stop on remove Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 12/25] dmaengine: sdxi: Add client context allocation API Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 13/25] dmaengine: sdxi: Add descriptor ring management Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 14/25] dmaengine: sdxi: Add unit tests for descriptor ring reservations Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 15/25] dmaengine: sdxi: Per-context access key (AKey) table entry allocator Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 16/25] dmaengine: sdxi: Add completion status block API Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 17/25] dmaengine: sdxi: Add unit tests for completion pool ownership Nathan Lynch via B4 Relay
2026-11-04 2:49 ` [PATCH v4 18/25] dmaengine: sdxi: Add context submission helper Nathan Lynch via B4 Relay
2026-11-04 2:50 ` [PATCH v4 19/25] dmaengine: sdxi: Encode context start, stop, update, and sync descriptors Nathan Lynch via B4 Relay
2026-11-05 16:52 ` Tycho Andersen
2026-11-04 2:50 ` [PATCH v4 20/25] dmaengine: sdxi: Add client context release with update and sync Nathan Lynch via B4 Relay
2026-11-04 2:50 ` [PATCH v4 21/25] dmaengine: sdxi: Provide context start and stop APIs Nathan Lynch via B4 Relay
2026-11-04 2:50 ` [PATCH v4 22/25] dmaengine: sdxi: Encode copy and interrupt descriptors Nathan Lynch via B4 Relay
2026-11-05 17:00 ` Tycho Andersen
2026-11-04 2:50 ` [PATCH v4 23/25] dmaengine: sdxi: Add unit tests for descriptor encoding Nathan Lynch via B4 Relay
2026-11-04 2:50 ` [PATCH v4 24/25] dmaengine: sdxi: MSI/MSI-X vector allocation and mapping Nathan Lynch via B4 Relay
2026-11-04 2:50 ` [PATCH v4 25/25] dmaengine: sdxi: Add DMA engine provider Nathan Lynch via B4 Relay
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=78cfd4b1-4b0d-4472-9ab0-fd8c134577f7@amd.com \
--to=nathan.lynch@amd.com \
--cc=Frank.Li@kernel.org \
--cc=Frank.li@oss.nxp.com \
--cc=John.Kariuki@amd.com \
--cc=PradeepVineshReddy.Kodamati@amd.com \
--cc=Stephen.Bates@amd.com \
--cc=bhelgaas@google.com \
--cc=dmaengine@vger.kernel.org \
--cc=jic23@kernel.org \
--cc=kinseyho@google.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=mario.limonciello@amd.com \
--cc=rientjes@google.com \
--cc=shivankg@amd.com \
--cc=tycho@kernel.org \
--cc=vkoul@kernel.org \
--cc=wei.huang2@amd.com \
--cc=weixugc@google.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®