Re: [PATCH v4 03/25] dmaengine: sdxi: Add PCI initialization

[Frank Li <Frank.li@oss.nxp.com>]

On Tue, Nov 03, 2026 at 08:49:44PM -0600, Nathan Lynch via B4 Relay wrote:
> From: Nathan Lynch <nathan.lynch@amd.com>
>
> Add enough code to bind a SDXI device via the class code and map its
> control registers and doorbell region.
>
> Keep PCI resource setup in pci.c and register devices with the SDXI core
> through bus operations.
>
> Co-developed-by: Wei Huang <wei.huang2@amd.com>
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
> Signed-off-by: Nathan Lynch <nathan.lynch@amd.com>
> ---
>  drivers/dma/Kconfig       |   2 +
>  drivers/dma/Makefile      |   1 +
>  drivers/dma/sdxi/Kconfig  |  28 +++++++++++++
>  drivers/dma/sdxi/Makefile |   6 +++
>  drivers/dma/sdxi/device.c |  33 +++++++++++++++
>  drivers/dma/sdxi/mmio.h   |  22 ++++++++++
>  drivers/dma/sdxi/pci.c    | 100 ++++++++++++++++++++++++++++++++++++++++++++++
>  drivers/dma/sdxi/sdxi.h   |  38 ++++++++++++++++++
>  8 files changed, 230 insertions(+)
>
> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
> index 01f96a8257e5..3e3b685895fd 100644
> --- a/drivers/dma/Kconfig
> +++ b/drivers/dma/Kconfig
> @@ -772,6 +772,8 @@ source "drivers/dma/lgm/Kconfig"
>
>  source "drivers/dma/loongson/Kconfig"
>
> +source "drivers/dma/sdxi/Kconfig"
> +
>  source "drivers/dma/stm32/Kconfig"
>
>  # clients
> diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
> index f62d12b08e15..b375f9df9588 100644
> --- a/drivers/dma/Makefile
> +++ b/drivers/dma/Makefile
> @@ -85,6 +85,7 @@ obj-$(CONFIG_XGENE_DMA) += xgene-dma.o
>  obj-$(CONFIG_ST_FDMA) += st_fdma.o
>  obj-$(CONFIG_FSL_DPAA2_QDMA) += fsl-dpaa2-qdma/
>  obj-$(CONFIG_INTEL_LDMA) += lgm/
> +obj-$(CONFIG_SDXI_CORE) += sdxi/
>
>  obj-y += amd/
>  obj-y += loongson/
> diff --git a/drivers/dma/sdxi/Kconfig b/drivers/dma/sdxi/Kconfig
> new file mode 100644
> index 000000000000..b91b44231a04
> --- /dev/null
> +++ b/drivers/dma/sdxi/Kconfig
> @@ -0,0 +1,28 @@
> +config SDXI_CORE
> +	tristate "SDXI (Smart Data Accelerator Interface) support"
> +	# Doorbell updates require naturally-aligned 64-bit writes, per
> +	# SDXI 1.0 9 MMIO Control Registers.

why comments here? is it related config ?

> +	depends on 64BIT
> +	select DMA_ENGINE
> +	help
> +	  Enable support for Smart Data Accelerator Interface (SDXI)
> +	  Platform Data Mover devices. SDXI is a vendor-neutral
> +	  standard for a memory-to-memory data mover and acceleration
> +	  interface.
> +
> +	  This option is automatically selected by the SDXI PCI driver.
> +	  Enable it manually if you want to build the SDXI core for unit
> +	  testing without enabling the PCI driver.
> +
> +	  To compile this driver as a module, choose M here: the module
> +	  will be named "sdxi-core".
> +
> +config SDXI_PCI
> +	tristate "SDXI (Smart Data Accelerator Interface) PCI driver"
> +	depends on PCI_MSI && 64BIT
> +	select SDXI_CORE
> +	help
> +	  Enable support for PCI-hosted SDXI devices.
> +
> +	  To compile this driver as a module, choose M here: the module
> +	  will be named "sdxi-pci".
> diff --git a/drivers/dma/sdxi/Makefile b/drivers/dma/sdxi/Makefile
> new file mode 100644
> index 000000000000..0006edf74d86
> --- /dev/null
> +++ b/drivers/dma/sdxi/Makefile
> @@ -0,0 +1,6 @@
> +# SPDX-License-Identifier: GPL-2.0
> +obj-$(CONFIG_SDXI_CORE) += sdxi-core.o
> +sdxi-core-y := device.o
> +
> +obj-$(CONFIG_SDXI_PCI) += sdxi-pci.o
> +sdxi-pci-y := pci.o
> diff --git a/drivers/dma/sdxi/device.c b/drivers/dma/sdxi/device.c
> new file mode 100644
> index 000000000000..0974a83bb45c
> --- /dev/null
> +++ b/drivers/dma/sdxi/device.c
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * SDXI hardware device driver
> + *
> + * Copyright Advanced Micro Devices, Inc.
> + */
> +
> +#include <linux/device.h>
> +#include <linux/export.h>
> +#include <linux/slab.h>
> +
> +#include "sdxi.h"
> +
> +int sdxi_register(struct device *dev, const struct sdxi_bus_ops *ops)
> +{
> +	struct sdxi_dev *sdxi;
> +
> +	sdxi = devm_kzalloc(dev, sizeof(*sdxi), GFP_KERNEL);
> +	if (!sdxi)
> +		return -ENOMEM;
> +
> +	sdxi->dev = dev;
> +	sdxi->bus_ops = ops;
> +	dev_set_drvdata(dev, sdxi);
> +
> +	return sdxi->bus_ops->init(sdxi);
> +}
> +EXPORT_SYMBOL_NS_GPL(sdxi_register, "SDXI");
> +
> +MODULE_AUTHOR("Wei Huang");
> +MODULE_AUTHOR("Nathan Lynch");
> +MODULE_DESCRIPTION("SDXI core");
> +MODULE_LICENSE("GPL");
> diff --git a/drivers/dma/sdxi/mmio.h b/drivers/dma/sdxi/mmio.h
> new file mode 100644
> index 000000000000..2676736f3998
> --- /dev/null
> +++ b/drivers/dma/sdxi/mmio.h
> @@ -0,0 +1,22 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +
> +/*
> + * SDXI MMIO register offsets and layouts.
> + *
> + * Copyright Advanced Micro Devices, Inc.
> + */
> +
> +#ifndef DMA_SDXI_MMIO_H
> +#define DMA_SDXI_MMIO_H
> +
> +#include <linux/bits.h>
> +
> +enum sdxi_reg {
> +	/* SDXI 1.0 9.1 General Control and Status Registers */
> +	SDXI_MMIO_CAP1       = 0x00208,
> +};
> +
> +/* SDXI 1.0 Table 9-7: MMIO_CAP1 */
> +#define SDXI_MMIO_CAP1_MMIO64 BIT_ULL(6)
> +
> +#endif  /* DMA_SDXI_MMIO_H */
> diff --git a/drivers/dma/sdxi/pci.c b/drivers/dma/sdxi/pci.c
> new file mode 100644
> index 000000000000..0778cde31f14
> --- /dev/null
> +++ b/drivers/dma/sdxi/pci.c
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * SDXI PCI device code
> + *
> + * Copyright Advanced Micro Devices, Inc.
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/dev_printk.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/err.h>
> +#include <linux/io.h>
> +#include <linux/iomap.h>
> +#include <linux/module.h>
> +#include <linux/pci.h>
> +
> +#include "mmio.h"
> +#include "sdxi.h"
> +
> +enum sdxi_mmio_bars {
> +	SDXI_PCI_BAR_CTL_REGS = 0,
> +	SDXI_PCI_BAR_DOORBELL = 2,
> +};
> +
> +static struct pci_dev *sdxi_to_pci_dev(const struct sdxi_dev *sdxi)
> +{
> +	return to_pci_dev(sdxi->dev);
> +}
> +
> +static int sdxi_pci_init(struct sdxi_dev *sdxi)
> +{
> +	struct pci_dev *pdev = sdxi_to_pci_dev(sdxi);
> +	struct device *dev = &pdev->dev;
> +	u64 cap1;
> +	int ret;
> +
> +	ret = pcim_enable_device(pdev);
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to enable device\n");
> +
> +	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
> +	if (ret)
> +		return dev_err_probe(dev, ret, "failed to set DMA mask\n");
> +
> +	sdxi->ctrl_regs = pcim_iomap_region(pdev, SDXI_PCI_BAR_CTL_REGS,
> +					    KBUILD_MODNAME);
> +	if (IS_ERR(sdxi->ctrl_regs))
> +		return dev_err_probe(dev, PTR_ERR(sdxi->ctrl_regs),
> +				     "failed to map control registers\n");
> +
> +	cap1 = readq(sdxi->ctrl_regs + SDXI_MMIO_CAP1);
> +	if (!FIELD_GET(SDXI_MMIO_CAP1_MMIO64, cap1))
> +		return dev_err_probe(dev, -EOPNOTSUPP,
> +				     "64-bit atomic MMIO access required\n");
> +
> +	sdxi->dbs = pcim_iomap_region(pdev, SDXI_PCI_BAR_DOORBELL,
> +				      KBUILD_MODNAME);
> +	if (IS_ERR(sdxi->dbs))
> +		return dev_err_probe(dev, PTR_ERR(sdxi->dbs),
> +				     "failed to map doorbell region\n");
> +
> +	pci_set_master(pdev);

Add empty line here.


Frank