* [PATCH] soc: mediatek: mmsys: Add sw0_rst_offset for MT8192
@ 2022-03-22 9:20 AngeloGioacchino Del Regno
2022-03-23 8:53 ` Rex-BC Chen
0 siblings, 1 reply; 2+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-03-22 9:20 UTC (permalink / raw)
To: matthias.bgg
Cc: linux-arm-kernel, linux-mediatek, linux-kernel, kernel,
rex-bc.chen, AngeloGioacchino Del Regno
MT8192 has the same sw0 reset offset as MT8183: add the parameter
to be able to use mmsys as a reset controller for managing at
least the DSI reset line.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
drivers/soc/mediatek/mtk-mmsys.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
index 4fc4c2c9ea20..f69521fabcce 100644
--- a/drivers/soc/mediatek/mtk-mmsys.c
+++ b/drivers/soc/mediatek/mtk-mmsys.c
@@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
.clk_driver = "clk-mt8192-mm",
.routes = mmsys_mt8192_routing_table,
.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
+ .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
};
static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
--
2.35.1
^ permalink raw reply [flat|nested] 2+ messages in thread* Re: [PATCH] soc: mediatek: mmsys: Add sw0_rst_offset for MT8192
2022-03-22 9:20 [PATCH] soc: mediatek: mmsys: Add sw0_rst_offset for MT8192 AngeloGioacchino Del Regno
@ 2022-03-23 8:53 ` Rex-BC Chen
0 siblings, 0 replies; 2+ messages in thread
From: Rex-BC Chen @ 2022-03-23 8:53 UTC (permalink / raw)
To: AngeloGioacchino Del Regno, matthias.bgg
Cc: linux-arm-kernel, linux-mediatek, linux-kernel, kernel
On Tue, 2022-03-22 at 10:20 +0100, AngeloGioacchino Del Regno wrote:
> MT8192 has the same sw0 reset offset as MT8183: add the parameter
> to be able to use mmsys as a reset controller for managing at
> least the DSI reset line.
>
> Signed-off-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@collabora.com>
> ---
> drivers/soc/mediatek/mtk-mmsys.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c
> b/drivers/soc/mediatek/mtk-mmsys.c
> index 4fc4c2c9ea20..f69521fabcce 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data
> mt8192_mmsys_driver_data = {
> .clk_driver = "clk-mt8192-mm",
> .routes = mmsys_mt8192_routing_table,
> .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
> + .sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
> };
>
> static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data =
> {
Hello Angelo,
Thanks for your patch.
But from register map for mmsys, the offset is 0x160 and DSI reset bit
is 15.
datasheet: MT8192 Tablet Application Processor Software Register
Table/4.1 Display Controller.pdf
BRs,
Rex
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-03-22 9:20 [PATCH] soc: mediatek: mmsys: Add sw0_rst_offset for MT8192 AngeloGioacchino Del Regno
2022-03-23 8:53 ` Rex-BC Chen
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