From: Sohil Mehta <sohil.mehta@intel.com>
To: Yi Sun <yi.sun@intel.com>
Cc: <tony.luck@intel.com>, <heng.su@intel.com>,
Dave Hansen <dave.hansen@intel.com>,
<linux-kernel@vger.kernel.org>, <x86@kernel.org>
Subject: Re: [PATCH 1/2] x86/fpu: Measure the Latency of XSAVE and XRSTOR
Date: Thu, 28 Jul 2022 11:46:17 -0700 [thread overview]
Message-ID: <799d314f-17c6-4898-1363-4360996d89be@intel.com> (raw)
In-Reply-To: <20220723083800.824442-2-yi.sun@intel.com>
Some nits below:
On 7/23/2022 1:37 AM, Yi Sun wrote:
> Calculate the latency of instructions xsave and xrstor with new trace
> points x86_fpu_latency_xsave and x86_fpu_latency_xrstor.
>
> The delta TSC can be calculated within a single trace event.
s/can be/is
Another
> option considered was to have 2 separated trace events marking the
> start and finish of the xsave/xrstor instructions. The delta TSC was
> calculated from the 2 trace points in user space, but there was
> significant overhead added by the trace function itself.
>
...
>
> To enable it, CONFIG_X86_DEBUG_FPU and CONFIG_TRACEPOINTS are required.
> The compiler can get rid of all the extra crust when either of the two
s/can/will
> configs is disabled.
>
> If both of the two configs are enabled, xsave/xrstor_tracing_enabled
s/two/
> would be reduced to a static check for tracing enabled. Thus, in the
> fast path there would be only 2 additional static checks.
...
> Leave the noise here instead of additional
> conditions before calling the x86_fpu_latency_* because that makes the
> latency more accurate and it's easy to filer the noise out by the
s/filer/filter
> following consuming script.
...
>
> +DECLARE_EVENT_CLASS(x86_fpu_latency,
> + TP_PROTO(struct fpstate *fpstate, u64 dtsc),
On x86, though TSC is the underlying counter for trace_clock(), it might
be useful to keep this generic.
s/dtsc/latency
"latency" would match the printk below as well.
> + TP_ARGS(fpstate, dtsc),
> +
> + TP_STRUCT__entry(
> + __field(struct fpstate *, fpstate)
> + __field(u64, dtsc)
> + __field(u64, rfbm)
> + __field(u64, xinuse)
> + ),
> +
> + TP_fast_assign(
> + __entry->fpstate = fpstate;
> + __entry->dtsc = dtsc;
> + __entry->rfbm = fpstate->xfeatures;
> + __entry->xinuse = fpstate->regs.xsave.header.xfeatures;
> + ),
> +
> + TP_printk("x86/fpu: latency:%lld RFBM:0x%llx XINUSE:0x%llx",
> + __entry->dtsc,
> + __entry->rfbm,
> + __entry->xinuse
> + )
> +);
> +
-Sohil
next prev parent reply other threads:[~2022-07-28 18:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-23 8:37 [PATCH 0/2] x86: Add xsave/xrstor Latency Trace Events and Consuming Script Yi Sun
2022-07-23 8:37 ` [PATCH 1/2] x86/fpu: Measure the Latency of XSAVE and XRSTOR Yi Sun
2022-07-24 20:54 ` David Laight
2022-07-24 23:00 ` Luck, Tony
2022-07-25 7:35 ` David Laight
2022-07-25 17:44 ` Dave Hansen
2022-07-26 7:41 ` David Laight
2022-07-26 9:03 ` 'Yi Sun'
2022-07-28 18:46 ` Sohil Mehta [this message]
2022-07-23 8:38 ` [PATCH 2/2] scripts/x86: Add script to consume trace log of xsave latency Yi Sun
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