Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits

[Christophe Leroy <christophe.leroy@csgroup.eu>]

Le 28/02/2022 à 16:29, Mark Brown a écrit :
> On Mon, Feb 28, 2022 at 04:15:46PM +0100, Christophe Leroy wrote:
> 
>> +	if (!status && spi->trailing_bits) {
>> +		struct spi_transfer t = {
>> +			.len = 1,
>> +			.tx_buf = empty_zero_page,
>> +		};
>> +
>> +		if (spi->trailing_bits < 4)
>> +			t.bits_per_word = 4;
>> +		else if (spi->trailing_bits > 8)
>> +			t.bits_per_word = 16;
>> +		else
>> +			t.bits_per_word = spi->trailing_bits;
>> +
>> +		status = fsl_spi_setup_transfer(spi, &t);
>> +		if (!status)
>> +			status = fsl_spi_bufs(spi, &t, 0);
>> +	}
>> +	m->status = status;
> 
> The binding looks good now but this is still driver specific code when
> it looks like it could easily be implemented in the core - like I said
> on the previous version you'd need to update drivers to advertise less
> than 8 bits but there's basically nothing driver specific I can see here
> so any driver using transfer_one() would get support that way.

Argh ! Sorry your comment to the previous version ended up in Junk 
mails. I see it now.

We discussed that back in 2016 in 
https://lore.kernel.org/linux-spi/20160824112701.GE22076@sirena.org.uk/ 
and my understanding at that time was that it was not something that 
could be done at core level.

But maybe things have changed since then ?

By the way, fsl-spi driver doesn't implement transfer_one() but 
transfer_one_message() so it takes care of the chipselect changes and 
therefore the final dummy transfer with CS off is to be done there as 
far as I understand.

Would it mean changing fsl-spi driver to implement transfer_one() first ?

Thanks
Christophe