From: Mark Brown <broonie@kernel.org>
To: Christophe Leroy <christophe.leroy@csgroup.eu>
Cc: Rob Herring <robh+dt@kernel.org>, Pratyush Yadav <p.yadav@ti.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Herve Codina <herve.codina@bootlin.com>
Subject: Re: [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits
Date: Mon, 22 Aug 2022 20:29:27 +0100 [thread overview]
Message-ID: <YwPZF6fjZkn2tozH@sirena.org.uk> (raw)
In-Reply-To: <c4950a61-ba9a-5897-1f04-bb2c56979d7d@csgroup.eu>
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On Mon, Aug 22, 2022 at 06:38:22PM +0000, Christophe Leroy wrote:
> Le 22/08/2022 à 19:15, Mark Brown a écrit :
> I think we already addressed this possibility back in 2016, see
> https://lore.kernel.org/linux-spi/20160824111206.GD22076@sirena.org.uk/
> The conclusion was that it was not possible to accomplish it with cs_change.
> Or did we miss something at that time ?
No, I think that's fine - your proposal has some overlap but is fine.
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next prev parent reply other threads:[~2022-08-22 19:33 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-28 15:15 [PATCH v2 0/2] Add support for components requiring trailing clock after transfer Christophe Leroy
2022-02-28 15:15 ` [PATCH v2 1/2] spi: Add optional number of additional clock cycles to be generated Christophe Leroy
2022-03-08 0:52 ` Rob Herring
2022-02-28 15:15 ` [PATCH v2 2/2] spi: fsl-spi: Implement trailing bits Christophe Leroy
2022-02-28 15:29 ` Mark Brown
2022-02-28 16:02 ` Christophe Leroy
2022-02-28 16:14 ` Mark Brown
2022-03-01 12:53 ` Christophe Leroy
2022-03-01 13:25 ` Mark Brown
2022-08-18 18:35 ` Christophe Leroy
2022-08-22 17:15 ` Mark Brown
2022-08-22 18:38 ` Christophe Leroy
2022-08-22 19:29 ` Mark Brown [this message]
2022-02-28 18:28 ` kernel test robot
2022-02-28 18:38 ` kernel test robot
2022-02-28 18:48 ` kernel test robot
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