* [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node
2024-08-20 10:40 [PATCH v4 0/4] Add R5F and C7x DSP nodes for AM62a SoC Hari Nagalla
@ 2024-08-20 10:40 ` Hari Nagalla
2024-08-20 15:02 ` Andrew Davis
2024-08-20 10:40 ` [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node Hari Nagalla
` (2 subsequent siblings)
3 siblings, 1 reply; 10+ messages in thread
From: Hari Nagalla @ 2024-08-20 10:40 UTC (permalink / raw)
To: vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt, conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
From: Jai Luthra <j-luthra@ti.com>
AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability.
This subsystem is intended for deep learning purposes. Define the
device node for C7xv DSP.
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 916fcf3cc57d..818005b8954d 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -1088,4 +1088,15 @@ vpu: video-codec@30210000 {
clocks = <&k3_clks 204 2>;
power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
};
+
+ c7x_0: dsp@7e000000 {
+ compatible = "ti,am62a-c7xv-dsp";
+ reg = <0x00 0x7e000000 0x00 0x00100000>;
+ reg-names = "l2sram";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <208>;
+ ti,sci-proc-ids = <0x04 0xff>;
+ resets = <&k3_reset 208 1>;
+ firmware-name = "am62a-c71_0-fw";
+ };
};
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node
2024-08-20 10:40 ` [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node Hari Nagalla
@ 2024-08-20 15:02 ` Andrew Davis
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Davis @ 2024-08-20 15:02 UTC (permalink / raw)
To: Hari Nagalla, vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
On 8/20/24 5:40 AM, Hari Nagalla wrote:
> From: Jai Luthra <j-luthra@ti.com>
>
> AM62A SoCs have a C7xv DSP subsystem with Analytics engine capability.
> This subsystem is intended for deep learning purposes. Define the
> device node for C7xv DSP.
>
> Signed-off-by: Jai Luthra <j-luthra@ti.com>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> ---
Reviewed-by: Andrew Davis <afd@ti.com>
> arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> index 916fcf3cc57d..818005b8954d 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
> @@ -1088,4 +1088,15 @@ vpu: video-codec@30210000 {
> clocks = <&k3_clks 204 2>;
> power-domains = <&k3_pds 204 TI_SCI_PD_EXCLUSIVE>;
> };
> +
> + c7x_0: dsp@7e000000 {
> + compatible = "ti,am62a-c7xv-dsp";
> + reg = <0x00 0x7e000000 0x00 0x00100000>;
> + reg-names = "l2sram";
> + ti,sci = <&dmsc>;
> + ti,sci-dev-id = <208>;
> + ti,sci-proc-ids = <0x04 0xff>;
> + resets = <&k3_reset 208 1>;
> + firmware-name = "am62a-c71_0-fw";
> + };
> };
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node
2024-08-20 10:40 [PATCH v4 0/4] Add R5F and C7x DSP nodes for AM62a SoC Hari Nagalla
2024-08-20 10:40 ` [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node Hari Nagalla
@ 2024-08-20 10:40 ` Hari Nagalla
2024-08-20 15:09 ` Andrew Davis
2024-08-20 10:40 ` [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node Hari Nagalla
2024-08-20 10:40 ` [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes Hari Nagalla
3 siblings, 1 reply; 10+ messages in thread
From: Hari Nagalla @ 2024-08-20 10:40 UTC (permalink / raw)
To: vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt, conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU
domain also has a 512KB sram memory, the R5F core can use for
applications needing fast memory access.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++++++++++++++++
1 file changed, 35 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
index 8c36e56f4138..803da3cce336 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
@@ -6,6 +6,17 @@
*/
&cbass_mcu {
+ mcu_ram: sram@79100000 {
+ compatible = "mmio-sram";
+ reg = <0x00 0x79100000 0x00 0x80000>;
+ ranges = <0x00 0x00 0x79100000 0x80000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ mcu1-sram@0 {
+ reg = <0x0 0x80000>;
+ };
+ };
mcu_pmx0: pinctrl@4084000 {
compatible = "pinctrl-single";
reg = <0x00 0x04084000 0x00 0x88>;
@@ -167,4 +178,28 @@ mcu_mcan1: can@4e18000 {
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
status = "disabled";
};
+
+ mcu_r5fss0: r5fss@79000000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x79000000 0x00 0x79000000 0x8000>,
+ <0x79020000 0x00 0x79020000 0x8000>;
+ power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;
+ mcu_r5fss0_core0: r5f@79000000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x79000000 0x00008000>,
+ <0x79020000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <9>;
+ ti,sci-proc-ids = <0x03 0xff>;
+ resets = <&k3_reset 9 1>;
+ firmware-name = "am62a-mcu-r5f0_0-fw";
+ ti,atcm-enable = <0>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <0>;
+ sram = <&mcu_ram>;
+ };
+ };
};
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node
2024-08-20 10:40 ` [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node Hari Nagalla
@ 2024-08-20 15:09 ` Andrew Davis
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Davis @ 2024-08-20 15:09 UTC (permalink / raw)
To: Hari Nagalla, vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
On 8/20/24 5:40 AM, Hari Nagalla wrote:
> AM62A SoCs have a single R5F core in the MCU voltage domain. The MCU
> domain also has a 512KB sram memory, the R5F core can use for
> applications needing fast memory access.
>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi | 35 ++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> index 8c36e56f4138..803da3cce336 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-mcu.dtsi
> @@ -6,6 +6,17 @@
> */
>
> &cbass_mcu {
> + mcu_ram: sram@79100000 {
This change doesn't belong to this patch, this memory can be
used by other components in the system and is not exclusive
to the R5F firmware.
Let's add this node later so it can be discussed on its own
and not block this otherwise correct series.
> + compatible = "mmio-sram";
> + reg = <0x00 0x79100000 0x00 0x80000>;
> + ranges = <0x00 0x00 0x79100000 0x80000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + mcu1-sram@0 {
> + reg = <0x0 0x80000>;
> + };
> + };
Need newline here if you were going to keep this node..
> mcu_pmx0: pinctrl@4084000 {
> compatible = "pinctrl-single";
> reg = <0x00 0x04084000 0x00 0x88>;
> @@ -167,4 +178,28 @@ mcu_mcan1: can@4e18000 {
> bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> status = "disabled";
> };
> +
> + mcu_r5fss0: r5fss@79000000 {
> + compatible = "ti,am62-r5fss";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x79000000 0x00 0x79000000 0x8000>,
> + <0x79020000 0x00 0x79020000 0x8000>;
> + power-domains = <&k3_pds 7 TI_SCI_PD_EXCLUSIVE>;
Newline here.
Andrew
> + mcu_r5fss0_core0: r5f@79000000 {
> + compatible = "ti,am62-r5f";
> + reg = <0x79000000 0x00008000>,
> + <0x79020000 0x00008000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&dmsc>;
> + ti,sci-dev-id = <9>;
> + ti,sci-proc-ids = <0x03 0xff>;
> + resets = <&k3_reset 9 1>;
> + firmware-name = "am62a-mcu-r5f0_0-fw";
> + ti,atcm-enable = <0>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <0>;
> + sram = <&mcu_ram>;
> + };
> + };
> };
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node
2024-08-20 10:40 [PATCH v4 0/4] Add R5F and C7x DSP nodes for AM62a SoC Hari Nagalla
2024-08-20 10:40 ` [PATCH v4 1/4] arm64: dts: k3-am62a-main: Add C7xv device node Hari Nagalla
2024-08-20 10:40 ` [PATCH v4 2/4] arm64: dts: k3-am62a-mcu: Add R5F remote proc node Hari Nagalla
@ 2024-08-20 10:40 ` Hari Nagalla
2024-08-20 15:13 ` Andrew Davis
2024-08-20 10:40 ` [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes Hari Nagalla
3 siblings, 1 reply; 10+ messages in thread
From: Hari Nagalla @ 2024-08-20 10:40 UTC (permalink / raw)
To: vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt, conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
From: Devarsh Thakkar <devarsht@ti.com>
AM62A SoCs have a single R5F core in waekup domain. This core is also
used as a device manager for the SoC.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index f5ac101a04df..c4319986e660 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -76,6 +76,29 @@ wkup_rti0: watchdog@2b000000 {
status = "reserved";
};
+ wkup_r5fss0: r5fss@78000000 {
+ compatible = "ti,am62-r5fss";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x78000000 0x00 0x78000000 0x8000>,
+ <0x78100000 0x00 0x78100000 0x8000>;
+ power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
+ wkup_r5fss0_core0: r5f@78000000 {
+ compatible = "ti,am62-r5f";
+ reg = <0x78000000 0x00008000>,
+ <0x78100000 0x00008000>;
+ reg-names = "atcm", "btcm";
+ ti,sci = <&dmsc>;
+ ti,sci-dev-id = <121>;
+ ti,sci-proc-ids = <0x01 0xff>;
+ resets = <&k3_reset 121 1>;
+ firmware-name = "am62-wkup-r5f0_0-fw";
+ ti,atcm-enable = <1>;
+ ti,btcm-enable = <1>;
+ ti,loczrama = <1>;
+ };
+ };
+
wkup_vtm0: temperature-sensor@b00000 {
compatible = "ti,j7200-vtm";
reg = <0x00 0xb00000 0x00 0x400>,
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node
2024-08-20 10:40 ` [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node Hari Nagalla
@ 2024-08-20 15:13 ` Andrew Davis
2024-08-21 11:10 ` Nishanth Menon
0 siblings, 1 reply; 10+ messages in thread
From: Andrew Davis @ 2024-08-20 15:13 UTC (permalink / raw)
To: Hari Nagalla, vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
On 8/20/24 5:40 AM, Hari Nagalla wrote:
> From: Devarsh Thakkar <devarsht@ti.com>
>
> AM62A SoCs have a single R5F core in waekup domain. This core is also
> used as a device manager for the SoC.
>
> Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> index f5ac101a04df..c4319986e660 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> @@ -76,6 +76,29 @@ wkup_rti0: watchdog@2b000000 {
> status = "reserved";
> };
>
> + wkup_r5fss0: r5fss@78000000 {
> + compatible = "ti,am62-r5fss";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x78000000 0x00 0x78000000 0x8000>,
> + <0x78100000 0x00 0x78100000 0x8000>;
> + power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
Need newline here.
> + wkup_r5fss0_core0: r5f@78000000 {
> + compatible = "ti,am62-r5f";
> + reg = <0x78000000 0x00008000>,
> + <0x78100000 0x00008000>;
> + reg-names = "atcm", "btcm";
> + ti,sci = <&dmsc>;
> + ti,sci-dev-id = <121>;
> + ti,sci-proc-ids = <0x01 0xff>;
> + resets = <&k3_reset 121 1>;
> + firmware-name = "am62-wkup-r5f0_0-fw";
resets and firmware-name should go before vendor specific properties.
Andrew
> + ti,atcm-enable = <1>;
> + ti,btcm-enable = <1>;
> + ti,loczrama = <1>;
> + };
> + };
> +
> wkup_vtm0: temperature-sensor@b00000 {
> compatible = "ti,j7200-vtm";
> reg = <0x00 0xb00000 0x00 0x400>,
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node
2024-08-20 15:13 ` Andrew Davis
@ 2024-08-21 11:10 ` Nishanth Menon
0 siblings, 0 replies; 10+ messages in thread
From: Nishanth Menon @ 2024-08-21 11:10 UTC (permalink / raw)
To: Andrew Davis
Cc: Hari Nagalla, vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
conor+dt, bb, linux-kernel, linux-arm-kernel, devicetree
On 10:13-20240820, Andrew Davis wrote:
> On 8/20/24 5:40 AM, Hari Nagalla wrote:
> > From: Devarsh Thakkar <devarsht@ti.com>
> >
> > AM62A SoCs have a single R5F core in waekup domain. This core is also
> > used as a device manager for the SoC.
> >
> > Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> > Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> > ---
> > arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 23 +++++++++++++++++++++
> > 1 file changed, 23 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> > index f5ac101a04df..c4319986e660 100644
> > --- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
> > @@ -76,6 +76,29 @@ wkup_rti0: watchdog@2b000000 {
> > status = "reserved";
> > };
> > + wkup_r5fss0: r5fss@78000000 {
> > + compatible = "ti,am62-r5fss";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0x78000000 0x00 0x78000000 0x8000>,
> > + <0x78100000 0x00 0x78100000 0x8000>;
> > + power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
>
> Need newline here.
>
> > + wkup_r5fss0_core0: r5f@78000000 {
> > + compatible = "ti,am62-r5f";
> > + reg = <0x78000000 0x00008000>,
> > + <0x78100000 0x00008000>;
> > + reg-names = "atcm", "btcm";
> > + ti,sci = <&dmsc>;
> > + ti,sci-dev-id = <121>;
> > + ti,sci-proc-ids = <0x01 0xff>;
> > + resets = <&k3_reset 121 1>;
> > + firmware-name = "am62-wkup-r5f0_0-fw";
>
> resets and firmware-name should go before vendor specific properties.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/dts-coding-style.rst#n117
>
> > + ti,atcm-enable = <1>;
> > + ti,btcm-enable = <1>;
> > + ti,loczrama = <1>;
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes
2024-08-20 10:40 [PATCH v4 0/4] Add R5F and C7x DSP nodes for AM62a SoC Hari Nagalla
` (2 preceding siblings ...)
2024-08-20 10:40 ` [PATCH v4 3/4] arm64: dts: k3-am62a-wakeup: Add R5F device node Hari Nagalla
@ 2024-08-20 10:40 ` Hari Nagalla
2024-08-20 15:15 ` Andrew Davis
3 siblings, 1 reply; 10+ messages in thread
From: Hari Nagalla @ 2024-08-20 10:40 UTC (permalink / raw)
To: vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt, conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
From: Devarsh Thakkar <devarsht@ti.com>
Reserve memory for remote rpoc IPC and bind the mailbox assignments
for each remote proc. Two memory regions are reserved for each
remote processor. The first region of 1MB of memory is used for Vring
shared buffers and the second region is used as external memory to the
remote processor, resource table and as tracebuffer.
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index 67faf46d7a35..fb350b578899 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -61,11 +61,40 @@ secure_ddr: optee@9e800000 {
no-map;
};
+ wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9c800000 0x00 0x100000>;
+ no-map;
+ };
+
wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
compatible = "shared-dma-pool";
reg = <0x00 0x9c900000 0x00 0x01e00000>;
no-map;
};
+ mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b800000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x9b900000 0x00 0x0f00000>;
+ no-map;
+ };
+
+ c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x99800000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_0_memory_region: c7x-memory@99900000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0x99900000 0x00 0x01f00000>;
+ no-map;
+ };
};
vmain_pd: regulator-0 {
@@ -728,3 +757,42 @@ dpi1_out: endpoint {
};
};
};
+
+&mailbox0_cluster0 {
+ mbox_r5_0: mbox-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ mbox_c7x_0: mbox-c7x-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ mbox_mcu_r5_0: mbox-mcu-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&c7x_0 {
+ mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
+ memory-region = <&c7x_0_dma_memory_region>,
+ <&c7x_0_memory_region>;
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+};
--
2.34.1
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes
2024-08-20 10:40 ` [PATCH v4 4/4] arm64: dts: ti: k3-am62a7-sk: Enable ipc with remote proc nodes Hari Nagalla
@ 2024-08-20 15:15 ` Andrew Davis
0 siblings, 0 replies; 10+ messages in thread
From: Andrew Davis @ 2024-08-20 15:15 UTC (permalink / raw)
To: Hari Nagalla, vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
conor+dt, nm, bb
Cc: linux-kernel, linux-arm-kernel, devicetree
On 8/20/24 5:40 AM, Hari Nagalla wrote:
> From: Devarsh Thakkar <devarsht@ti.com>
>
> Reserve memory for remote rpoc IPC and bind the mailbox assignments
s/remote rpoc/Remoteproc
> for each remote proc. Two memory regions are reserved for each
> remote processor. The first region of 1MB of memory is used for Vring
> shared buffers and the second region is used as external memory to the
> remote processor, resource table and as tracebuffer.
>
> Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> ---
> arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 68 +++++++++++++++++++++++++
> 1 file changed, 68 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> index 67faf46d7a35..fb350b578899 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
> @@ -61,11 +61,40 @@ secure_ddr: optee@9e800000 {
> no-map;
> };
>
> + wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9c800000 0x00 0x100000>;
> + no-map;
> + };
> +
> wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
> compatible = "shared-dma-pool";
> reg = <0x00 0x9c900000 0x00 0x01e00000>;
> no-map;
> };
newline
> + mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x9b900000 0x00 0x0f00000>;
> + no-map;
> + };
> +
> + c7x_0_dma_memory_region: c7x-dma-memory@99800000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x99800000 0x00 0x100000>;
> + no-map;
> + };
> +
> + c7x_0_memory_region: c7x-memory@99900000 {
> + compatible = "shared-dma-pool";
> + reg = <0x00 0x99900000 0x00 0x01f00000>;
> + no-map;
> + };
> };
>
> vmain_pd: regulator-0 {
> @@ -728,3 +757,42 @@ dpi1_out: endpoint {
> };
> };
> };
> +
> +&mailbox0_cluster0 {
> + mbox_r5_0: mbox-r5-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&mailbox0_cluster1 {
> + mbox_c7x_0: mbox-c7x-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&mailbox0_cluster2 {
> + mbox_mcu_r5_0: mbox-mcu-r5-0 {
> + ti,mbox-rx = <0 0 0>;
> + ti,mbox-tx = <1 0 0>;
> + };
> +};
> +
> +&c7x_0 {
These nodes are incomplete before this point and should have
been disabled when you added them in the dtsi, set their status
to "okay" here.
> + mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>;
Should be one item:
mboxes = <&mailbox0_cluster1 &mbox_c7x_0>;
Andrew
> + memory-region = <&c7x_0_dma_memory_region>,
> + <&c7x_0_memory_region>;
> +};
> +
> +&wkup_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>;
> + memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
> + <&wkup_r5fss0_core0_memory_region>;
> +};
> +
> +&mcu_r5fss0_core0 {
> + mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>;
> + memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
> + <&mcu_r5fss0_core0_memory_region>;
> +};
^ permalink raw reply [flat|nested] 10+ messages in thread