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From: Jie Luo <quic_luoj@quicinc.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<andersson@kernel.org>, <agross@kernel.org>,
	<konrad.dybcio@linaro.org>, <mturquette@baylibre.com>,
	<sboyd@kernel.org>, <robh+dt@kernel.org>,
	<krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>,
	<catalin.marinas@arm.com>, <will@kernel.org>,
	<p.zabel@pengutronix.de>
Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<quic_srichara@quicinc.com>
Subject: Re: [PATCH v1 2/4] dt-bindings: clock: add qca8386/qca8084 clock and reset definitions
Date: Thu, 10 Aug 2023 11:51:58 +0800	[thread overview]
Message-ID: <7d52cff6-a175-5925-a4c6-087f5de153b2@quicinc.com> (raw)
In-Reply-To: <19d885aa-3740-1287-715c-5ecb913c8a72@linaro.org>



On 8/9/2023 11:34 PM, Krzysztof Kozlowski wrote:
> On 09/08/2023 10:00, Luo Jie wrote:
>> QCA8386/QCA8084 includes the clock & reset controller that is
>> accessed by MDIO bus. Two work modes are supported, qca8386 works
>> as switch mode, qca8084 works as PHY mode.
>>
>> Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
>> ---
> 
> Thank you for your patch. There is something to discuss/improve.
> 
>> +
>> +properties:
>> +  compatible:
>> +    oneOf:
>> +      - const: qcom,qca8084-nsscc
>> +      - items:
>> +          - enum:
>> +              - qcom,qca8085-nsscc
>> +              - qcom,qca8082-nsscc
>> +              - qcom,qca8386-nsscc
>> +              - qcom,qca8385-nsscc
>> +              - qcom,qca8384-nsscc
> 
> Please keep this enum sorder alphanumerically.

Okay, will update this in the next patch set.

> 
>> +          - const: qcom,qca8084-nsscc
>> +
>> +  clocks:
>> +    items:
>> +      - description: Chip XO source
>> +      - description: UNIPHY0 RX 312P5M/125M clock source
>> +      - description: UNIPHY0 TX 312P5M/125M clock source
>> +      - description: UNIPHY1 RX 312P5M/125M clock source
>> +      - description: UNIPHY1 TX 312P5M/125M clock source
>> +      - description: UNIPHY1 RX 312P5M clock source
>> +      - description: UNIPHY1 TX 312P5M clock source
>> +
>> +  reg:
>> +    items:
>> +      - description: MDIO bus address for Clock & Reset Controller register
>> +
>> +required:
>> +  - compatible
>> +  - clocks
>> +  - reg
>> +
>> +allOf:
>> +  - $ref: qcom,gcc.yaml#
>> +
>> +unevaluatedProperties: false
>> +
>> +examples:
>> +  - |
>> +    mdio {
>> +      #address-cells = <1>;
>> +      #size-cells = <0>;
>> +
>> +      clock-controller@800000 {
>> +        compatible = "qcom,qca8084-nsscc";
>> +        reg = <24>;
> 
> I think changes from your previous version... Unit address must match
> it, so clock-controller@24

okay, will use the clock-controller@24 in the next patch set, thanks.

> 
> 
>> +        clocks = <&qca8k_xo>,
>> +                 <&qca8k_uniphy0_rx>,
> 
> 
> Best regards,
> Krzysztof
> 

  reply	other threads:[~2023-08-10  3:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-09  8:00 [PATCH v1 0/4] add clock controller of qca8386/qca8084 Luo Jie
2023-08-09  8:00 ` [PATCH v1 1/4] clk: qcom: branch: Add clk_branch2_qca8k_ops Luo Jie
2023-08-09 16:56   ` Konrad Dybcio
2023-08-10  3:46     ` Jie Luo
2023-08-09  8:00 ` [PATCH v1 2/4] dt-bindings: clock: add qca8386/qca8084 clock and reset definitions Luo Jie
2023-08-09 15:34   ` Krzysztof Kozlowski
2023-08-10  3:51     ` Jie Luo [this message]
2023-08-09  8:00 ` [PATCH v1 3/4] clk: qcom: add clock controller driver for qca8386/qca8084 Luo Jie
2023-08-09 15:38   ` Krzysztof Kozlowski
2023-08-10  4:44     ` Jie Luo
2023-08-09 16:57   ` Konrad Dybcio
2023-08-10  4:48     ` Jie Luo
2023-08-09  8:00 ` [PATCH v1 4/4] arm64: defconfig: Enable qca8k nss clock controller Luo Jie
2023-08-09 15:40   ` Krzysztof Kozlowski
2023-08-10  4:50     ` Jie Luo
2023-08-09 15:32 ` [PATCH v1 0/4] add clock controller of qca8386/qca8084 Krzysztof Kozlowski
2023-08-10  4:51   ` Jie Luo

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