From: "Koenig, Christian" <Christian.Koenig@amd.com>
To: "Thomas Hellström (VMware)" <thomas_os@shipmail.org>,
"Dave Hansen" <dave.hansen@intel.com>,
"Daniel Vetter" <daniel@ffwll.ch>
Cc: dri-devel <dri-devel@lists.freedesktop.org>,
"pv-drivers@vmware.com" <pv-drivers@vmware.com>,
VMware Graphics <linux-graphics-maintainer@vmware.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"Lendacky, Thomas" <Thomas.Lendacky@amd.com>,
Thomas Hellstrom <thellstrom@vmware.com>,
Peter Zijlstra <peterz@infradead.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Heiko Carstens <heiko.carstens@de.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Andy Lutomirski <luto@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption
Date: Wed, 4 Sep 2019 11:10:34 +0000 [thread overview]
Message-ID: <7eec2c11-d0d4-4c81-6ed2-d0932bf5af33@amd.com> (raw)
In-Reply-To: <94113acc-1f99-2386-1d42-4b9930b04f73@shipmail.org>
Am 04.09.19 um 10:19 schrieb Thomas Hellström (VMware):
> Hi, Christian,
>
> On 9/4/19 9:33 AM, Koenig, Christian wrote:
>> Am 03.09.19 um 23:05 schrieb Thomas Hellström (VMware):
>>> On 9/3/19 10:51 PM, Dave Hansen wrote:
>>>> On 9/3/19 1:36 PM, Thomas Hellström (VMware) wrote:
>>>>> So the question here should really be, can we determine already at
>>>>> mmap
>>>>> time whether backing memory will be unencrypted and adjust the *real*
>>>>> vma->vm_page_prot under the mmap_sem?
>>>>>
>>>>> Possibly, but that requires populating the buffer with memory at mmap
>>>>> time rather than at first fault time.
>>>> I'm not connecting the dots.
>>>>
>>>> vma->vm_page_prot is used to create a VMA's PTEs regardless of if they
>>>> are created at mmap() or fault time. If we establish a good
>>>> vma->vm_page_prot, can't we just use it forever for demand faults?
>>> With SEV I think that we could possibly establish the encryption flags
>>> at vma creation time. But thinking of it, it would actually break with
>>> SME where buffer content can be moved between encrypted system memory
>>> and unencrypted graphics card PCI memory behind user-space's back.
>>> That would imply killing all user-space encrypted PTEs and at fault
>>> time set up new ones pointing to unencrypted PCI memory..
>> Well my problem is where do you see encrypted system memory here?
>>
>> At least for AMD GPUs all memory accessed must be unencrypted and that
>> counts for both system as well as PCI memory.
>
> We're talking SME now right?
>
> The current SME setup is that if a device's DMA mask says it's capable
> of addressing the encryption bit, coherent memory will be encrypted.
> The memory controllers will decrypt for the device on the fly.
> Otherwise coherent memory will be decrypted.
>
>>
>> So I don't get why we can't assume always unencrypted and keep it
>> like that.
>
> I see two reasons. First, it would break with a real device that
> signals it's capable of addressing the encryption bit.
Why? Because we don't use dma_mmap_coherent()?
I've already talked with Christoph that we probably want to switch TTM
over to using that instead to also get rid of the ttm_io_prot() hack.
Regards,
Christian.
>
> Second I can imagine unaccelerated setups (something like vkms using
> prime feeding a VNC connection) where we actually want the TTM buffers
> encrypted to protect data.
>
> But at least the latter reason is way far out in the future.
>
> So for me I'm ok with that if that works for you?
>
> /Thomas
>
>
>>
>> Regards,
>> Christian.
>
>
next prev parent reply other threads:[~2019-09-04 11:10 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 13:15 [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 1/4] x86/mm: Export force_dma_unencrypted Thomas Hellström (VMware)
2019-09-03 13:46 ` Christoph Hellwig
2019-09-03 14:32 ` Thomas Hellström (VMware)
2019-09-03 16:22 ` Christoph Hellwig
2019-09-03 20:46 ` Thomas Hellström (VMware)
2019-09-03 21:41 ` Andy Lutomirski
2019-09-04 6:58 ` Christoph Hellwig
2019-09-04 7:32 ` Thomas Hellström (VMware)
2019-09-04 12:22 ` Christoph Hellwig
2019-09-04 17:28 ` Thomas Hellström (VMware)
2019-09-03 15:14 ` Dave Hansen
2019-09-03 18:50 ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 2/4] s390/mm: " Thomas Hellström (VMware)
2019-09-03 13:46 ` Christoph Hellwig
2019-09-03 13:15 ` [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption Thomas Hellström (VMware)
2019-09-03 19:38 ` Dave Hansen
2019-09-03 19:51 ` Daniel Vetter
2019-09-03 19:55 ` Dave Hansen
2019-09-03 20:36 ` Thomas Hellström (VMware)
2019-09-03 20:51 ` Dave Hansen
2019-09-03 21:05 ` Thomas Hellström (VMware)
2019-09-03 21:46 ` Andy Lutomirski
2019-09-03 22:08 ` Thomas Hellström (VMware)
2019-09-03 22:15 ` Thomas Hellström (VMware)
2019-09-03 23:10 ` Dave Hansen
2019-09-04 8:34 ` Thomas Hellström (VMware)
2019-09-03 23:15 ` Andy Lutomirski
2019-09-04 6:49 ` Thomas Hellström (VMware)
2019-09-04 7:53 ` Daniel Vetter
2019-09-04 10:37 ` Thomas Hellström (VMware)
2019-09-04 11:43 ` Daniel Vetter
2019-09-04 18:16 ` Christoph Hellwig
2019-09-04 7:33 ` Koenig, Christian
2019-09-04 8:19 ` Thomas Hellström (VMware)
2019-09-04 8:42 ` Thomas Hellström (VMware)
2019-09-04 11:10 ` Koenig, Christian [this message]
2019-09-04 12:35 ` Thomas Hellström (VMware)
2019-09-04 13:05 ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 4/4] drm/ttm: Cache dma pool decrypted pages when AMD SEV is active Thomas Hellström (VMware)
2019-09-03 15:18 ` [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Daniel Vetter
2019-09-05 10:43 ` Thomas Hellström (VMware)
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