From: "Thomas Hellström (VMware)" <thomas_os@shipmail.org>
To: "Koenig, Christian" <Christian.Koenig@amd.com>,
Dave Hansen <dave.hansen@intel.com>,
Daniel Vetter <daniel@ffwll.ch>
Cc: dri-devel <dri-devel@lists.freedesktop.org>,
"pv-drivers@vmware.com" <pv-drivers@vmware.com>,
VMware Graphics <linux-graphics-maintainer@vmware.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"Lendacky, Thomas" <Thomas.Lendacky@amd.com>,
Thomas Hellstrom <thellstrom@vmware.com>,
Peter Zijlstra <peterz@infradead.org>,
Dave Hansen <dave.hansen@linux.intel.com>,
Heiko Carstens <heiko.carstens@de.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Andy Lutomirski <luto@kernel.org>,
"H. Peter Anvin" <hpa@zytor.com>,
Thomas Gleixner <tglx@linutronix.de>
Subject: Re: [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption
Date: Wed, 4 Sep 2019 15:05:53 +0200 [thread overview]
Message-ID: <e13accfc-cde8-754c-1730-0f2db4e2dd2e@shipmail.org> (raw)
In-Reply-To: <9ca29de8-0c9b-65b2-52e8-8668a1517ac5@shipmail.org>
On 9/4/19 2:35 PM, Thomas Hellström (VMware) wrote:
>
>>
>> I've already talked with Christoph that we probably want to switch TTM
>> over to using that instead to also get rid of the ttm_io_prot() hack.
>
> OK, would that mean us ditching other memory modes completely? And
> on-the-fly caching transitions? or is it just for the special case of
> cached coherent memory? Do we need to cache the coherent kernel
> mappings in TTM as well, for ttm_bo_kmap()?
Reading this again, I wanted to point out that I'm not against this.
Just curious.
/Thomas
next prev parent reply other threads:[~2019-09-04 13:06 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-03 13:15 [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 1/4] x86/mm: Export force_dma_unencrypted Thomas Hellström (VMware)
2019-09-03 13:46 ` Christoph Hellwig
2019-09-03 14:32 ` Thomas Hellström (VMware)
2019-09-03 16:22 ` Christoph Hellwig
2019-09-03 20:46 ` Thomas Hellström (VMware)
2019-09-03 21:41 ` Andy Lutomirski
2019-09-04 6:58 ` Christoph Hellwig
2019-09-04 7:32 ` Thomas Hellström (VMware)
2019-09-04 12:22 ` Christoph Hellwig
2019-09-04 17:28 ` Thomas Hellström (VMware)
2019-09-03 15:14 ` Dave Hansen
2019-09-03 18:50 ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 2/4] s390/mm: " Thomas Hellström (VMware)
2019-09-03 13:46 ` Christoph Hellwig
2019-09-03 13:15 ` [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption Thomas Hellström (VMware)
2019-09-03 19:38 ` Dave Hansen
2019-09-03 19:51 ` Daniel Vetter
2019-09-03 19:55 ` Dave Hansen
2019-09-03 20:36 ` Thomas Hellström (VMware)
2019-09-03 20:51 ` Dave Hansen
2019-09-03 21:05 ` Thomas Hellström (VMware)
2019-09-03 21:46 ` Andy Lutomirski
2019-09-03 22:08 ` Thomas Hellström (VMware)
2019-09-03 22:15 ` Thomas Hellström (VMware)
2019-09-03 23:10 ` Dave Hansen
2019-09-04 8:34 ` Thomas Hellström (VMware)
2019-09-03 23:15 ` Andy Lutomirski
2019-09-04 6:49 ` Thomas Hellström (VMware)
2019-09-04 7:53 ` Daniel Vetter
2019-09-04 10:37 ` Thomas Hellström (VMware)
2019-09-04 11:43 ` Daniel Vetter
2019-09-04 18:16 ` Christoph Hellwig
2019-09-04 7:33 ` Koenig, Christian
2019-09-04 8:19 ` Thomas Hellström (VMware)
2019-09-04 8:42 ` Thomas Hellström (VMware)
2019-09-04 11:10 ` Koenig, Christian
2019-09-04 12:35 ` Thomas Hellström (VMware)
2019-09-04 13:05 ` Thomas Hellström (VMware) [this message]
2019-09-03 13:15 ` [PATCH v2 4/4] drm/ttm: Cache dma pool decrypted pages when AMD SEV is active Thomas Hellström (VMware)
2019-09-03 15:18 ` [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Daniel Vetter
2019-09-05 10:43 ` Thomas Hellström (VMware)
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