Re: [PATCH 07/15] ARM: zynq: Add ethernet phy reset information to DT(zc702)

[Andrew Lunn <andrew@lunn.ch>]

On Wed, Dec 11, 2024 at 01:41:26PM +0100, Michal Simek wrote:
> Added phy reset gpio information for gem0.
> 
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>  arch/arm/boot/dts/xilinx/zynq-zc702.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/xilinx/zynq-zc702.dts b/arch/arm/boot/dts/xilinx/zynq-zc702.dts
> index 424e78f6c148..975385f4ac01 100644
> --- a/arch/arm/boot/dts/xilinx/zynq-zc702.dts
> +++ b/arch/arm/boot/dts/xilinx/zynq-zc702.dts
> @@ -79,6 +79,8 @@ &gem0 {
>  	phy-handle = <&ethernet_phy>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_gem0_default>;
> +	phy-reset-gpio = <&gpio0 11 0>;
> +	phy-reset-active-low;

Hi Michal

Could you point me at code which actually implements these two
properties.

What is more normal is a reset-gpios property in the PHY node, or a
reset-gpios in the MDIO node.

	Andrew