* [PATCH] x86/bugs: Add missing NO_SSB flag
@ 2024-08-28 22:40 Daniel Sneddon
2024-08-28 23:36 ` Dave Hansen
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Sneddon @ 2024-08-28 22:40 UTC (permalink / raw)
To: Thomas Gleixner, Ingo Molnar, Borislav Petkov, Dave Hansen,
maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)
Cc: pawan.kumar.gupta, Daniel Sneddon, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
The Moorefield and Lightning Mountain Atom processors are
missing the NO_SSB flag in the vulnerabilities whitelist.
This will cause unaffected parts to incorrectly be reported
as vulnerable. Add the missing flag.
Signed-off-by: Daniel Sneddon <daniel.sneddon@linux.intel.com>
---
arch/x86/kernel/cpu/common.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index d4e539d4e158..be307c9ef263 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1165,8 +1165,8 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = {
VULNWL_INTEL(INTEL_CORE_YONAH, NO_SSB),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS | NO_ITLB_MULTIHIT),
- VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_MID, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | MSBDS_ONLY),
+ VULNWL_INTEL(INTEL_ATOM_AIRMONT_NP, NO_SSB | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT),
VULNWL_INTEL(INTEL_ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
VULNWL_INTEL(INTEL_ATOM_GOLDMONT_D, NO_MDS | NO_L1TF | NO_SWAPGS | NO_ITLB_MULTIHIT | NO_MMIO),
--
2.25.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/bugs: Add missing NO_SSB flag
2024-08-28 22:40 [PATCH] x86/bugs: Add missing NO_SSB flag Daniel Sneddon
@ 2024-08-28 23:36 ` Dave Hansen
2024-08-28 23:50 ` Daniel Sneddon
0 siblings, 1 reply; 5+ messages in thread
From: Dave Hansen @ 2024-08-28 23:36 UTC (permalink / raw)
To: Daniel Sneddon, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)
Cc: pawan.kumar.gupta, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
On 8/28/24 15:40, Daniel Sneddon wrote:
> The Moorefield and Lightning Mountain Atom processors are
> missing the NO_SSB flag in the vulnerabilities whitelist.
> This will cause unaffected parts to incorrectly be reported
> as vulnerable. Add the missing flag.
It'd be really cool to add two things to these changelogs: First, who
figured this out and how? Basically, who cares and why? Second, what
public Intel documentation supports this change?
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/bugs: Add missing NO_SSB flag
2024-08-28 23:36 ` Dave Hansen
@ 2024-08-28 23:50 ` Daniel Sneddon
2024-08-28 23:54 ` Dave Hansen
0 siblings, 1 reply; 5+ messages in thread
From: Daniel Sneddon @ 2024-08-28 23:50 UTC (permalink / raw)
To: Dave Hansen, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)
Cc: pawan.kumar.gupta, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
On 8/28/24 16:36, Dave Hansen wrote:
> On 8/28/24 15:40, Daniel Sneddon wrote:
>> The Moorefield and Lightning Mountain Atom processors are
>> missing the NO_SSB flag in the vulnerabilities whitelist.
>> This will cause unaffected parts to incorrectly be reported
>> as vulnerable. Add the missing flag.
>
> It'd be really cool to add two things to these changelogs: First, who
> figured this out and how? Basically, who cares and why? Second, what
> public Intel documentation supports this change?
The first thing I can do no problem. The second..... :(
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/bugs: Add missing NO_SSB flag
2024-08-28 23:50 ` Daniel Sneddon
@ 2024-08-28 23:54 ` Dave Hansen
2024-08-29 0:01 ` Daniel Sneddon
0 siblings, 1 reply; 5+ messages in thread
From: Dave Hansen @ 2024-08-28 23:54 UTC (permalink / raw)
To: Daniel Sneddon, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)
Cc: pawan.kumar.gupta, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
On 8/28/24 16:50, Daniel Sneddon wrote:
> On 8/28/24 16:36, Dave Hansen wrote:
>> On 8/28/24 15:40, Daniel Sneddon wrote:
>>> The Moorefield and Lightning Mountain Atom processors are
>>> missing the NO_SSB flag in the vulnerabilities whitelist.
>>> This will cause unaffected parts to incorrectly be reported
>>> as vulnerable. Add the missing flag.
>> It'd be really cool to add two things to these changelogs: First, who
>> figured this out and how? Basically, who cares and why? Second, what
>> public Intel documentation supports this change?
> The first thing I can do no problem. The second..... 🙁
Heh, I went looking just after I asked. These CPUs are ghosts as far as
the docs are concerned. I assume because they are end-of-life'd (or
whatever the proper name is). But even saying _that_ in the changelog
would be helpful.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] x86/bugs: Add missing NO_SSB flag
2024-08-28 23:54 ` Dave Hansen
@ 2024-08-29 0:01 ` Daniel Sneddon
0 siblings, 0 replies; 5+ messages in thread
From: Daniel Sneddon @ 2024-08-29 0:01 UTC (permalink / raw)
To: Dave Hansen, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)
Cc: pawan.kumar.gupta, H. Peter Anvin,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)
On 8/28/24 16:54, Dave Hansen wrote:
> On 8/28/24 16:50, Daniel Sneddon wrote:
>> On 8/28/24 16:36, Dave Hansen wrote:
>>> On 8/28/24 15:40, Daniel Sneddon wrote:
>>>> The Moorefield and Lightning Mountain Atom processors are
>>>> missing the NO_SSB flag in the vulnerabilities whitelist.
>>>> This will cause unaffected parts to incorrectly be reported
>>>> as vulnerable. Add the missing flag.
>>> It'd be really cool to add two things to these changelogs: First, who
>>> figured this out and how? Basically, who cares and why? Second, what
>>> public Intel documentation supports this change?
>> The first thing I can do no problem. The second..... 🙁
>
> Heh, I went looking just after I asked. These CPUs are ghosts as far as
> the docs are concerned. I assume because they are end-of-life'd (or
> whatever the proper name is). But even saying _that_ in the changelog
> would be helpful.
Will do!
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2024-08-29 0:01 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-08-28 22:40 [PATCH] x86/bugs: Add missing NO_SSB flag Daniel Sneddon
2024-08-28 23:36 ` Dave Hansen
2024-08-28 23:50 ` Daniel Sneddon
2024-08-28 23:54 ` Dave Hansen
2024-08-29 0:01 ` Daniel Sneddon
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®