From: "Yinghai Lu" <yinghai.lu@amd.com>
To: "Muli Ben-Yehuda" <muli@il.ibm.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>,
"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
"Andi Kleen" <ak@suse.de>
Subject: Re: [PATCH] x86-64: typo in __assign_irq_vector when updating pos for vector and offset
Date: Sat, 21 Oct 2006 22:13:45 -0700 [thread overview]
Message-ID: <86802c440610212213g7998fefesc43da2438ad25f01@mail.gmail.com> (raw)
In-Reply-To: <20061022035109.GM5211@rhun.haifa.ibm.com>
On 10/21/06, Muli Ben-Yehuda <muli@il.ibm.com> wrote:
> On Sat, Oct 21, 2006 at 09:00:17PM +0000, Linux Kernel Mailing List wrote:
> Booting processor 1/4 APIC 0x1
> Initializing CPU#1
> Calibrating delay using timer specific routine.. 6339.07 BogoMIPS (lpj=12678150)CPU: Trace cache: 12K uops, L1 D cache: Initializing CPU#2
> Calibrating delay using timer specific routine.. 6339.11 BogoMIPS (lpj=12678228)CPU: Trace cache: 12K uops, L1 D cache: 16K
> CPU: L2 cache: 1024K
> CPU: Physical Processor ID: 3
> CPU: Processor Core ID: 0
> CPU2: Thermal monitoring enabled (TM1)
> Intel(R) Pentium(R) 4 CPU 3.16GHz stepping 09
> lockdep: not fixing up alternatives.
> Booting processor 3/4 APIC 0x7
> Initializing CPU#3
> Calibrating delay using timer specific routine.. 6339.20 BogoMIPS (lpj=12678401)CPU: Trace cache: 12K uops, L1 D cache: 16K
> CPU: L2 cache: 1024K
> CPU: Physical Processor ID: 3
> CPU: Processor Core ID: 0
> CPU3: Thermal monitoring enabled (TM1)
> Intel(R) Pentium(R) 4 CPU 3.16GHz stepping 09
> Brought up 4 CPUs
It seems it tried to initialize CPU2, before CPU1 is all set.
current code still initialize CPU one by one, because there is some
share data structure.
YH
next prev parent reply other threads:[~2006-10-22 5:13 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <200610212100.k9LL0GtC018787@hera.kernel.org>
2006-10-22 3:51 ` Muli Ben-Yehuda
2006-10-22 5:13 ` Yinghai Lu [this message]
2006-10-22 6:55 ` yhlu
2006-10-22 8:50 ` Muli Ben-Yehuda
2006-10-22 8:50 ` Eric W. Biederman
2006-10-22 8:28 ` Yinghai Lu
2006-10-22 8:50 ` Muli Ben-Yehuda
2006-10-22 8:58 ` Eric W. Biederman
2006-10-22 16:02 ` yhlu
2006-10-22 16:19 ` yhlu
2006-10-22 21:33 ` Andi Kleen
2006-10-22 16:20 ` Muli Ben-Yehuda
2006-10-22 16:28 ` yhlu
2006-10-22 8:35 ` Eric W. Biederman
2006-10-22 8:52 ` Muli Ben-Yehuda
2006-10-22 9:10 ` Eric W. Biederman
2006-10-23 4:32 ` [PATCH 1/2] x86_64 irq: Simplify the vector allocator Eric W. Biederman
2006-10-23 4:35 ` [PATCH 2/2] x86_64 irq: Only look at per_cpu data for online cpus Eric W. Biederman
2006-10-23 6:17 ` yhlu
2006-10-23 8:14 ` Muli Ben-Yehuda
2006-10-23 6:15 ` [PATCH 1/2] x86_64 irq: Simplify the vector allocator yhlu
2006-10-24 5:29 ` Andi Kleen
2006-10-22 13:29 ` [PATCH] x86-64: typo in __assign_irq_vector when updating pos for vector and offset Andi Kleen
2006-10-22 16:31 ` Muli Ben-Yehuda
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