From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
acme@kernel.org, mingo@redhat.com, corbet@lwn.net
Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org,
mike.leach@arm.com, tor@ti.com, al.grant@arm.com,
pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 06/20] coresight: etm3x: unlocking tracer in default arch init
Date: Wed, 30 Sep 2015 14:33:36 +0300 [thread overview]
Message-ID: <87eghgjg4v.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <1442593594-10665-7-git-send-email-mathieu.poirier@linaro.org>
Mathieu Poirier <mathieu.poirier@linaro.org> writes:
> Calling function 'smp_call_function_single()' to unlock the
> tracer and calling it right after to perform the default
> initialisation doesn't make sense.
>
> Moving 'etm_os_unlock()' just before making the default
> initialisation results in the same outcome while saving
> one call to 'smp_call_function_single()'.
>
> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
> ---
> drivers/hwtracing/coresight/coresight-etm3x.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/hwtracing/coresight/coresight-etm3x.c b/drivers/hwtracing/coresight/coresight-etm3x.c
> index c6880c1ade55..a4c158df0fef 100644
> --- a/drivers/hwtracing/coresight/coresight-etm3x.c
> +++ b/drivers/hwtracing/coresight/coresight-etm3x.c
> @@ -1867,6 +1867,11 @@ static void etm_init_arch_data(void *info)
> * certain registers might be ignored.
> */
> etm_clr_pwrdwn(drvdata);
> +
> + /* Make sure all registers are accessible */
> + etm_os_unlock(drvdata);
In case of co-processor register access, this will end up unlocking the
local ETM instead of the one on target cpu, by the looks of it. That's
why smp_function_call() was needed there. Or you might want a
etm_read_on_cpu() variant if it's really worth it.
> + drvdata->os_unlock = true;
> +
> /*
> * Set prog bit. It will be set from reset but this is included to
> * ensure it is set
> @@ -1961,9 +1966,6 @@ static int etm_probe(struct amba_device *adev, const struct amba_id *id)
> get_online_cpus();
> etmdrvdata[drvdata->cpu] = drvdata;
>
> - if (!smp_call_function_single(drvdata->cpu, etm_os_unlock, drvdata, 1))
> - drvdata->os_unlock = true;
> -
> if (smp_call_function_single(drvdata->cpu,
> etm_init_arch_data, drvdata, 1))
> dev_err(dev, "ETM arch init failed\n");
> --
> 1.9.1
Regards,
--
Alex
next prev parent reply other threads:[~2015-09-30 11:35 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-18 16:26 [RFC PATCH 00/20] Coresight integration with perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Mathieu Poirier
2015-09-30 9:58 ` Alexander Shishkin
2015-10-01 22:26 ` Mathieu Poirier
2015-10-02 4:40 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 02/20] coresight: etm3x: implementing 'is_enabled()' API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 03/20] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-09-30 11:16 ` Alexander Shishkin
2015-10-01 22:43 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 04/20] coresight: etm3x: using chip logic to start/stop traces Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 05/20] coresight: etm3x: adapting default tracer setting for perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 06/20] coresight: etm3x: unlocking tracer in default arch init Mathieu Poirier
2015-09-30 11:33 ` Alexander Shishkin [this message]
2015-10-01 22:42 ` Mathieu Poirier
2015-10-02 4:47 ` Alexander Shishkin
2015-10-02 17:17 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 07/20] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 08/20] coresight: etb10: implementing buffer set and unset APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 09/20] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 10/20] coresight: etb10: adding snapshot mode feature Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 11/20] coresight: making coresight_build_paths() public Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 12/20] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 13/20] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 14/20] coresight: etm-perf: implementing 'event_init()' API Mathieu Poirier
2015-09-22 14:29 ` Alexander Shishkin
2015-09-28 21:22 ` Mathieu Poirier
2015-09-30 9:43 ` Alexander Shishkin
2015-10-02 16:52 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 15/20] coresight: etm-perf: implementing 'setup_aux()' API Mathieu Poirier
2015-09-30 11:50 ` Alexander Shishkin
2015-10-01 22:49 ` Mathieu Poirier
2015-10-02 4:50 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 16/20] coresight: etm-perf: implementing trace related APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 18/20] coresight: etm3x: pushing down perf configuration to tracer Mathieu Poirier
2015-09-30 12:45 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 19/20] coresight: etm3x: implementing perf's user/kernel mode Mathieu Poirier
2015-09-30 10:16 ` Alexander Shishkin
2015-10-01 23:16 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-09-19 10:09 ` Ingo Molnar
2015-09-30 8:52 ` [RFC PATCH 00/20] Coresight " Alexander Shishkin
2015-10-01 22:07 ` Mathieu Poirier
2015-10-02 4:53 ` Alexander Shishkin
2015-10-02 15:27 ` Mathieu Poirier
2015-09-30 9:01 ` Alexander Shishkin
2015-10-01 22:12 ` Mathieu Poirier
2015-09-30 10:18 ` Alexander Shishkin
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