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From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: "Greg KH" <gregkh@linuxfoundation.org>,
	a.p.zijlstra@chello.nl,
	"Arnaldo Carvalho de Melo" <acme@kernel.org>,
	"Ingo Molnar" <mingo@redhat.com>, "Jon Corbet" <corbet@lwn.net>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Chunyan Zhang" <zhang.chunyan@linaro.org>,
	"Mike Leach" <mike.leach@arm.com>, "Tor Jeremiassen" <tor@ti.com>,
	"Al Grant" <al.grant@arm.com>, "Paweł Moll" <pawel.moll@arm.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	linux-doc@vger.kernel.org,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [RFC PATCH 15/20] coresight: etm-perf: implementing 'setup_aux()' API
Date: Fri, 02 Oct 2015 07:50:25 +0300	[thread overview]
Message-ID: <87si5t3mcu.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <CANLsYkyjHZOzZqx8X7StegkxE7kuBma4Wz_pZ8OBDs-V3E3irw@mail.gmail.com>

Mathieu Poirier <mathieu.poirier@linaro.org> writes:

> On 30 September 2015 at 05:50, Alexander Shishkin
> <alexander.shishkin@linux.intel.com> wrote:
>> Mathieu Poirier <mathieu.poirier@linaro.org> writes:
>>
>>> +static void *etm_setup_aux(int cpu, void **pages,
>>> +                           int nr_pages, bool overwrite)
>>> +{
>>> +     struct coresight_device *csdev;
>>> +
>>> +     if (cpu == -1)
>>> +             cpu = smp_processor_id();
>>> +
>>> +     csdev = per_cpu(csdev_sink, cpu);
>>> +     if (!csdev)
>>> +             return NULL;
>>> +
>>> +     return sink_ops(csdev)->setup_aux(csdev, cpu, pages,
>>> +                                       nr_pages, overwrite);
>>
>> Is it guaranteed that this sink would always have .setup_aux()?
>
> A setup_aux() is vital to the design, both on Intel and ARM.  I really
> don't see how one could go without it.  I can return NULL if it hasn't
> been provided - that way the setup will fail without triggering a core
> dump.

It wasn't clear to me that the sink that ends up in csdev_sink will
always be the one that does have .setup_aux(). And if it indeed doesn't,
it's better to refuse to setup a buffer than crash.

Regards,
--
Alex

  reply	other threads:[~2015-10-02  4:50 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-18 16:26 [RFC PATCH 00/20] Coresight integration with perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Mathieu Poirier
2015-09-30  9:58   ` Alexander Shishkin
2015-10-01 22:26     ` Mathieu Poirier
2015-10-02  4:40       ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 02/20] coresight: etm3x: implementing 'is_enabled()' API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 03/20] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-09-30 11:16   ` Alexander Shishkin
2015-10-01 22:43     ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 04/20] coresight: etm3x: using chip logic to start/stop traces Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 05/20] coresight: etm3x: adapting default tracer setting for perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 06/20] coresight: etm3x: unlocking tracer in default arch init Mathieu Poirier
2015-09-30 11:33   ` Alexander Shishkin
2015-10-01 22:42     ` Mathieu Poirier
2015-10-02  4:47       ` Alexander Shishkin
2015-10-02 17:17         ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 07/20] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 08/20] coresight: etb10: implementing buffer set and unset APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 09/20] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 10/20] coresight: etb10: adding snapshot mode feature Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 11/20] coresight: making coresight_build_paths() public Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 12/20] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 13/20] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 14/20] coresight: etm-perf: implementing 'event_init()' API Mathieu Poirier
2015-09-22 14:29   ` Alexander Shishkin
2015-09-28 21:22     ` Mathieu Poirier
2015-09-30  9:43       ` Alexander Shishkin
2015-10-02 16:52         ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 15/20] coresight: etm-perf: implementing 'setup_aux()' API Mathieu Poirier
2015-09-30 11:50   ` Alexander Shishkin
2015-10-01 22:49     ` Mathieu Poirier
2015-10-02  4:50       ` Alexander Shishkin [this message]
2015-09-18 16:26 ` [RFC PATCH 16/20] coresight: etm-perf: implementing trace related APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 18/20] coresight: etm3x: pushing down perf configuration to tracer Mathieu Poirier
2015-09-30 12:45   ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 19/20] coresight: etm3x: implementing perf's user/kernel mode Mathieu Poirier
2015-09-30 10:16   ` Alexander Shishkin
2015-10-01 23:16     ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-09-19 10:09   ` Ingo Molnar
2015-09-30  8:52 ` [RFC PATCH 00/20] Coresight " Alexander Shishkin
2015-10-01 22:07   ` Mathieu Poirier
2015-10-02  4:53     ` Alexander Shishkin
2015-10-02 15:27       ` Mathieu Poirier
2015-09-30  9:01 ` Alexander Shishkin
2015-10-01 22:12   ` Mathieu Poirier
2015-09-30 10:18 ` Alexander Shishkin

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