From: Alexander Shishkin <alexander.shishkin@linux.intel.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>,
gregkh@linuxfoundation.org, a.p.zijlstra@chello.nl,
acme@kernel.org, mingo@redhat.com, corbet@lwn.net
Cc: adrian.hunter@intel.com, zhang.chunyan@linaro.org,
mike.leach@arm.com, tor@ti.com, al.grant@arm.com,
pawel.moll@arm.com, linux-arm-kernel@lists.infradead.org,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH 14/20] coresight: etm-perf: implementing 'event_init()' API
Date: Tue, 22 Sep 2015 17:29:00 +0300 [thread overview]
Message-ID: <87eghq4jf7.fsf@ashishki-desk.ger.corp.intel.com> (raw)
In-Reply-To: <1442593594-10665-15-git-send-email-mathieu.poirier@linaro.org>
Mathieu Poirier <mathieu.poirier@linaro.org> writes:
> +static void etm_event_destroy(struct perf_event *event)
> +{
> + /* switching off the source will also tear down the path */
> + etm_event_power_sources(event->cpu, false);
> +}
> +
> +static int etm_event_init(struct perf_event *event)
> +{
> + int ret;
> +
> + if (event->attr.type != etm_pmu.type)
> + return -ENOENT;
> +
> + if (event->cpu >= nr_cpu_ids)
> + return -EINVAL;
> +
> + /* only one session at a time */
> + if (etm_event_source_enabled(event->cpu))
> + return -EBUSY;
Why is this the case? If you were to configure the event in pmu::add()
and deconfigure it in pmu::del(), like you already do with the buffer
part, you could handle as many sessions as you want.
> +
> + /*
> + * Make sure CPUs don't disappear between the
> + * power up sequence and configuration.
> + */
> + get_online_cpus();
> + ret = etm_event_power_sources(event->cpu, true);
> + if (ret)
> + goto out;
> +
> + ret = etm_event_config_sources(event->cpu);
This can be done in pmu::add(), if you can call directly into
etm_configure_cpu() or etm_config_enable() so that there's no cross-cpu
calling in between.
> +
> + event->destroy = etm_event_destroy;
> +out:
> + put_online_cpus();
> + return ret;
> +}
> +
> static int __init etm_perf_init(void)
> {
> etm_pmu.capabilities = PERF_PMU_CAP_EXCLUSIVE;
> @@ -59,6 +234,7 @@ static int __init etm_perf_init(void)
> etm_pmu.attr_groups = etm_pmu_attr_groups;
> etm_pmu.task_ctx_nr = perf_sw_context;
> etm_pmu.read = etm_event_read;
> + etm_pmu.event_init = etm_event_init;
>
> return perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
> }
One general comment -- it would be slightly easier at least for me if
all the pmu related bits were in one patch.
Thanks,
--
Alex
next prev parent reply other threads:[~2015-09-22 14:29 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-18 16:26 [RFC PATCH 00/20] Coresight integration with perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 01/20] coresight: etm3x: splitting 'etm_enable_hw()' operations Mathieu Poirier
2015-09-30 9:58 ` Alexander Shishkin
2015-10-01 22:26 ` Mathieu Poirier
2015-10-02 4:40 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 02/20] coresight: etm3x: implementing 'is_enabled()' API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 03/20] coresight: etm3x: implementing 'cpu_id()' API Mathieu Poirier
2015-09-30 11:16 ` Alexander Shishkin
2015-10-01 22:43 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 04/20] coresight: etm3x: using chip logic to start/stop traces Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 05/20] coresight: etm3x: adapting default tracer setting for perf Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 06/20] coresight: etm3x: unlocking tracer in default arch init Mathieu Poirier
2015-09-30 11:33 ` Alexander Shishkin
2015-10-01 22:42 ` Mathieu Poirier
2015-10-02 4:47 ` Alexander Shishkin
2015-10-02 17:17 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 07/20] coresight: etb10: implementing the setup_aux() API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 08/20] coresight: etb10: implementing buffer set and unset APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 09/20] coresight: etb10: implementing buffer update API Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 10/20] coresight: etb10: adding snapshot mode feature Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 11/20] coresight: making coresight_build_paths() public Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 12/20] coresight: keeping track of enabled sink buffers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 13/20] coresight: etm-perf: new PMU driver for ETM tracers Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 14/20] coresight: etm-perf: implementing 'event_init()' API Mathieu Poirier
2015-09-22 14:29 ` Alexander Shishkin [this message]
2015-09-28 21:22 ` Mathieu Poirier
2015-09-30 9:43 ` Alexander Shishkin
2015-10-02 16:52 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 15/20] coresight: etm-perf: implementing 'setup_aux()' API Mathieu Poirier
2015-09-30 11:50 ` Alexander Shishkin
2015-10-01 22:49 ` Mathieu Poirier
2015-10-02 4:50 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 16/20] coresight: etm-perf: implementing trace related APIs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 17/20] coresight: etm-perf: adding symbolic link for CPUs Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 18/20] coresight: etm3x: pushing down perf configuration to tracer Mathieu Poirier
2015-09-30 12:45 ` Alexander Shishkin
2015-09-18 16:26 ` [RFC PATCH 19/20] coresight: etm3x: implementing perf's user/kernel mode Mathieu Poirier
2015-09-30 10:16 ` Alexander Shishkin
2015-10-01 23:16 ` Mathieu Poirier
2015-09-18 16:26 ` [RFC PATCH 20/20] coresight: updating documentation to reflect integration with perf Mathieu Poirier
2015-09-19 10:09 ` Ingo Molnar
2015-09-30 8:52 ` [RFC PATCH 00/20] Coresight " Alexander Shishkin
2015-10-01 22:07 ` Mathieu Poirier
2015-10-02 4:53 ` Alexander Shishkin
2015-10-02 15:27 ` Mathieu Poirier
2015-09-30 9:01 ` Alexander Shishkin
2015-10-01 22:12 ` Mathieu Poirier
2015-09-30 10:18 ` Alexander Shishkin
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