From: Thomas Gleixner <tglx@kernel.org>
To: "Troy Mitchell" <troy.mitchell@linux.dev>,
"Anup Patel" <anup@brainfault.org>,
"Radu Rendec" <radu@rendec.net>, "Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>,
"Björn Töpel" <bjorn@rivosinc.com>
Cc: Anup Patel <apatel@ventanamicro.com>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Troy Mitchell <troy.mitchell@linux.dev>
Subject: Re: [PATCH v2 1/2] irqchip/riscv-aplic: Use handle_edge_irq() for edge-triggered MSI sources
Date: Wed, 11 Nov 2026 01:07:47 +0100 [thread overview]
Message-ID: <87ik24telo.ffs@fw13> (raw)
In-Reply-To: <20261110-aplic-affinity-fix-v2-1-6c143b8b4e8c@linux.dev>
On Tue, Nov 10 2026 at 12:06, Troy Mitchell wrote:
> In MSI mode, all APLIC interrupts are handled by handle_fasteoi_irq().
> For an edge-triggered source the APLIC forwards each edge as an MSI and
> keeps no state after that, so an edge which the CPU side drops is lost.
> After an affinity change, the next MSI can arrive on the new CPU while
> the previous one is still being handled on the old CPU, and
> handle_fasteoi_irq() then drops it.
>
> The fasteoi flow also never calls irq_ack(), which is where IMSIC applies
> an affinity change that was deferred while a previous vector move was in
> flight. Such a change stays pending, and later affinity changes of the
> interrupt only update the pending mask.
>
> Use handle_edge_irq() for edge-triggered sources. It acknowledges the
> interrupt before invoking the handler. If the interrupt is still in
> progress on the previous target CPU, it either waits for it to complete
> or marks it pending so that the handler runs again.
>
> Fixes: ca8df97fe679 ("irqchip/riscv-aplic: Add support for MSI-mode")
> Signed-off-by: Troy Mitchell <troy.mitchell@linux.dev>
Not that I care at all about showing up in some made up git-tag metrics,
but in general it's a matter of courtesy to point out that the solution
to the problem was suggested by someone else, no?
> + /*
> + * Edge-triggered sources are fire and forget, so they must be
> + * acknowledged before the handler runs. The edge flow handler also
> + * replays an interrupt which arrives while the previous one is
> + * still being handled on another CPU after an affinity change.
> + */
> + if (type & IRQ_TYPE_EDGE_BOTH)
> + irq_set_chip_handler_name_locked(d, irq_data_get_irq_chip(d),
> + handle_edge_irq, "edge");
> + else
> + irq_set_chip_handler_name_locked(d, irq_data_get_irq_chip(d),
> + handle_fasteoi_irq, "fasteoi");
> +
https://docs.kernel.org/process/maintainer-tip.html#bracket-rules
Thanks,
tglx
next prev parent reply other threads:[~2026-11-11 0:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-10 12:06 [PATCH v2 0/2] irqchip/riscv-aplic: Use trigger specific flow handlers in MSI mode Troy Mitchell
2026-11-10 12:06 ` [PATCH v2 1/2] irqchip/riscv-aplic: Use handle_edge_irq() for edge-triggered MSI sources Troy Mitchell
2026-11-11 0:07 ` Thomas Gleixner [this message]
2026-11-11 1:11 ` Troy Mitchell
2026-11-10 12:06 ` [PATCH v2 2/2] irqchip/riscv-aplic: Apply pending affinity changes for level " Troy Mitchell
2026-11-11 0:09 ` Thomas Gleixner
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