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From: Shawn Lin <shawn.lin@rock-chips.com>
To: "Koichiro Den" <den@valinux.co.jp>,
	"Marek Vasut" <marek.vasut+renesas@mailbox.org>,
	"Geert Uytterhoeven" <geert+renesas@glider.be>,
	"Yoshihiro Shimoda" <yoshihiro.shimoda.uh@renesas.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Magnus Damm" <magnus.damm@gmail.com>,
	"Jingoo Han" <jingoohan1@gmail.com>
Cc: shawn.lin@rock-chips.com, Philipp Zabel <p.zabel@pengutronix.de>,
	Frank Li <Frank.Li@nxp.com>, Niklas Cassel <cassel@kernel.org>,
	Wilfred Mallawa <wilfred.mallawa@wdc.com>,
	Serge Semin <fancer.lancer@gmail.com>,
	linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 02/18] PCI: dwc: Factor out the PORT_LINK_DEBUG1 link-up check
Date: Thu, 15 Oct 2026 11:48:09 +0800	[thread overview]
Message-ID: <990c293e-9c73-44ac-b89c-641bf08770b2@rock-chips.com> (raw)
In-Reply-To: <20261015033103.3076869-3-den@valinux.co.jp>

在 2026/10/15 星期四 11:30, Koichiro Den 写道:
> dw_pcie_link_up() reads PORT_LINK_DEBUG1 when the glue driver provides
> no .link_up() callback. A callback that needs a platform-specific check
> on top of that register would have to duplicate the register read.
> 
> Factor the check out into dw_pcie_link_up_debug_check() and export it
> for modular glue drivers. pcie-rcar-gen4 will be the first user: its APP
> link-up events remain latched after the link goes down, so it has to
> combine them with the live PORT_LINK_DEBUG1 state.
> 
> No functional change.
> 

Reviewed-by: Shawn Lin <Shawn.lin@rock-chips.com>

> Suggested-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
> Signed-off-by: Koichiro Den <den@valinux.co.jp>
> ---
> Changes since v3:
>    - No changes.
> 
>   drivers/pci/controller/dwc/pcie-designware.c | 15 +++++++++++----
>   drivers/pci/controller/dwc/pcie-designware.h |  1 +
>   2 files changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index c726aa71c830..49a9ba910ba8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -817,17 +817,24 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci)
>   }
>   EXPORT_SYMBOL_GPL(dw_pcie_wait_for_link);
>   
> -bool dw_pcie_link_up(struct dw_pcie *pci)
> +/* Link state from PORT_LINK_DEBUG1: up and not in training */
> +bool dw_pcie_link_up_debug_check(struct dw_pcie *pci)
>   {
>   	u32 val;
>   
> -	if (pci->ops && pci->ops->link_up)
> -		return pci->ops->link_up(pci);
> -
>   	val = dw_pcie_readl_dbi(pci, PORT_LINK_DEBUG1);
>   	return ((val & PORT_LINK_DEBUG1_LINK_UP) &&
>   		(!(val & PORT_LINK_DEBUG1_LINK_IN_TRAINING)));
>   }
> +EXPORT_SYMBOL_GPL(dw_pcie_link_up_debug_check);
> +
> +bool dw_pcie_link_up(struct dw_pcie *pci)
> +{
> +	if (pci->ops && pci->ops->link_up)
> +		return pci->ops->link_up(pci);
> +
> +	return dw_pcie_link_up_debug_check(pci);
> +}
>   EXPORT_SYMBOL_GPL(dw_pcie_link_up);
>   
>   void dw_pcie_upconfig_setup(struct dw_pcie *pci)
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 419932488280..2ce61709b58c 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -618,6 +618,7 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val);
>   u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size);
>   void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val);
>   void dw_pcie_write_dbi2(struct dw_pcie *pci, u32 reg, size_t size, u32 val);
> +bool dw_pcie_link_up_debug_check(struct dw_pcie *pci);
>   bool dw_pcie_link_up(struct dw_pcie *pci);
>   void dw_pcie_upconfig_setup(struct dw_pcie *pci);
>   int dw_pcie_wait_for_link(struct dw_pcie *pci);


  reply	other threads:[~2026-10-15  4:03 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-15  3:30 [PATCH v4 00/18] PCI: rcar-gen4: Recover from link down and route Root Port interrupts Koichiro Den
2026-10-15  3:30 ` [PATCH v4 01/18] PCI: dwc: Add Renesas to the RAS DES VSEC list Koichiro Den
2026-10-15  3:30 ` [PATCH v4 02/18] PCI: dwc: Factor out the PORT_LINK_DEBUG1 link-up check Koichiro Den
2026-10-15  3:48   ` Shawn Lin [this message]
2026-10-15  3:30 ` [PATCH v4 03/18] PCI: rcar-gen4: Check live link status in link_up() Koichiro Den
2026-10-15  3:30 ` [PATCH v4 04/18] dt-bindings: PCI: rcar-gen4: Add optional "aer" interrupt for R-Car Gen4 SoCs Koichiro Den
2026-10-15  3:30 ` [PATCH v4 05/18] PCI: dwc: Export dw_handle_msi_irq() Koichiro Den
2026-10-15  3:49   ` Shawn Lin
2026-10-15  3:30 ` [PATCH v4 06/18] PCI: rcar-gen4: Move deinitialization helpers before SoC initialization Koichiro Den
2026-10-15  3:30 ` [PATCH v4 07/18] PCI: rcar-gen4: Assert resets when Gen5 SoC PHY initialization fails Koichiro Den
2026-10-15  3:30 ` [PATCH v4 08/18] PCI: rcar-gen4: Separate hardware setup from resource acquisition Koichiro Den
2026-10-15  3:30 ` [PATCH v4 09/18] PCI: rcar-gen4: Add Root Port reset support Koichiro Den
2026-10-15  3:30 ` [PATCH v4 10/18] PCI: dwc: Free the MSI domain after the host .deinit() callback Koichiro Den
2026-10-15  3:30 ` [PATCH v4 11/18] PCI: rcar-gen4: Take over the iMSI-RX interrupt Koichiro Den
2026-10-15  3:30 ` [PATCH v4 12/18] PCI: rcar-gen4: Recover the Root Port on link down Koichiro Den
2026-10-15  3:30 ` [PATCH v4 13/18] PCI: dwc: Let glue drivers hide the Root Port MSI capabilities Koichiro Den
2026-10-15  4:11   ` Shawn Lin
2026-10-15  7:17     ` Koichiro Den
2026-10-15  3:30 ` [PATCH v4 14/18] PCI: rcar-gen4: Route Root Port AER to a virtual Root Port IRQ Koichiro Den
2026-10-15  3:31 ` [PATCH v4 15/18] PCI: rcar-gen4: Route Root Port PME and bandwidth notifications Koichiro Den
2026-10-15  3:31 ` [PATCH v4 16/18] arm64: dts: renesas: r8a779f0: Describe the PCIe AER interrupts Koichiro Den
2026-10-15  3:31 ` [PATCH v4 17/18] arm64: dts: renesas: r8a779g0: " Koichiro Den
2026-10-15  3:31 ` [PATCH v4 18/18] arm64: dts: renesas: r8a779h0: Describe the PCIe AER interrupt Koichiro Den

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