[PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

This is v3 of the patch series adding support for Macronix MX25L12833F
and MX25L12845G, and restoring fallback parameters for MX25L12805D.

I would like to sincerely apologize for the build errors in v2 reported by
the kernel test robot. I had made further modifications and fixed the
issues during my local testing, but I accidentally submitted an older,
incorrect version of the patches.

In this v3, I have corrected the mistake and changed the fixup hook to use
`post_sfdp` instead of `post_bfpt`.

Changes in v3:
- Changed the fixup hook from `post_bfpt` to `post_sfdp` for MX25L12805D.
- Fixed the build error caused by the incompatible pointer type in v2.

Changes in v2:
- Patch 1: Changed the fixup hook from late_init to post_bfpt. Since
  the legacy MX25L12805D lacks SFDP, it will not execute post_bfpt.
  This safely isolates the newer MX25L12833F/45G (which support SFDP)
  and enables 4PP for them without breaking the legacy part.
- Patch 1: Added detailed comments inside the fixup function explaining
  the ID collision and the rationale behind the hook choice, as
  suggested by reviewers.
- Patch 2 (New): Added a separate patch to restore the missing .size
  and .no_sfdp_flags fallback parameters for the legacy MX25L12805D.
  This fixes a probe failure caused by a previous commit and includes
  the appropriate Fixes and Cc: stable tags.

Below are the test results after applying the patch provided by Michael:
- mx25l12833f
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities 
Supported read modes by the flash
 1S-1S-1S
  opcode        0x03
  mode cycles   0
  dummy cycles  0
 1S-1S-2S
  opcode        0x3b
  mode cycles   0
  dummy cycles  8
 1S-2S-2S
  opcode        0xbb
  mode cycles   0
  dummy cycles  4
 1S-1S-4S
  opcode        0x6b
  mode cycles   0
  dummy cycles  8
 1S-4S-4S
  opcode        0xeb
  mode cycles   2
  dummy cycles  4
 4S-4S-4S
  opcode        0xeb
  mode cycles   2
  dummy cycles  4

Supported page program modes by the flash
 1S-1S-1S
  opcode        0x02
 1S-4S-4S
  opcode        0x38

zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params 
name            (null)
id              c2 20 18 c2 20 18
size            16.0 MiB
write size      1
page size       256
address nbytes  3
flags           HAS_LOCK | HAS_4BIT_BP | SOFT_RESET

opcodes
 read           0xeb
  dummy cycles  6
 erase          0xd8
 program        0x38
 8D extension   none

protocols
 read           1S-4S-4S
 write          1S-4S-4S
 register       1S-1S-1S

erase commands
 20 (4.00 KiB) [1]
 52 (32.0 KiB) [2]
 d8 (64.0 KiB) [3]
 c7 (16.0 MiB)

sector map
 region (in hex)   | erase mask | overlaid
 ------------------+------------+----------
 00000000-00ffffff |     [   3] | no

zynq> dd if=/dev/urandom of=/tmp/spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.083756 seconds, 23.9MB/s

zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> hexdump /tmp/spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000

zynq> sha256sum /tmp/spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read

zynq> mtd_debug write /dev/mtd0 0 2097152 /tmp/spi_test 
Copied 2097152 bytes from /tmp/spi_test to address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> sha256sum /tmp/spi*
07bc3ccaac03ebf2b46c78f0be620bb22ce431ed39044d89af9e57481dcdea82  /tmp/spi_read
07bc3ccaac03ebf2b46c78f0be620bb22ce431ed39044d89af9e57481dcdea82  /tmp/spi_test

zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> sha256sum /tmp/spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
07bc3ccaac03ebf2b46c78f0be620bb22ce431ed39044d89af9e57481dcdea82  /tmp/spi_test

zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 16777216 (16M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1 
mtd.oobsize = 0 
regions = 0

-mx25l12845g
zynq> cat /sys/kernel/debug/spi-nor/spi0.0/capabilities 
Supported read modes by the flash
 1S-1S-1S
  opcode        0x03
  mode cycles   0
  dummy cycles  0
 1S-1S-2S
  opcode        0x3b
  mode cycles   0
  dummy cycles  8
 1S-2S-2S
  opcode        0xbb
  mode cycles   0
  dummy cycles  4
 1S-1S-4S
  opcode        0x6b
  mode cycles   0
  dummy cycles  8
 1S-4S-4S
  opcode        0xeb
  mode cycles   2
  dummy cycles  4
 4S-4S-4S
  opcode        0xeb
  mode cycles   2
  dummy cycles  4

Supported page program modes by the flash
 1S-1S-1S
  opcode        0x02
 1S-4S-4S
  opcode        0x38

zynq> cat /sys/kernel/debug/spi-nor/spi0.0/params 
name            (null)
id              c2 20 18 c2 20 18
size            16.0 MiB
write size      1
page size       256
address nbytes  3
flags           HAS_LOCK | HAS_4BIT_BP | SOFT_RESET

opcodes
 read           0xeb
  dummy cycles  6
 erase          0xd8
 program        0x38
 8D extension   none

protocols
 read           1S-4S-4S
 write          1S-4S-4S
 register       1S-1S-1S

erase commands
 20 (4.00 KiB) [1]
 52 (32.0 KiB) [2]
 d8 (64.0 KiB) [3]
 c7 (16.0 MiB)

sector map
 region (in hex)   | erase mask | overlaid
 ------------------+------------+----------
 00000000-00ffffff |     [   3] | no

zynq> dd if=/dev/urandom of=/tmp/spi_test bs=1M count=2
2+0 records in
2+0 records out
2097152 bytes (2.0MB) copied, 0.084527 seconds, 23.7MB/s

zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> hexdump /tmp/spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000

zynq> sha256sum /tmp/spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read

zynq> mtd_debug write /dev/mtd0 0 2097152 /tmp/spi_test 
Copied 2097152 bytes from /tmp/spi_test to address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> sha256sum /tmp/spi*
926c0e33670888d2c0d9d602a502ccc0aacb52afe58b9d430ebcb88137a8e3bf  /tmp/spi_read
926c0e33670888d2c0d9d602a502ccc0aacb52afe58b9d430ebcb88137a8e3bf  /tmp/spi_test

zynq> mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash

zynq> mtd_debug read /dev/mtd0 0 2097152 /tmp/spi_read
Copied 2097152 bytes from address 0x00000000 in flash to /tmp/spi_read

zynq> sha256sum /tmp/spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5  /tmp/spi_read
926c0e33670888d2c0d9d602a502ccc0aacb52afe58b9d430ebcb88137a8e3bf  /tmp/spi_test

zynq> mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 16777216 (16M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1 
mtd.oobsize = 0 
regions = 0

Cheng Ming Lin (2):
  mtd: spi-nor: Add support for MX25L12833F and MX25L12845G
  mtd: spi-nor: macronix: Restore fallback parameters for MX25L12805D

 drivers/mtd/spi-nor/macronix.c | 28 +++++++++++++++++++++++++++-
 1 file changed, 27 insertions(+), 1 deletion(-)

-- 
2.25.1

[PATCH v3 1/2] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

Add support for Macronix MX25L12833F and MX25L12845G SPI NOR flashes.
These parts share the same JEDEC ID (0xc2, 0x20, 0x18) as the legacy
MX25L12805D.

The newer flashes support SFDP and 1-4-4 Page Program in 3-byte address
mode, but this 4PP capability is not defined in their SFDP tables.
Conversely, the legacy MX25L12805D lacks SFDP support entirely and does
not support 4PP.

To safely enable 4PP for the newer flashes without breaking the legacy
part, introduce a post_sfdp fixup. Since the legacy MX25L12805D does
not support SFDP, it falls back to static parameters and will never
execute the post_sfdp hook. The newer flashes will successfully parse
the SFDP, trigger the hook, and safely append the SNOR_HWCAPS_PP_1_4_4
capability.

Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
 drivers/mtd/spi-nor/macronix.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index e97f5cbd9..1adb79832 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -83,6 +83,25 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor)
 	return 0;
 }
 
+static int
+mx25l12805d_4pp3b_post_sfdp_fixups(struct spi_nor *nor)
+{
+	struct spi_nor_flash_parameter *params = nor->params;
+
+	/*
+	 * JEDEC ID 0xc22018 is shared by MX25L12805D (no SFDP, no 4PP) and
+	 * MX25L12833F/MX25L12845G (support SFDP and 4PP in 3-byte mode).
+	 * The legacy 05D lacks SFDP and will not execute this hook. For
+	 * the newer flashes, 3-byte 1-4-4 PP is not defined in SFDP, so
+	 * we safely enable it here.
+	 */
+	params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
+	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_4_4],
+				SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
+
+	return 0;
+}
+
 static const struct spi_nor_fixups mx25l25635_fixups = {
 	.post_bfpt = mx25l25635_post_bfpt_fixups,
 	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
@@ -96,6 +115,10 @@ static const struct spi_nor_fixups mx25l3255e_fixups = {
 	.late_init = mx25l3255e_late_init_fixups,
 };
 
+static const struct spi_nor_fixups mx25l12805d_4pp3b_fixups = {
+	.post_sfdp = mx25l12805d_4pp3b_post_sfdp_fixups,
+};
+
 static const struct flash_info macronix_nor_parts[] = {
 	{
 		.id = SNOR_ID(0xc2, 0x20, 0x10),
@@ -130,9 +153,10 @@ static const struct flash_info macronix_nor_parts[] = {
 		.size = SZ_8M,
 		.no_sfdp_flags = SECT_4K,
 	}, {
-		/* MX25L12805D */
+		/* MX25L12805D, MX25L12833F, MX25L12845G */
 		.id = SNOR_ID(0xc2, 0x20, 0x18),
 		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
+		.fixups = &mx25l12805d_4pp3b_fixups,
 	}, {
 		/* MX25L25635E, MX25L25645G */
 		.id = SNOR_ID(0xc2, 0x20, 0x19),
-- 
2.25.1

Re: [PATCH v3 1/2] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G

[Michael Walle]

On Fri Jun 5, 2026 at 10:48 AM CEST, Cheng Ming Lin wrote:
> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> Add support for Macronix MX25L12833F and MX25L12845G SPI NOR flashes.
> These parts share the same JEDEC ID (0xc2, 0x20, 0x18) as the legacy
> MX25L12805D.
>
> The newer flashes support SFDP and 1-4-4 Page Program in 3-byte address
> mode, but this 4PP capability is not defined in their SFDP tables.
> Conversely, the legacy MX25L12805D lacks SFDP support entirely and does
> not support 4PP.
>
> To safely enable 4PP for the newer flashes without breaking the legacy
> part, introduce a post_sfdp fixup. Since the legacy MX25L12805D does
> not support SFDP, it falls back to static parameters and will never
> execute the post_sfdp hook. The newer flashes will successfully parse
> the SFDP, trigger the hook, and safely append the SNOR_HWCAPS_PP_1_4_4
> capability.
>
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>

Nice!

Reviewed-by: Michael Walle <mwalle@kernel.org>

Re: [PATCH v3 1/2] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G

[Shiji Yang]

On Fri,  5 Jun 2026 16:48:36 +0800, Cheng Ming Lin wrote:

> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> Add support for Macronix MX25L12833F and MX25L12845G SPI NOR flashes.
> These parts share the same JEDEC ID (0xc2, 0x20, 0x18) as the legacy
> MX25L12805D.
> 
> The newer flashes support SFDP and 1-4-4 Page Program in 3-byte address
> mode, but this 4PP capability is not defined in their SFDP tables.
> Conversely, the legacy MX25L12805D lacks SFDP support entirely and does
> not support 4PP.
> 
> To safely enable 4PP for the newer flashes without breaking the legacy
> part, introduce a post_sfdp fixup. Since the legacy MX25L12805D does
> not support SFDP, it falls back to static parameters and will never
> execute the post_sfdp hook. The newer flashes will successfully parse
> the SFDP, trigger the hook, and safely append the SNOR_HWCAPS_PP_1_4_4
> capability.
> 
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> ---
>  drivers/mtd/spi-nor/macronix.c | 26 +++++++++++++++++++++++++-
>  1 file changed, 25 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> index e97f5cbd9..1adb79832 100644
> --- a/drivers/mtd/spi-nor/macronix.c
> +++ b/drivers/mtd/spi-nor/macronix.c
> @@ -83,6 +83,25 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor)
>  	return 0;
>  }
>  
> +static int
> +mx25l12805d_4pp3b_post_sfdp_fixups(struct spi_nor *nor)
> +{
> +	struct spi_nor_flash_parameter *params = nor->params;
> +
> +	/*
> +	 * JEDEC ID 0xc22018 is shared by MX25L12805D (no SFDP, no 4PP) and
> +	 * MX25L12833F/MX25L12845G (support SFDP and 4PP in 3-byte mode).
> +	 * The legacy 05D lacks SFDP and will not execute this hook. For
> +	 * the newer flashes, 3-byte 1-4-4 PP is not defined in SFDP, so
> +	 * we safely enable it here.
> +	 */
> +	params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
> +	spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_4_4],
> +				SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
> +
> +	return 0;
> +}
> +
>  static const struct spi_nor_fixups mx25l25635_fixups = {
>  	.post_bfpt = mx25l25635_post_bfpt_fixups,
>  	.post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> @@ -96,6 +115,10 @@ static const struct spi_nor_fixups mx25l3255e_fixups = {
>  	.late_init = mx25l3255e_late_init_fixups,
>  };
>  
> +static const struct spi_nor_fixups mx25l12805d_4pp3b_fixups = {
> +	.post_sfdp = mx25l12805d_4pp3b_post_sfdp_fixups,

It seems that this fixup won't be called at all because the dual/quad
io support is missing. See:

	if (nor->info->no_sfdp_flags & (SPI_NOR_DUAL_READ |
					SPI_NOR_QUAD_READ |
					SPI_NOR_OCTAL_READ |
					SPI_NOR_OCTAL_DTR_READ))
		spi_nor_sfdp_init_params_deprecated(nor);

> +};
> +
>  static const struct flash_info macronix_nor_parts[] = {
>  	{
>  		.id = SNOR_ID(0xc2, 0x20, 0x10),
> @@ -130,9 +153,10 @@ static const struct flash_info macronix_nor_parts[] = {
>  		.size = SZ_8M,
>  		.no_sfdp_flags = SECT_4K,
>  	}, {
> -		/* MX25L12805D */
> +		/* MX25L12805D, MX25L12833F, MX25L12845G */
>  		.id = SNOR_ID(0xc2, 0x20, 0x18),
>  		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
> +		.fixups = &mx25l12805d_4pp3b_fixups,
>  	}, {
>  		/* MX25L25635E, MX25L25645G */
>  		.id = SNOR_ID(0xc2, 0x20, 0x19),
> -- 
> 2.25.1
> 

Regards,
Shiji Yang

Re: [PATCH v3 1/2] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G

[Cheng Ming Lin]

Hi,

Shiji Yang <yangshiji66@outlook.com> 於 2026年8月22日週六 下午8:07寫道：
>
> On Fri,  5 Jun 2026 16:48:36 +0800, Cheng Ming Lin wrote:
>
> > From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> >
> > Add support for Macronix MX25L12833F and MX25L12845G SPI NOR flashes.
> > These parts share the same JEDEC ID (0xc2, 0x20, 0x18) as the legacy
> > MX25L12805D.
> >
> > The newer flashes support SFDP and 1-4-4 Page Program in 3-byte address
> > mode, but this 4PP capability is not defined in their SFDP tables.
> > Conversely, the legacy MX25L12805D lacks SFDP support entirely and does
> > not support 4PP.
> >
> > To safely enable 4PP for the newer flashes without breaking the legacy
> > part, introduce a post_sfdp fixup. Since the legacy MX25L12805D does
> > not support SFDP, it falls back to static parameters and will never
> > execute the post_sfdp hook. The newer flashes will successfully parse
> > the SFDP, trigger the hook, and safely append the SNOR_HWCAPS_PP_1_4_4
> > capability.
> >
> > Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
> > ---
> >  drivers/mtd/spi-nor/macronix.c | 26 +++++++++++++++++++++++++-
> >  1 file changed, 25 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
> > index e97f5cbd9..1adb79832 100644
> > --- a/drivers/mtd/spi-nor/macronix.c
> > +++ b/drivers/mtd/spi-nor/macronix.c
> > @@ -83,6 +83,25 @@ mx25l3255e_late_init_fixups(struct spi_nor *nor)
> >       return 0;
> >  }
> >
> > +static int
> > +mx25l12805d_4pp3b_post_sfdp_fixups(struct spi_nor *nor)
> > +{
> > +     struct spi_nor_flash_parameter *params = nor->params;
> > +
> > +     /*
> > +      * JEDEC ID 0xc22018 is shared by MX25L12805D (no SFDP, no 4PP) and
> > +      * MX25L12833F/MX25L12845G (support SFDP and 4PP in 3-byte mode).
> > +      * The legacy 05D lacks SFDP and will not execute this hook. For
> > +      * the newer flashes, 3-byte 1-4-4 PP is not defined in SFDP, so
> > +      * we safely enable it here.
> > +      */
> > +     params->hwcaps.mask |= SNOR_HWCAPS_PP_1_4_4;
> > +     spi_nor_set_pp_settings(&params->page_programs[SNOR_CMD_PP_1_4_4],
> > +                             SPINOR_OP_PP_1_4_4, SNOR_PROTO_1_4_4);
> > +
> > +     return 0;
> > +}
> > +
> >  static const struct spi_nor_fixups mx25l25635_fixups = {
> >       .post_bfpt = mx25l25635_post_bfpt_fixups,
> >       .post_sfdp = macronix_qpp4b_post_sfdp_fixups,
> > @@ -96,6 +115,10 @@ static const struct spi_nor_fixups mx25l3255e_fixups = {
> >       .late_init = mx25l3255e_late_init_fixups,
> >  };
> >
> > +static const struct spi_nor_fixups mx25l12805d_4pp3b_fixups = {
> > +     .post_sfdp = mx25l12805d_4pp3b_post_sfdp_fixups,
>
> It seems that this fixup won't be called at all because the dual/quad
> io support is missing. See:

Since the MX25L12805D only supports single I/O read, these flags cannot
be added. Please refer to the datasheet for details:

Link: https://www.alldatasheet.com/datasheet-pdf/view/267916/MCNIX/MX25L12805D.html

Additionally, please refer to this patch, which mainly addresses the
deprecated SFDP parsing issue:

Link: https://patchwork.ozlabs.org/project/linux-mtd/cover/20260713091206.2414400-1-mwalle@kernel.org/"

Therefore, my patch is expected to be merged alongside the 'Rework flash
parameter initialization' patch, which should resolve the issue you brought
up.

>
>         if (nor->info->no_sfdp_flags & (SPI_NOR_DUAL_READ |
>                                         SPI_NOR_QUAD_READ |
>                                         SPI_NOR_OCTAL_READ |
>                                         SPI_NOR_OCTAL_DTR_READ))
>                 spi_nor_sfdp_init_params_deprecated(nor);
>
> > +};
> > +
> >  static const struct flash_info macronix_nor_parts[] = {
> >       {
> >               .id = SNOR_ID(0xc2, 0x20, 0x10),
> > @@ -130,9 +153,10 @@ static const struct flash_info macronix_nor_parts[] = {
> >               .size = SZ_8M,
> >               .no_sfdp_flags = SECT_4K,
> >       }, {
> > -             /* MX25L12805D */
> > +             /* MX25L12805D, MX25L12833F, MX25L12845G */
> >               .id = SNOR_ID(0xc2, 0x20, 0x18),
> >               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
> > +             .fixups = &mx25l12805d_4pp3b_fixups,
> >       }, {
> >               /* MX25L25635E, MX25L25645G */
> >               .id = SNOR_ID(0xc2, 0x20, 0x19),
> > --
> > 2.25.1
> >
>
> Regards,
> Shiji Yang

Best Regards,
Cheng Ming Lin

[PATCH v3 2/2] mtd: spi-nor: macronix: Restore fallback parameters for MX25L12805D

[Cheng Ming Lin]

From: Cheng Ming Lin <chengminglin@mxic.com.tw>

In a previous effort to drop flash_info fields and rely on SFDP, the
static size and no_sfdp_flags were removed from the MX25L12805D entry
(JEDEC ID 0xc22018).

At that time, the legacy MX25L12805D was already EOL and unavailable
for physical testing. Verification was inadvertently performed using
the newer MX25L12833F, which shares the same JEDEC ID but supports
SFDP. As a result, the probe succeeded during testing, leading to
the mistaken removal of the fallback parameters.

Since the actual MX25L12805D lacks SFDP support entirely, it strictly
requires these static parameters.

Restore .size = SZ_16M and .no_sfdp_flags = SECT_4K to this entry
to fix the probe failure for the legacy part.

Fixes: 947c86e481a0 ("mtd: spi-nor: macronix: Drop the redundant flash info fields")
Cc: stable@vger.kernel.org
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>
---
 drivers/mtd/spi-nor/macronix.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/macronix.c b/drivers/mtd/spi-nor/macronix.c
index 1adb79832..d13ea93b0 100644
--- a/drivers/mtd/spi-nor/macronix.c
+++ b/drivers/mtd/spi-nor/macronix.c
@@ -155,7 +155,9 @@ static const struct flash_info macronix_nor_parts[] = {
 	}, {
 		/* MX25L12805D, MX25L12833F, MX25L12845G */
 		.id = SNOR_ID(0xc2, 0x20, 0x18),
+		.size = SZ_16M,
 		.flags = SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP,
+		.no_sfdp_flags = SECT_4K,
 		.fixups = &mx25l12805d_4pp3b_fixups,
 	}, {
 		/* MX25L25635E, MX25L25645G */
-- 
2.25.1

Re: [PATCH v3 2/2] mtd: spi-nor: macronix: Restore fallback parameters for MX25L12805D

[Michael Walle]

On Fri Jun 5, 2026 at 10:48 AM CEST, Cheng Ming Lin wrote:
> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
>
> In a previous effort to drop flash_info fields and rely on SFDP, the
> static size and no_sfdp_flags were removed from the MX25L12805D entry
> (JEDEC ID 0xc22018).
>
> At that time, the legacy MX25L12805D was already EOL and unavailable
> for physical testing. Verification was inadvertently performed using
> the newer MX25L12833F, which shares the same JEDEC ID but supports
> SFDP. As a result, the probe succeeded during testing, leading to
> the mistaken removal of the fallback parameters.
>
> Since the actual MX25L12805D lacks SFDP support entirely, it strictly
> requires these static parameters.
>
> Restore .size = SZ_16M and .no_sfdp_flags = SECT_4K to this entry
> to fix the probe failure for the legacy part.
>
> Fixes: 947c86e481a0 ("mtd: spi-nor: macronix: Drop the redundant flash info fields")
> Cc: stable@vger.kernel.org
> Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw>

Reviewed-by: Michael Walle <mwalle@kernel.org>

Re: [PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[Cheng Ming Lin]

Hi Michael,

Gentle ping on this series, which has been on the list since June 5
without review feedback.

v3 addresses the comments from v1 and v2: the fixup now uses
->post_sfdp() with a comment explaining the ID collision, and the build
error in v2 is fixed. Patch 2/2 is an independent regression fix
(Fixes: 947c86e481a0, Cc: stable) for the legacy MX25L12805D, which
currently fails to probe. The series still applies cleanly on master.

Could you take a look when you get a chance?

Thanks,
Cheng Ming Lin

Re: [PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[Michael Walle]

Hi,

On Tue Aug 11, 2026 at 3:22 AM CEST, Cheng Ming Lin wrote:
> Gentle ping on this series, which has been on the list since June 5
> without review feedback.
>
> v3 addresses the comments from v1 and v2: the fixup now uses
> ->post_sfdp() with a comment explaining the ID collision, and the build
> error in v2 is fixed. Patch 2/2 is an independent regression fix
> (Fixes: 947c86e481a0, Cc: stable) for the legacy MX25L12805D, which
> currently fails to probe. The series still applies cleanly on master.
>
> Could you take a look when you get a chance?

Sorry that fell through the cracks.

-michael

[PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[Russell Senior]

I noticed a few days ago that a Buffalo WZR600DHP running OpenWrt
started boot looping.

I traced the problem to the transition from a v6.12.x kernel to a
v6.18.x kernel, and from there, noticed the change in the mx25l128
support. After reporting the regression, I was directed to this patch
series and just tested it on top of the master branch of OpenWrt,
with linux kernel 6.18.44, and the boot looping problem is resolved.

Tested-by: Russell Senior <russell@personaltelco.net>

Re: [PATCH v3 0/2] mtd: spi-nor: macronix: Add support for MX25L12833F and MX25L12845G

[Michael Walle]

On Fri, 05 Jun 2026 16:48:35 +0800, Cheng Ming Lin wrote:
> From: Cheng Ming Lin <chengminglin@mxic.com.tw>
> 
> This is v3 of the patch series adding support for Macronix MX25L12833F
> and MX25L12845G, and restoring fallback parameters for MX25L12805D.
> 
> I would like to sincerely apologize for the build errors in v2 reported by
> the kernel test robot. I had made further modifications and fixed the
> issues during my local testing, but I accidentally submitted an older,
> incorrect version of the patches.
> 
> [...]

Applied, thanks!

[1/2] mtd: spi-nor: Add support for MX25L12833F and MX25L12845G
      commit: 1dde2faa82fd69a4da5ab7a4635b51773b566d4d
[2/2] mtd: spi-nor: macronix: Restore fallback parameters for MX25L12805D
      commit: 01739ccea21b69818dc071096a249e6f84a6b13d

Best regards,
-- 
Michael Walle <mwalle@kernel.org>